arch/arm/boot/dts/omap2420.dtsi

   1 /*
   2  * Device Tree Source for OMAP2420 SoC
   3  *
   4  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include "omap2.dtsi"
  12
  13 / {
  14         compatible = "ti,omap2420", "ti,omap2";
  15
  16         ocp {
  17                 l4: l4@48000000 {
  18                         compatible = "ti,omap2-l4", "simple-bus";
  19                         #address-cells = <1>;
  20                         #size-cells = <1>;
  21                         ranges = <0 0x48000000 0x100000>;
  22
  23                         prcm: prcm@8000 {
  24                                 compatible = "ti,omap2-prcm";
  25                                 reg = <0x8000 0x1000>;
  26
  27                                 prcm_clocks: clocks {
  28                                         #address-cells = <1>;
  29                                         #size-cells = <0>;
  30                                 };
  31
  32                                 prcm_clockdomains: clockdomains {
  33                                 };
  34                         };
  35
  36                         scm: scm@0 {
  37                                 compatible = "ti,omap2-scm", "simple-bus";
  38                                 reg = <0x0 0x1000>;
  39                                 #address-cells = <1>;
  40                                 #size-cells = <1>;
  41                                 ranges = <0 0x0 0x1000>;
  42
  43                                 omap2420_pmx: pinmux@30 {
  44                                         compatible = "ti,omap2420-padconf",
  45                                                      "pinctrl-single";
  46                                         reg = <0x30 0x0113>;
  47                                         #address-cells = <1>;
  48                                         #size-cells = <0>;
  49                                         pinctrl-single,register-width = <8>;
  50                                         pinctrl-single,function-mask = <0x3f>;
  51                                 };
  52
  53                                 scm_conf: scm_conf@270 {
  54                                         compatible = "syscon";
  55                                         reg = <0x270 0x100>;
  56                                         #address-cells = <1>;
  57                                         #size-cells = <1>;
  58
  59                                         scm_clocks: clocks {
  60                                                 #address-cells = <1>;
  61                                                 #size-cells = <0>;
  62                                         };
  63                                 };
  64
  65                                 scm_clockdomains: clockdomains {
  66                                 };
  67                         };
  68
  69                         counter32k: counter@4000 {
  70                                 compatible = "ti,omap-counter32k";
  71                                 reg = <0x4000 0x20>;
  72                                 ti,hwmods = "counter_32k";
  73                         };
  74                 };
  75
  76                 gpio1: gpio@48018000 {
  77                         compatible = "ti,omap2-gpio";
  78                         reg = <0x48018000 0x200>;
  79                         interrupts = <29>;
  80                         ti,hwmods = "gpio1";
  81                         ti,gpio-always-on;
  82                         #gpio-cells = <2>;
  83                         gpio-controller;
  84                         #interrupt-cells = <2>;
  85                         interrupt-controller;
  86                 };
  87
  88                 gpio2: gpio@4801a000 {
  89                         compatible = "ti,omap2-gpio";
  90                         reg = <0x4801a000 0x200>;
  91                         interrupts = <30>;
  92                         ti,hwmods = "gpio2";
  93                         ti,gpio-always-on;
  94                         #gpio-cells = <2>;
  95                         gpio-controller;
  96                         #interrupt-cells = <2>;
  97                         interrupt-controller;
  98                 };
  99
 100                 gpio3: gpio@4801c000 {
 101                         compatible = "ti,omap2-gpio";
 102                         reg = <0x4801c000 0x200>;
 103                         interrupts = <31>;
 104                         ti,hwmods = "gpio3";
 105                         ti,gpio-always-on;
 106                         #gpio-cells = <2>;
 107                         gpio-controller;
 108                         #interrupt-cells = <2>;
 109                         interrupt-controller;
 110                 };
 111
 112                 gpio4: gpio@4801e000 {
 113                         compatible = "ti,omap2-gpio";
 114                         reg = <0x4801e000 0x200>;
 115                         interrupts = <32>;
 116                         ti,hwmods = "gpio4";
 117                         ti,gpio-always-on;
 118                         #gpio-cells = <2>;
 119                         gpio-controller;
 120                         #interrupt-cells = <2>;
 121                         interrupt-controller;
 122                 };
 123
 124                 gpmc: gpmc@6800a000 {
 125                         compatible = "ti,omap2420-gpmc";
 126                         reg = <0x6800a000 0x1000>;
 127                         #address-cells = <2>;
 128                         #size-cells = <1>;
 129                         interrupts = <20>;
 130                         gpmc,num-cs = <8>;
 131                         gpmc,num-waitpins = <4>;
 132                         ti,hwmods = "gpmc";
 133                         interrupt-controller;
 134                         #interrupt-cells = <2>;
 135                         gpio-controller;
 136                         #gpio-cells = <2>;
 137                 };
 138
 139                 mcbsp1: mcbsp@48074000 {
 140                         compatible = "ti,omap2420-mcbsp";
 141                         reg = <0x48074000 0xff>;
 142                         reg-names = "mpu";
 143                         interrupts = <59>, /* TX interrupt */
 144                                      <60>; /* RX interrupt */
 145                         interrupt-names = "tx", "rx";
 146                         ti,hwmods = "mcbsp1";
 147                         dmas = <&sdma 31>,
 148                                <&sdma 32>;
 149                         dma-names = "tx", "rx";
 150                         status = "disabled";
 151                 };
 152
 153                 mcbsp2: mcbsp@48076000 {
 154                         compatible = "ti,omap2420-mcbsp";
 155                         reg = <0x48076000 0xff>;
 156                         reg-names = "mpu";
 157                         interrupts = <62>, /* TX interrupt */
 158                                      <63>; /* RX interrupt */
 159                         interrupt-names = "tx", "rx";
 160                         ti,hwmods = "mcbsp2";
 161                         dmas = <&sdma 33>,
 162                                <&sdma 34>;
 163                         dma-names = "tx", "rx";
 164                         status = "disabled";
 165                 };
 166
 167                 msdi1: mmc@4809c000 {
 168                         compatible = "ti,omap2420-mmc";
 169                         ti,hwmods = "msdi1";
 170                         reg = <0x4809c000 0x80>;
 171                         interrupts = <83>;
 172                         dmas = <&sdma 61 &sdma 62>;
 173                         dma-names = "tx", "rx";
 174                 };
 175
 176                 mailbox: mailbox@48094000 {
 177                         compatible = "ti,omap2-mailbox";
 178                         reg = <0x48094000 0x200>;
 179                         interrupts = <26>, <34>;
 180                         interrupt-names = "dsp", "iva";
 181                         ti,hwmods = "mailbox";
 182                         #mbox-cells = <1>;
 183                         ti,mbox-num-users = <4>;
 184                         ti,mbox-num-fifos = <6>;
 185                         mbox_dsp: dsp {
 186                                 ti,mbox-tx = <0 0 0>;
 187                                 ti,mbox-rx = <1 0 0>;
 188                         };
 189                         mbox_iva: iva {
 190                                 ti,mbox-tx = <2 1 3>;
 191                                 ti,mbox-rx = <3 1 3>;
 192                         };
 193                 };
 194
 195                 timer1: timer@48028000 {
 196                         compatible = "ti,omap2420-timer";
 197                         reg = <0x48028000 0x400>;
 198                         interrupts = <37>;
 199                         ti,hwmods = "timer1";
 200                         ti,timer-alwon;
 201                 };
 202
 203                 wd_timer2: wdt@48022000 {
 204                         compatible = "ti,omap2-wdt";
 205                         ti,hwmods = "wd_timer2";
 206                         reg = <0x48022000 0x80>;
 207                 };
 208         };
 209 };
 210
 211 &i2c1 {
 212         compatible = "ti,omap2420-i2c";
 213 };
 214
 215 &i2c2 {
 216         compatible = "ti,omap2420-i2c";
 217 };
 218
 219 /include/ "omap24xx-clocks.dtsi"
 220 /include/ "omap2420-clocks.dtsi"