arch/arm/boot/dts/omap3-cm-t3x30.dtsi

   1 /*
   2  * Common support for CompuLab CM-T3x30 CoMs
   3  */
   4
   5 #include "omap3-cm-t3x.dtsi"
   6
   7 / {
   8         cpus {
   9                 cpu@0 {
  10                         cpu0-supply = <&vcc>;
  11                 };
  12         };
  13
  14         vddvario: regulator-vddvario {
  15                 compatible = "regulator-fixed";
  16                 regulator-name = "vddvario";
  17                 regulator-always-on;
  18         };
  19
  20         vdd33a: regulator-vdd33a {
  21                 compatible = "regulator-fixed";
  22                 regulator-name = "vdd33a";
  23                 regulator-always-on;
  24         };
  25 };
  26
  27 &omap3_pmx_core {
  28
  29         smsc1_pins: pinmux_smsc1_pins {
  30                 pinctrl-single,pins = <
  31                         OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE0)       /* gpmc_ncs5.gpmc_ncs5 */
  32                         OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_cts_rctx.gpio_163 */
  33                 >;
  34         };
  35
  36         hsusb0_pins: pinmux_hsusb0_pins {
  37                 pinctrl-single,pins = <
  38                         OMAP3_CORE1_IOPAD(0x21a2, PIN_OUTPUT | MUX_MODE0)               /* hsusb0_clk.hsusb0_clk */
  39                         OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0)               /* hsusb0_stp.hsusb0_stp */
  40                         OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_dir.hsusb0_dir */
  41                         OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_nxt.hsusb0_nxt */
  42                         OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_data0.hsusb2_data0 */
  43                         OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_data1.hsusb0_data1 */
  44                         OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_data2.hsusb0_data2 */
  45                         OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_data7.hsusb0_data3 */
  46                         OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_data7.hsusb0_data4 */
  47                         OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_data7.hsusb0_data5 */
  48                         OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_data7.hsusb0_data6 */
  49                         OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT_PULLDOWN | MUX_MODE0)       /* hsusb0_data7.hsusb0_data7 */
  50                 >;
  51         };
  52 };
  53
  54 &gpmc {
  55         ranges = <5 0 0x2c000000 0x01000000>;
  56
  57         smsc1: ethernet@5,0 {
  58                 compatible = "smsc,lan9221", "smsc,lan9115";
  59                 pinctrl-names = "default";
  60                 pinctrl-0 = <&smsc1_pins>;
  61                 interrupt-parent = <&gpio6>;
  62                 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
  63                 reg = <5 0 0xff>;
  64                 bank-width = <2>;
  65                 gpmc,mux-add-data;
  66                 gpmc,cs-on-ns = <0>;
  67                 gpmc,cs-rd-off-ns = <186>;
  68                 gpmc,cs-wr-off-ns = <186>;
  69                 gpmc,adv-on-ns = <12>;
  70                 gpmc,adv-rd-off-ns = <48>;
  71                 gpmc,adv-wr-off-ns = <48>;
  72                 gpmc,oe-on-ns = <54>;
  73                 gpmc,oe-off-ns = <168>;
  74                 gpmc,we-on-ns = <54>;
  75                 gpmc,we-off-ns = <168>;
  76                 gpmc,rd-cycle-ns = <186>;
  77                 gpmc,wr-cycle-ns = <186>;
  78                 gpmc,access-ns = <114>;
  79                 gpmc,page-burst-access-ns = <6>;
  80                 gpmc,bus-turnaround-ns = <12>;
  81                 gpmc,cycle2cycle-delay-ns = <18>;
  82                 gpmc,wr-data-mux-bus-ns = <90>;
  83                 gpmc,wr-access-ns = <186>;
  84                 gpmc,cycle2cycle-samecsen;
  85                 gpmc,cycle2cycle-diffcsen;
  86                 vddvario-supply = <&vddvario>;
  87                 vdd33a-supply = <&vdd33a>;
  88                 reg-io-width = <4>;
  89                 smsc,save-mac-address;
  90         };
  91 };
  92
  93 &i2c1 {
  94         twl: twl@48 {
  95                 reg = <0x48>;
  96                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
  97                 interrupt-parent = <&intc>;
  98         };
  99 };
 100
 101 #include "twl4030.dtsi"
 102 #include "twl4030_omap3.dtsi"
 103
 104 &mmc1 {
 105         vmmc-supply = <&vmmc1>;
 106 };
 107
 108 &twl_gpio {
 109         ti,use-leds;
 110         /* pullups: BIT(0) */
 111         ti,pullups = <0x000001>;
 112 };
 113
 114 &hsusb1_phy {
 115         reset-gpios = <&twl_gpio 6 GPIO_ACTIVE_LOW>;
 116 };
 117
 118 &hsusb2_phy {
 119         reset-gpios = <&twl_gpio 7 GPIO_ACTIVE_LOW>;
 120 };
 121
 122 &usb_otg_hs {
 123         pinctrl-names = "default";
 124         pinctrl-0 = <&hsusb0_pins>;
 125         interface-type = <0>;
 126         usb-phy = <&usb2_phy>;
 127         phys = <&usb2_phy>;
 128         phy-names = "usb2-phy";
 129         mode = <3>;
 130         power = <50>;
 131 };