2 * Device Tree Source for OMAP3 SoC
4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/omap.h>
15 #include "skeleton.dtsi"
18 compatible = "ti,omap3430", "ti,omap3";
19 interrupt-parent = <&intc>;
35 compatible = "arm,cortex-a8";
42 compatible = "arm,cortex-a8-pmu";
43 reg = <0x54000000 0x800000>;
45 ti,hwmods = "debugss";
49 * The soc node represents the soc top level view. It is used for IPs
50 * that are not memory mapped in the MPU view or for the MPU itself.
53 compatible = "ti,omap-infra";
55 compatible = "ti,omap3-mpu";
60 compatible = "ti,iva2.2";
64 compatible = "ti,omap3-c64";
70 * XXX: Use a flat representation of the OMAP3 interconnect.
71 * The real OMAP interconnect network is quite complex.
72 * Since that will not bring real advantage to represent that in DT for
73 * the moment, just use a fake OCP bus entry to represent the whole bus
77 compatible = "simple-bus";
78 reg = <0x68000000 0x10000>;
83 ti,hwmods = "l3_main";
85 counter32k: counter@48320000 {
86 compatible = "ti,omap-counter32k";
87 reg = <0x48320000 0x20>;
88 ti,hwmods = "counter_32k";
91 intc: interrupt-controller@48200000 {
92 compatible = "ti,omap2-intc";
94 #interrupt-cells = <1>;
96 reg = <0x48200000 0x1000>;
99 sdma: dma-controller@48056000 {
100 compatible = "ti,omap3630-sdma", "ti,omap3430-sdma";
101 reg = <0x48056000 0x1000>;
107 #dma-channels = <32>;
108 #dma-requests = <96>;
111 omap3_pmx_core: pinmux@48002030 {
112 compatible = "ti,omap3-padconf", "pinctrl-single";
113 reg = <0x48002030 0x05cc>;
114 #address-cells = <1>;
116 #interrupt-cells = <1>;
117 interrupt-controller;
118 pinctrl-single,register-width = <16>;
119 pinctrl-single,function-mask = <0xff1f>;
122 omap3_pmx_wkup: pinmux@48002a00 {
123 compatible = "ti,omap3-padconf", "pinctrl-single";
124 reg = <0x48002a00 0x5c>;
125 #address-cells = <1>;
127 #interrupt-cells = <1>;
128 interrupt-controller;
129 pinctrl-single,register-width = <16>;
130 pinctrl-single,function-mask = <0xff1f>;
133 gpio1: gpio@48310000 {
134 compatible = "ti,omap3-gpio";
135 reg = <0x48310000 0x200>;
141 interrupt-controller;
142 #interrupt-cells = <2>;
145 gpio2: gpio@49050000 {
146 compatible = "ti,omap3-gpio";
147 reg = <0x49050000 0x200>;
152 interrupt-controller;
153 #interrupt-cells = <2>;
156 gpio3: gpio@49052000 {
157 compatible = "ti,omap3-gpio";
158 reg = <0x49052000 0x200>;
163 interrupt-controller;
164 #interrupt-cells = <2>;
167 gpio4: gpio@49054000 {
168 compatible = "ti,omap3-gpio";
169 reg = <0x49054000 0x200>;
174 interrupt-controller;
175 #interrupt-cells = <2>;
178 gpio5: gpio@49056000 {
179 compatible = "ti,omap3-gpio";
180 reg = <0x49056000 0x200>;
185 interrupt-controller;
186 #interrupt-cells = <2>;
189 gpio6: gpio@49058000 {
190 compatible = "ti,omap3-gpio";
191 reg = <0x49058000 0x200>;
196 interrupt-controller;
197 #interrupt-cells = <2>;
200 uart1: serial@4806a000 {
201 compatible = "ti,omap3-uart";
202 reg = <0x4806a000 0x2000>;
204 dmas = <&sdma 49 &sdma 50>;
205 dma-names = "tx", "rx";
207 clock-frequency = <48000000>;
210 uart2: serial@4806c000 {
211 compatible = "ti,omap3-uart";
212 reg = <0x4806c000 0x400>;
214 dmas = <&sdma 51 &sdma 52>;
215 dma-names = "tx", "rx";
217 clock-frequency = <48000000>;
220 uart3: serial@49020000 {
221 compatible = "ti,omap3-uart";
222 reg = <0x49020000 0x400>;
224 dmas = <&sdma 53 &sdma 54>;
225 dma-names = "tx", "rx";
227 clock-frequency = <48000000>;
231 compatible = "ti,omap3-i2c";
232 reg = <0x48070000 0x80>;
234 dmas = <&sdma 27 &sdma 28>;
235 dma-names = "tx", "rx";
236 #address-cells = <1>;
242 compatible = "ti,omap3-i2c";
243 reg = <0x48072000 0x80>;
245 dmas = <&sdma 29 &sdma 30>;
246 dma-names = "tx", "rx";
247 #address-cells = <1>;
253 compatible = "ti,omap3-i2c";
254 reg = <0x48060000 0x80>;
256 dmas = <&sdma 25 &sdma 26>;
257 dma-names = "tx", "rx";
258 #address-cells = <1>;
263 mcspi1: spi@48098000 {
264 compatible = "ti,omap2-mcspi";
265 reg = <0x48098000 0x100>;
267 #address-cells = <1>;
269 ti,hwmods = "mcspi1";
279 dma-names = "tx0", "rx0", "tx1", "rx1",
280 "tx2", "rx2", "tx3", "rx3";
283 mcspi2: spi@4809a000 {
284 compatible = "ti,omap2-mcspi";
285 reg = <0x4809a000 0x100>;
287 #address-cells = <1>;
289 ti,hwmods = "mcspi2";
295 dma-names = "tx0", "rx0", "tx1", "rx1";
298 mcspi3: spi@480b8000 {
299 compatible = "ti,omap2-mcspi";
300 reg = <0x480b8000 0x100>;
302 #address-cells = <1>;
304 ti,hwmods = "mcspi3";
310 dma-names = "tx0", "rx0", "tx1", "rx1";
313 mcspi4: spi@480ba000 {
314 compatible = "ti,omap2-mcspi";
315 reg = <0x480ba000 0x100>;
317 #address-cells = <1>;
319 ti,hwmods = "mcspi4";
321 dmas = <&sdma 70>, <&sdma 71>;
322 dma-names = "tx0", "rx0";
325 hdqw1w: 1w@480b2000 {
326 compatible = "ti,omap3-1w";
327 reg = <0x480b2000 0x1000>;
333 compatible = "ti,omap3-hsmmc";
334 reg = <0x4809c000 0x200>;
338 dmas = <&sdma 61>, <&sdma 62>;
339 dma-names = "tx", "rx";
343 compatible = "ti,omap3-hsmmc";
344 reg = <0x480b4000 0x200>;
347 dmas = <&sdma 47>, <&sdma 48>;
348 dma-names = "tx", "rx";
352 compatible = "ti,omap3-hsmmc";
353 reg = <0x480ad000 0x200>;
356 dmas = <&sdma 77>, <&sdma 78>;
357 dma-names = "tx", "rx";
361 compatible = "ti,omap3-wdt";
362 reg = <0x48314000 0x80>;
363 ti,hwmods = "wd_timer2";
366 mcbsp1: mcbsp@48074000 {
367 compatible = "ti,omap3-mcbsp";
368 reg = <0x48074000 0xff>;
370 interrupts = <16>, /* OCP compliant interrupt */
371 <59>, /* TX interrupt */
372 <60>; /* RX interrupt */
373 interrupt-names = "common", "tx", "rx";
374 ti,buffer-size = <128>;
375 ti,hwmods = "mcbsp1";
378 dma-names = "tx", "rx";
381 mcbsp2: mcbsp@49022000 {
382 compatible = "ti,omap3-mcbsp";
383 reg = <0x49022000 0xff>,
385 reg-names = "mpu", "sidetone";
386 interrupts = <17>, /* OCP compliant interrupt */
387 <62>, /* TX interrupt */
388 <63>, /* RX interrupt */
390 interrupt-names = "common", "tx", "rx", "sidetone";
391 ti,buffer-size = <1280>;
392 ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
395 dma-names = "tx", "rx";
398 mcbsp3: mcbsp@49024000 {
399 compatible = "ti,omap3-mcbsp";
400 reg = <0x49024000 0xff>,
402 reg-names = "mpu", "sidetone";
403 interrupts = <22>, /* OCP compliant interrupt */
404 <89>, /* TX interrupt */
405 <90>, /* RX interrupt */
407 interrupt-names = "common", "tx", "rx", "sidetone";
408 ti,buffer-size = <128>;
409 ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
412 dma-names = "tx", "rx";
415 mcbsp4: mcbsp@49026000 {
416 compatible = "ti,omap3-mcbsp";
417 reg = <0x49026000 0xff>;
419 interrupts = <23>, /* OCP compliant interrupt */
420 <54>, /* TX interrupt */
421 <55>; /* RX interrupt */
422 interrupt-names = "common", "tx", "rx";
423 ti,buffer-size = <128>;
424 ti,hwmods = "mcbsp4";
427 dma-names = "tx", "rx";
430 mcbsp5: mcbsp@48096000 {
431 compatible = "ti,omap3-mcbsp";
432 reg = <0x48096000 0xff>;
434 interrupts = <27>, /* OCP compliant interrupt */
435 <81>, /* TX interrupt */
436 <82>; /* RX interrupt */
437 interrupt-names = "common", "tx", "rx";
438 ti,buffer-size = <128>;
439 ti,hwmods = "mcbsp5";
442 dma-names = "tx", "rx";
445 timer1: timer@48318000 {
446 compatible = "ti,omap3430-timer";
447 reg = <0x48318000 0x400>;
449 ti,hwmods = "timer1";
453 timer2: timer@49032000 {
454 compatible = "ti,omap3430-timer";
455 reg = <0x49032000 0x400>;
457 ti,hwmods = "timer2";
460 timer3: timer@49034000 {
461 compatible = "ti,omap3430-timer";
462 reg = <0x49034000 0x400>;
464 ti,hwmods = "timer3";
467 timer4: timer@49036000 {
468 compatible = "ti,omap3430-timer";
469 reg = <0x49036000 0x400>;
471 ti,hwmods = "timer4";
474 timer5: timer@49038000 {
475 compatible = "ti,omap3430-timer";
476 reg = <0x49038000 0x400>;
478 ti,hwmods = "timer5";
482 timer6: timer@4903a000 {
483 compatible = "ti,omap3430-timer";
484 reg = <0x4903a000 0x400>;
486 ti,hwmods = "timer6";
490 timer7: timer@4903c000 {
491 compatible = "ti,omap3430-timer";
492 reg = <0x4903c000 0x400>;
494 ti,hwmods = "timer7";
498 timer8: timer@4903e000 {
499 compatible = "ti,omap3430-timer";
500 reg = <0x4903e000 0x400>;
502 ti,hwmods = "timer8";
507 timer9: timer@49040000 {
508 compatible = "ti,omap3430-timer";
509 reg = <0x49040000 0x400>;
511 ti,hwmods = "timer9";
515 timer10: timer@48086000 {
516 compatible = "ti,omap3430-timer";
517 reg = <0x48086000 0x400>;
519 ti,hwmods = "timer10";
523 timer11: timer@48088000 {
524 compatible = "ti,omap3430-timer";
525 reg = <0x48088000 0x400>;
527 ti,hwmods = "timer11";
531 timer12: timer@48304000 {
532 compatible = "ti,omap3430-timer";
533 reg = <0x48304000 0x400>;
535 ti,hwmods = "timer12";
540 usbhstll: usbhstll@48062000 {
541 compatible = "ti,usbhs-tll";
542 reg = <0x48062000 0x1000>;
544 ti,hwmods = "usb_tll_hs";
547 usbhshost: usbhshost@48064000 {
548 compatible = "ti,usbhs-host";
549 reg = <0x48064000 0x400>;
550 ti,hwmods = "usb_host_hs";
551 #address-cells = <1>;
555 usbhsohci: ohci@48064400 {
556 compatible = "ti,ohci-omap3", "usb-ohci";
557 reg = <0x48064400 0x400>;
558 interrupt-parent = <&intc>;
562 usbhsehci: ehci@48064800 {
563 compatible = "ti,ehci-omap", "usb-ehci";
564 reg = <0x48064800 0x400>;
565 interrupt-parent = <&intc>;
570 gpmc: gpmc@6e000000 {
571 compatible = "ti,omap3430-gpmc";
573 reg = <0x6e000000 0x02d0>;
576 gpmc,num-waitpins = <4>;
577 #address-cells = <2>;
581 usb_otg_hs: usb_otg_hs@480ab000 {
582 compatible = "ti,omap3-musb";
583 reg = <0x480ab000 0x1000>;
584 interrupts = <92>, <93>;
585 interrupt-names = "mc", "dma";
586 ti,hwmods = "usb_otg_hs";