Merge branch 'core-locking-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / arch / arm / boot / dts / r8a73a4.dtsi
1 /*
2 * Device Tree Source for the r8a73a4 SoC
3 *
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Magnus Damm
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14
15 / {
16 compatible = "renesas,r8a73a4";
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
20
21 cpus {
22 #address-cells = <1>;
23 #size-cells = <0>;
24
25 cpu0: cpu@0 {
26 device_type = "cpu";
27 compatible = "arm,cortex-a15";
28 reg = <0>;
29 clock-frequency = <1500000000>;
30 };
31 };
32
33 timer {
34 compatible = "arm,armv7-timer";
35 interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
36 <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
37 <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
38 <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
39 };
40
41 dmac: dma-multiplexer {
42 compatible = "renesas,shdma-mux";
43 #dma-cells = <1>;
44 dma-channels = <20>;
45 dma-requests = <256>;
46 #address-cells = <2>;
47 #size-cells = <2>;
48 ranges;
49
50 dma0: dma-controller@e6700020 {
51 compatible = "renesas,shdma-r8a73a4";
52 reg = <0 0xe6700020 0 0x89e0>;
53 interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
54 0 200 IRQ_TYPE_LEVEL_HIGH
55 0 201 IRQ_TYPE_LEVEL_HIGH
56 0 202 IRQ_TYPE_LEVEL_HIGH
57 0 203 IRQ_TYPE_LEVEL_HIGH
58 0 204 IRQ_TYPE_LEVEL_HIGH
59 0 205 IRQ_TYPE_LEVEL_HIGH
60 0 206 IRQ_TYPE_LEVEL_HIGH
61 0 207 IRQ_TYPE_LEVEL_HIGH
62 0 208 IRQ_TYPE_LEVEL_HIGH
63 0 209 IRQ_TYPE_LEVEL_HIGH
64 0 210 IRQ_TYPE_LEVEL_HIGH
65 0 211 IRQ_TYPE_LEVEL_HIGH
66 0 212 IRQ_TYPE_LEVEL_HIGH
67 0 213 IRQ_TYPE_LEVEL_HIGH
68 0 214 IRQ_TYPE_LEVEL_HIGH
69 0 215 IRQ_TYPE_LEVEL_HIGH
70 0 216 IRQ_TYPE_LEVEL_HIGH
71 0 217 IRQ_TYPE_LEVEL_HIGH
72 0 218 IRQ_TYPE_LEVEL_HIGH
73 0 219 IRQ_TYPE_LEVEL_HIGH>;
74 interrupt-names = "error",
75 "ch0", "ch1", "ch2", "ch3",
76 "ch4", "ch5", "ch6", "ch7",
77 "ch8", "ch9", "ch10", "ch11",
78 "ch12", "ch13", "ch14", "ch15",
79 "ch16", "ch17", "ch18", "ch19";
80 };
81 };
82
83 pfc: pfc@e6050000 {
84 compatible = "renesas,pfc-r8a73a4";
85 reg = <0 0xe6050000 0 0x9000>;
86 gpio-controller;
87 #gpio-cells = <2>;
88 interrupts-extended =
89 <&irqc0 0 0>, <&irqc0 1 0>, <&irqc0 2 0>, <&irqc0 3 0>,
90 <&irqc0 4 0>, <&irqc0 5 0>, <&irqc0 6 0>, <&irqc0 7 0>,
91 <&irqc0 8 0>, <&irqc0 9 0>, <&irqc0 10 0>, <&irqc0 11 0>,
92 <&irqc0 12 0>, <&irqc0 13 0>, <&irqc0 14 0>, <&irqc0 15 0>,
93 <&irqc0 16 0>, <&irqc0 17 0>, <&irqc0 18 0>, <&irqc0 19 0>,
94 <&irqc0 20 0>, <&irqc0 21 0>, <&irqc0 22 0>, <&irqc0 23 0>,
95 <&irqc0 24 0>, <&irqc0 25 0>, <&irqc0 26 0>, <&irqc0 27 0>,
96 <&irqc0 28 0>, <&irqc0 29 0>, <&irqc0 30 0>, <&irqc0 31 0>,
97 <&irqc1 0 0>, <&irqc1 1 0>, <&irqc1 2 0>, <&irqc1 3 0>,
98 <&irqc1 4 0>, <&irqc1 5 0>, <&irqc1 6 0>, <&irqc1 7 0>,
99 <&irqc1 8 0>, <&irqc1 9 0>, <&irqc1 10 0>, <&irqc1 11 0>,
100 <&irqc1 12 0>, <&irqc1 13 0>, <&irqc1 14 0>, <&irqc1 15 0>,
101 <&irqc1 16 0>, <&irqc1 17 0>, <&irqc1 18 0>, <&irqc1 19 0>,
102 <&irqc1 20 0>, <&irqc1 21 0>, <&irqc1 22 0>, <&irqc1 23 0>,
103 <&irqc1 24 0>, <&irqc1 25 0>;
104 };
105
106 i2c5: i2c@e60b0000 {
107 #address-cells = <1>;
108 #size-cells = <0>;
109 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
110 reg = <0 0xe60b0000 0 0x428>;
111 interrupts = <0 179 IRQ_TYPE_LEVEL_HIGH>;
112
113 status = "disabled";
114 };
115
116 cmt1: timer@e6130000 {
117 compatible = "renesas,cmt-48-r8a73a4", "renesas,cmt-48-gen2";
118 reg = <0 0xe6130000 0 0x1004>;
119 interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>;
120
121 renesas,channels-mask = <0xff>;
122
123 status = "disabled";
124 };
125
126 irqc0: interrupt-controller@e61c0000 {
127 compatible = "renesas,irqc-r8a73a4", "renesas,irqc";
128 #interrupt-cells = <2>;
129 interrupt-controller;
130 reg = <0 0xe61c0000 0 0x200>;
131 interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
132 <0 1 IRQ_TYPE_LEVEL_HIGH>,
133 <0 2 IRQ_TYPE_LEVEL_HIGH>,
134 <0 3 IRQ_TYPE_LEVEL_HIGH>,
135 <0 4 IRQ_TYPE_LEVEL_HIGH>,
136 <0 5 IRQ_TYPE_LEVEL_HIGH>,
137 <0 6 IRQ_TYPE_LEVEL_HIGH>,
138 <0 7 IRQ_TYPE_LEVEL_HIGH>,
139 <0 8 IRQ_TYPE_LEVEL_HIGH>,
140 <0 9 IRQ_TYPE_LEVEL_HIGH>,
141 <0 10 IRQ_TYPE_LEVEL_HIGH>,
142 <0 11 IRQ_TYPE_LEVEL_HIGH>,
143 <0 12 IRQ_TYPE_LEVEL_HIGH>,
144 <0 13 IRQ_TYPE_LEVEL_HIGH>,
145 <0 14 IRQ_TYPE_LEVEL_HIGH>,
146 <0 15 IRQ_TYPE_LEVEL_HIGH>,
147 <0 16 IRQ_TYPE_LEVEL_HIGH>,
148 <0 17 IRQ_TYPE_LEVEL_HIGH>,
149 <0 18 IRQ_TYPE_LEVEL_HIGH>,
150 <0 19 IRQ_TYPE_LEVEL_HIGH>,
151 <0 20 IRQ_TYPE_LEVEL_HIGH>,
152 <0 21 IRQ_TYPE_LEVEL_HIGH>,
153 <0 22 IRQ_TYPE_LEVEL_HIGH>,
154 <0 23 IRQ_TYPE_LEVEL_HIGH>,
155 <0 24 IRQ_TYPE_LEVEL_HIGH>,
156 <0 25 IRQ_TYPE_LEVEL_HIGH>,
157 <0 26 IRQ_TYPE_LEVEL_HIGH>,
158 <0 27 IRQ_TYPE_LEVEL_HIGH>,
159 <0 28 IRQ_TYPE_LEVEL_HIGH>,
160 <0 29 IRQ_TYPE_LEVEL_HIGH>,
161 <0 30 IRQ_TYPE_LEVEL_HIGH>,
162 <0 31 IRQ_TYPE_LEVEL_HIGH>;
163 };
164
165 irqc1: interrupt-controller@e61c0200 {
166 compatible = "renesas,irqc-r8a73a4", "renesas,irqc";
167 #interrupt-cells = <2>;
168 interrupt-controller;
169 reg = <0 0xe61c0200 0 0x200>;
170 interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
171 <0 33 IRQ_TYPE_LEVEL_HIGH>,
172 <0 34 IRQ_TYPE_LEVEL_HIGH>,
173 <0 35 IRQ_TYPE_LEVEL_HIGH>,
174 <0 36 IRQ_TYPE_LEVEL_HIGH>,
175 <0 37 IRQ_TYPE_LEVEL_HIGH>,
176 <0 38 IRQ_TYPE_LEVEL_HIGH>,
177 <0 39 IRQ_TYPE_LEVEL_HIGH>,
178 <0 40 IRQ_TYPE_LEVEL_HIGH>,
179 <0 41 IRQ_TYPE_LEVEL_HIGH>,
180 <0 42 IRQ_TYPE_LEVEL_HIGH>,
181 <0 43 IRQ_TYPE_LEVEL_HIGH>,
182 <0 44 IRQ_TYPE_LEVEL_HIGH>,
183 <0 45 IRQ_TYPE_LEVEL_HIGH>,
184 <0 46 IRQ_TYPE_LEVEL_HIGH>,
185 <0 47 IRQ_TYPE_LEVEL_HIGH>,
186 <0 48 IRQ_TYPE_LEVEL_HIGH>,
187 <0 49 IRQ_TYPE_LEVEL_HIGH>,
188 <0 50 IRQ_TYPE_LEVEL_HIGH>,
189 <0 51 IRQ_TYPE_LEVEL_HIGH>,
190 <0 52 IRQ_TYPE_LEVEL_HIGH>,
191 <0 53 IRQ_TYPE_LEVEL_HIGH>,
192 <0 54 IRQ_TYPE_LEVEL_HIGH>,
193 <0 55 IRQ_TYPE_LEVEL_HIGH>,
194 <0 56 IRQ_TYPE_LEVEL_HIGH>,
195 <0 57 IRQ_TYPE_LEVEL_HIGH>;
196 };
197
198 thermal@e61f0000 {
199 compatible = "renesas,thermal-r8a73a4", "renesas,rcar-thermal";
200 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>,
201 <0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>;
202 interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
203 };
204
205 i2c0: i2c@e6500000 {
206 #address-cells = <1>;
207 #size-cells = <0>;
208 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
209 reg = <0 0xe6500000 0 0x428>;
210 interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
211 status = "disabled";
212 };
213
214 i2c1: i2c@e6510000 {
215 #address-cells = <1>;
216 #size-cells = <0>;
217 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
218 reg = <0 0xe6510000 0 0x428>;
219 interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
220 status = "disabled";
221 };
222
223 i2c2: i2c@e6520000 {
224 #address-cells = <1>;
225 #size-cells = <0>;
226 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
227 reg = <0 0xe6520000 0 0x428>;
228 interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>;
229 status = "disabled";
230 };
231
232 i2c3: i2c@e6530000 {
233 #address-cells = <1>;
234 #size-cells = <0>;
235 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
236 reg = <0 0xe6530000 0 0x428>;
237 interrupts = <0 177 IRQ_TYPE_LEVEL_HIGH>;
238 status = "disabled";
239 };
240
241 i2c4: i2c@e6540000 {
242 #address-cells = <1>;
243 #size-cells = <0>;
244 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
245 reg = <0 0xe6540000 0 0x428>;
246 interrupts = <0 178 IRQ_TYPE_LEVEL_HIGH>;
247 status = "disabled";
248 };
249
250 i2c6: i2c@e6550000 {
251 #address-cells = <1>;
252 #size-cells = <0>;
253 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
254 reg = <0 0xe6550000 0 0x428>;
255 interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
256 status = "disabled";
257 };
258
259 i2c7: i2c@e6560000 {
260 #address-cells = <1>;
261 #size-cells = <0>;
262 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
263 reg = <0 0xe6560000 0 0x428>;
264 interrupts = <0 185 IRQ_TYPE_LEVEL_HIGH>;
265 status = "disabled";
266 };
267
268 i2c8: i2c@e6570000 {
269 #address-cells = <1>;
270 #size-cells = <0>;
271 compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
272 reg = <0 0xe6570000 0 0x428>;
273 interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
274 status = "disabled";
275 };
276
277 scifb0: serial@e6c20000 {
278 compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
279 reg = <0 0xe6c20000 0 0x100>;
280 interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>;
281 status = "disabled";
282 };
283
284 scifb1: serial@e6c30000 {
285 compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
286 reg = <0 0xe6c30000 0 0x100>;
287 interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>;
288 status = "disabled";
289 };
290
291 scifa0: serial@e6c40000 {
292 compatible = "renesas,scifa-r8a73a4", "renesas,scifa";
293 reg = <0 0xe6c40000 0 0x100>;
294 interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
295 status = "disabled";
296 };
297
298 scifa1: serial@e6c50000 {
299 compatible = "renesas,scifa-r8a73a4", "renesas,scifa";
300 reg = <0 0xe6c50000 0 0x100>;
301 interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>;
302 status = "disabled";
303 };
304
305 scifb2: serial@e6ce0000 {
306 compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
307 reg = <0 0xe6ce0000 0 0x100>;
308 interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>;
309 status = "disabled";
310 };
311
312 scifb3: serial@e6cf0000 {
313 compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
314 reg = <0 0xe6cf0000 0 0x100>;
315 interrupts = <0 151 IRQ_TYPE_LEVEL_HIGH>;
316 status = "disabled";
317 };
318
319 sdhi0: sd@ee100000 {
320 compatible = "renesas,sdhi-r8a73a4";
321 reg = <0 0xee100000 0 0x100>;
322 interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
323 cap-sd-highspeed;
324 status = "disabled";
325 };
326
327 sdhi1: sd@ee120000 {
328 compatible = "renesas,sdhi-r8a73a4";
329 reg = <0 0xee120000 0 0x100>;
330 interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
331 cap-sd-highspeed;
332 status = "disabled";
333 };
334
335 sdhi2: sd@ee140000 {
336 compatible = "renesas,sdhi-r8a73a4";
337 reg = <0 0xee140000 0 0x100>;
338 interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
339 cap-sd-highspeed;
340 status = "disabled";
341 };
342
343 mmcif0: mmc@ee200000 {
344 compatible = "renesas,sh-mmcif";
345 reg = <0 0xee200000 0 0x80>;
346 interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
347 reg-io-width = <4>;
348 status = "disabled";
349 };
350
351 mmcif1: mmc@ee220000 {
352 compatible = "renesas,sh-mmcif";
353 reg = <0 0xee220000 0 0x80>;
354 interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
355 reg-io-width = <4>;
356 status = "disabled";
357 };
358
359 gic: interrupt-controller@f1001000 {
360 compatible = "arm,cortex-a15-gic";
361 #interrupt-cells = <3>;
362 #address-cells = <0>;
363 interrupt-controller;
364 reg = <0 0xf1001000 0 0x1000>,
365 <0 0xf1002000 0 0x1000>,
366 <0 0xf1004000 0 0x2000>,
367 <0 0xf1006000 0 0x2000>;
368 interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
369 };
370 };
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