arch/arm/boot/dts/r8a7778.dtsi

   1 /*
   2  * Device Tree Source for Renesas r8a7778
   3  *
   4  * Copyright (C) 2013  Renesas Solutions Corp.
   5  * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
   6  *
   7  * based on r8a7779
   8  *
   9  * Copyright (C) 2013 Renesas Solutions Corp.
  10  * Copyright (C) 2013 Simon Horman
  11  *
  12  * This file is licensed under the terms of the GNU General Public License
  13  * version 2.  This program is licensed "as is" without any warranty of any
  14  * kind, whether express or implied.
  15  */
  16
  17 /include/ "skeleton.dtsi"
  18
  19 / {
  20         compatible = "renesas,r8a7778";
  21
  22         cpus {
  23                 cpu@0 {
  24                         compatible = "arm,cortex-a9";
  25                 };
  26         };
  27
  28         aliases {
  29                 spi0 = &hspi0;
  30                 spi1 = &hspi1;
  31                 spi2 = &hspi2;
  32         };
  33
  34         gic: interrupt-controller@fe438000 {
  35                 compatible = "arm,cortex-a9-gic";
  36                 #interrupt-cells = <3>;
  37                 interrupt-controller;
  38                 reg = <0xfe438000 0x1000>,
  39                       <0xfe430000 0x100>;
  40         };
  41
  42         /* irqpin: IRQ0 - IRQ3 */
  43         irqpin: irqpin@fe78001c {
  44                 compatible = "renesas,intc-irqpin";
  45                 #interrupt-cells = <2>;
  46                 interrupt-controller;
  47                 status = "disabled"; /* default off */
  48                 reg =   <0xfe78001c 4>,
  49                         <0xfe780010 4>,
  50                         <0xfe780024 4>,
  51                         <0xfe780044 4>,
  52                         <0xfe780064 4>;
  53                 interrupt-parent = <&gic>;
  54                 interrupts =   <0 27 0x4
  55                                 0 28 0x4
  56                                 0 29 0x4
  57                                 0 30 0x4>;
  58                 sense-bitfield-width = <2>;
  59         };
  60
  61         gpio0: gpio@ffc40000 {
  62                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
  63                 reg = <0xffc40000 0x2c>;
  64                 interrupt-parent = <&gic>;
  65                 interrupts = <0 103 0x4>;
  66                 #gpio-cells = <2>;
  67                 gpio-controller;
  68                 gpio-ranges = <&pfc 0 0 32>;
  69                 #interrupt-cells = <2>;
  70                 interrupt-controller;
  71         };
  72
  73         gpio1: gpio@ffc41000 {
  74                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
  75                 reg = <0xffc41000 0x2c>;
  76                 interrupt-parent = <&gic>;
  77                 interrupts = <0 103 0x4>;
  78                 #gpio-cells = <2>;
  79                 gpio-controller;
  80                 gpio-ranges = <&pfc 0 32 32>;
  81                 #interrupt-cells = <2>;
  82                 interrupt-controller;
  83         };
  84
  85         gpio2: gpio@ffc42000 {
  86                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
  87                 reg = <0xffc42000 0x2c>;
  88                 interrupt-parent = <&gic>;
  89                 interrupts = <0 103 0x4>;
  90                 #gpio-cells = <2>;
  91                 gpio-controller;
  92                 gpio-ranges = <&pfc 0 64 32>;
  93                 #interrupt-cells = <2>;
  94                 interrupt-controller;
  95         };
  96
  97         gpio3: gpio@ffc43000 {
  98                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
  99                 reg = <0xffc43000 0x2c>;
 100                 interrupt-parent = <&gic>;
 101                 interrupts = <0 103 0x4>;
 102                 #gpio-cells = <2>;
 103                 gpio-controller;
 104                 gpio-ranges = <&pfc 0 96 32>;
 105                 #interrupt-cells = <2>;
 106                 interrupt-controller;
 107         };
 108
 109         gpio4: gpio@ffc44000 {
 110                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
 111                 reg = <0xffc44000 0x2c>;
 112                 interrupt-parent = <&gic>;
 113                 interrupts = <0 103 0x4>;
 114                 #gpio-cells = <2>;
 115                 gpio-controller;
 116                 gpio-ranges = <&pfc 0 128 27>;
 117                 #interrupt-cells = <2>;
 118                 interrupt-controller;
 119         };
 120
 121         pfc: pfc@fffc0000 {
 122                 compatible = "renesas,pfc-r8a7778";
 123                 reg = <0xfffc0000 0x118>;
 124         };
 125
 126         i2c0: i2c@ffc70000 {
 127                 #address-cells = <1>;
 128                 #size-cells = <0>;
 129                 compatible = "renesas,i2c-r8a7778";
 130                 reg = <0xffc70000 0x1000>;
 131                 interrupt-parent = <&gic>;
 132                 interrupts = <0 67 0x4>;
 133                 status = "disabled";
 134         };
 135
 136         i2c1: i2c@ffc71000 {
 137                 #address-cells = <1>;
 138                 #size-cells = <0>;
 139                 compatible = "renesas,i2c-r8a7778";
 140                 reg = <0xffc71000 0x1000>;
 141                 interrupt-parent = <&gic>;
 142                 interrupts = <0 78 0x4>;
 143                 status = "disabled";
 144         };
 145
 146         i2c2: i2c@ffc72000 {
 147                 #address-cells = <1>;
 148                 #size-cells = <0>;
 149                 compatible = "renesas,i2c-r8a7778";
 150                 reg = <0xffc72000 0x1000>;
 151                 interrupt-parent = <&gic>;
 152                 interrupts = <0 76 0x4>;
 153                 status = "disabled";
 154         };
 155
 156         i2c3: i2c@ffc73000 {
 157                 #address-cells = <1>;
 158                 #size-cells = <0>;
 159                 compatible = "renesas,i2c-r8a7778";
 160                 reg = <0xffc73000 0x1000>;
 161                 interrupt-parent = <&gic>;
 162                 interrupts = <0 77 0x4>;
 163                 status = "disabled";
 164         };
 165
 166         mmcif: mmc@ffe4e000 {
 167                 compatible = "renesas,sh-mmcif";
 168                 reg = <0xffe4e000 0x100>;
 169                 interrupt-parent = <&gic>;
 170                 interrupts = <0 61 4>;
 171                 status = "disabled";
 172         };
 173
 174         sdhi0: sd@ffe4c000 {
 175                 compatible = "renesas,sdhi-r8a7778";
 176                 reg = <0xffe4c000 0x100>;
 177                 interrupt-parent = <&gic>;
 178                 interrupts = <0 87 4>;
 179                 cap-sd-highspeed;
 180                 cap-sdio-irq;
 181                 status = "disabled";
 182         };
 183
 184         sdhi1: sd@ffe4d000 {
 185                 compatible = "renesas,sdhi-r8a7778";
 186                 reg = <0xffe4d000 0x100>;
 187                 interrupt-parent = <&gic>;
 188                 interrupts = <0 88 4>;
 189                 cap-sd-highspeed;
 190                 cap-sdio-irq;
 191                 status = "disabled";
 192         };
 193
 194         sdhi2: sd@ffe4f000 {
 195                 compatible = "renesas,sdhi-r8a7778";
 196                 reg = <0xffe4f000 0x100>;
 197                 interrupt-parent = <&gic>;
 198                 interrupts = <0 86 4>;
 199                 cap-sd-highspeed;
 200                 cap-sdio-irq;
 201                 status = "disabled";
 202         };
 203
 204         i2c0: i2c@ffc70000 {
 205                 #address-cells = <1>;
 206                 #size-cells = <0>;
 207                 compatible = "renesas,i2c-r8a7778";
 208                 reg = <0xffc70000 0x1000>;
 209                 interrupt-parent = <&gic>;
 210                 interrupts = <0 67 0x4>;
 211                 status = "disabled";
 212         };
 213
 214         i2c1: i2c@ffc71000 {
 215                 #address-cells = <1>;
 216                 #size-cells = <0>;
 217                 compatible = "renesas,i2c-r8a7778";
 218                 reg = <0xffc71000 0x1000>;
 219                 interrupt-parent = <&gic>;
 220                 interrupts = <0 78 0x4>;
 221                 status = "disabled";
 222         };
 223
 224         i2c2: i2c@ffc72000 {
 225                 #address-cells = <1>;
 226                 #size-cells = <0>;
 227                 compatible = "renesas,i2c-r8a7778";
 228                 reg = <0xffc72000 0x1000>;
 229                 interrupt-parent = <&gic>;
 230                 interrupts = <0 76 0x4>;
 231                 status = "disabled";
 232         };
 233
 234         i2c3: i2c@ffc73000 {
 235                 #address-cells = <1>;
 236                 #size-cells = <0>;
 237                 compatible = "renesas,i2c-r8a7778";
 238                 reg = <0xffc73000 0x1000>;
 239                 interrupt-parent = <&gic>;
 240                 interrupts = <0 77 0x4>;
 241                 status = "disabled";
 242         };
 243
 244         hspi0: spi@fffc7000 {
 245                 compatible = "renesas,hspi";
 246                 reg = <0xfffc7000 0x18>;
 247                 interrupt-controller = <&gic>;
 248                 interrupts = <0 63 4>;
 249                 status = "disabled";
 250         };
 251
 252         hspi1: spi@fffc8000 {
 253                 compatible = "renesas,hspi";
 254                 reg = <0xfffc8000 0x18>;
 255                 interrupt-controller = <&gic>;
 256                 interrupts = <0 84 4>;
 257                 status = "disabled";
 258         };
 259
 260         hspi2: spi@fffc6000 {
 261                 compatible = "renesas,hspi";
 262                 reg = <0xfffc6000 0x18>;
 263                 interrupt-controller = <&gic>;
 264                 interrupts = <0 85 4>;
 265                 status = "disabled";
 266         };
 267 };