arch/arm/boot/dts/r8a7778.dtsi

   1 /*
   2  * Device Tree Source for Renesas r8a7778
   3  *
   4  * Copyright (C) 2013  Renesas Solutions Corp.
   5  * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
   6  *
   7  * based on r8a7779
   8  *
   9  * Copyright (C) 2013 Renesas Solutions Corp.
  10  * Copyright (C) 2013 Simon Horman
  11  *
  12  * This file is licensed under the terms of the GNU General Public License
  13  * version 2.  This program is licensed "as is" without any warranty of any
  14  * kind, whether express or implied.
  15  */
  16
  17 /include/ "skeleton.dtsi"
  18
  19 #include <dt-bindings/interrupt-controller/irq.h>
  20
  21 / {
  22         compatible = "renesas,r8a7778";
  23         interrupt-parent = <&gic>;
  24
  25         cpus {
  26                 #address-cells = <1>;
  27                 #size-cells = <0>;
  28
  29                 cpu@0 {
  30                         device_type = "cpu";
  31                         compatible = "arm,cortex-a9";
  32                         reg = <0>;
  33                         clock-frequency = <800000000>;
  34                 };
  35         };
  36
  37         aliases {
  38                 spi0 = &hspi0;
  39                 spi1 = &hspi1;
  40                 spi2 = &hspi2;
  41         };
  42
  43         gic: interrupt-controller@fe438000 {
  44                 compatible = "arm,cortex-a9-gic";
  45                 #interrupt-cells = <3>;
  46                 interrupt-controller;
  47                 reg = <0xfe438000 0x1000>,
  48                       <0xfe430000 0x100>;
  49         };
  50
  51         /* irqpin: IRQ0 - IRQ3 */
  52         irqpin: irqpin@fe78001c {
  53                 compatible = "renesas,intc-irqpin-r8a7778", "renesas,intc-irqpin";
  54                 #interrupt-cells = <2>;
  55                 interrupt-controller;
  56                 status = "disabled"; /* default off */
  57                 reg =   <0xfe78001c 4>,
  58                         <0xfe780010 4>,
  59                         <0xfe780024 4>,
  60                         <0xfe780044 4>,
  61                         <0xfe780064 4>;
  62                 interrupts =   <0 27 IRQ_TYPE_LEVEL_HIGH
  63                                 0 28 IRQ_TYPE_LEVEL_HIGH
  64                                 0 29 IRQ_TYPE_LEVEL_HIGH
  65                                 0 30 IRQ_TYPE_LEVEL_HIGH>;
  66                 sense-bitfield-width = <2>;
  67         };
  68
  69         gpio0: gpio@ffc40000 {
  70                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
  71                 reg = <0xffc40000 0x2c>;
  72                 interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
  73                 #gpio-cells = <2>;
  74                 gpio-controller;
  75                 gpio-ranges = <&pfc 0 0 32>;
  76                 #interrupt-cells = <2>;
  77                 interrupt-controller;
  78         };
  79
  80         gpio1: gpio@ffc41000 {
  81                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
  82                 reg = <0xffc41000 0x2c>;
  83                 interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
  84                 #gpio-cells = <2>;
  85                 gpio-controller;
  86                 gpio-ranges = <&pfc 0 32 32>;
  87                 #interrupt-cells = <2>;
  88                 interrupt-controller;
  89         };
  90
  91         gpio2: gpio@ffc42000 {
  92                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
  93                 reg = <0xffc42000 0x2c>;
  94                 interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
  95                 #gpio-cells = <2>;
  96                 gpio-controller;
  97                 gpio-ranges = <&pfc 0 64 32>;
  98                 #interrupt-cells = <2>;
  99                 interrupt-controller;
 100         };
 101
 102         gpio3: gpio@ffc43000 {
 103                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
 104                 reg = <0xffc43000 0x2c>;
 105                 interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
 106                 #gpio-cells = <2>;
 107                 gpio-controller;
 108                 gpio-ranges = <&pfc 0 96 32>;
 109                 #interrupt-cells = <2>;
 110                 interrupt-controller;
 111         };
 112
 113         gpio4: gpio@ffc44000 {
 114                 compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
 115                 reg = <0xffc44000 0x2c>;
 116                 interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
 117                 #gpio-cells = <2>;
 118                 gpio-controller;
 119                 gpio-ranges = <&pfc 0 128 27>;
 120                 #interrupt-cells = <2>;
 121                 interrupt-controller;
 122         };
 123
 124         pfc: pfc@fffc0000 {
 125                 compatible = "renesas,pfc-r8a7778";
 126                 reg = <0xfffc0000 0x118>;
 127         };
 128
 129         i2c0: i2c@ffc70000 {
 130                 #address-cells = <1>;
 131                 #size-cells = <0>;
 132                 compatible = "renesas,i2c-r8a7778";
 133                 reg = <0xffc70000 0x1000>;
 134                 interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
 135                 status = "disabled";
 136         };
 137
 138         i2c1: i2c@ffc71000 {
 139                 #address-cells = <1>;
 140                 #size-cells = <0>;
 141                 compatible = "renesas,i2c-r8a7778";
 142                 reg = <0xffc71000 0x1000>;
 143                 interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
 144                 status = "disabled";
 145         };
 146
 147         i2c2: i2c@ffc72000 {
 148                 #address-cells = <1>;
 149                 #size-cells = <0>;
 150                 compatible = "renesas,i2c-r8a7778";
 151                 reg = <0xffc72000 0x1000>;
 152                 interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
 153                 status = "disabled";
 154         };
 155
 156         i2c3: i2c@ffc73000 {
 157                 #address-cells = <1>;
 158                 #size-cells = <0>;
 159                 compatible = "renesas,i2c-r8a7778";
 160                 reg = <0xffc73000 0x1000>;
 161                 interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>;
 162                 status = "disabled";
 163         };
 164
 165         tmu0: timer@ffd80000 {
 166                 compatible = "renesas,tmu-r8a7778", "renesas,tmu";
 167                 reg = <0xffd80000 0x30>;
 168                 interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
 169                              <0 33 IRQ_TYPE_LEVEL_HIGH>,
 170                              <0 34 IRQ_TYPE_LEVEL_HIGH>;
 171
 172                 #renesas,channels = <3>;
 173
 174                 status = "disabled";
 175         };
 176
 177         tmu1: timer@ffd81000 {
 178                 compatible = "renesas,tmu-r8a7778", "renesas,tmu";
 179                 reg = <0xffd81000 0x30>;
 180                 interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>,
 181                              <0 37 IRQ_TYPE_LEVEL_HIGH>,
 182                              <0 38 IRQ_TYPE_LEVEL_HIGH>;
 183
 184                 #renesas,channels = <3>;
 185
 186                 status = "disabled";
 187         };
 188
 189         tmu2: timer@ffd82000 {
 190                 compatible = "renesas,tmu-r8a7778", "renesas,tmu";
 191                 reg = <0xffd82000 0x30>;
 192                 interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>,
 193                              <0 41 IRQ_TYPE_LEVEL_HIGH>,
 194                              <0 42 IRQ_TYPE_LEVEL_HIGH>;
 195
 196                 #renesas,channels = <3>;
 197
 198                 status = "disabled";
 199         };
 200
 201         scif0: serial@ffe40000 {
 202                 compatible = "renesas,scif-r8a7778", "renesas,scif";
 203                 reg = <0xffe40000 0x100>;
 204                 interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>;
 205                 status = "disabled";
 206         };
 207
 208         scif1: serial@ffe41000 {
 209                 compatible = "renesas,scif-r8a7778", "renesas,scif";
 210                 reg = <0xffe41000 0x100>;
 211                 interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>;
 212                 status = "disabled";
 213         };
 214
 215         scif2: serial@ffe42000 {
 216                 compatible = "renesas,scif-r8a7778", "renesas,scif";
 217                 reg = <0xffe42000 0x100>;
 218                 interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>;
 219                 status = "disabled";
 220         };
 221
 222         scif3: serial@ffe43000 {
 223                 compatible = "renesas,scif-r8a7778", "renesas,scif";
 224                 reg = <0xffe43000 0x100>;
 225                 interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
 226                 status = "disabled";
 227         };
 228
 229         scif4: serial@ffe44000 {
 230                 compatible = "renesas,scif-r8a7778", "renesas,scif";
 231                 reg = <0xffe44000 0x100>;
 232                 interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
 233                 status = "disabled";
 234         };
 235
 236         scif5: serial@ffe45000 {
 237                 compatible = "renesas,scif-r8a7778", "renesas,scif";
 238                 reg = <0xffe45000 0x100>;
 239                 interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
 240                 status = "disabled";
 241         };
 242
 243         mmcif: mmc@ffe4e000 {
 244                 compatible = "renesas,sh-mmcif";
 245                 reg = <0xffe4e000 0x100>;
 246                 interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
 247                 status = "disabled";
 248         };
 249
 250         sdhi0: sd@ffe4c000 {
 251                 compatible = "renesas,sdhi-r8a7778";
 252                 reg = <0xffe4c000 0x100>;
 253                 interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>;
 254                 status = "disabled";
 255         };
 256
 257         sdhi1: sd@ffe4d000 {
 258                 compatible = "renesas,sdhi-r8a7778";
 259                 reg = <0xffe4d000 0x100>;
 260                 interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>;
 261                 status = "disabled";
 262         };
 263
 264         sdhi2: sd@ffe4f000 {
 265                 compatible = "renesas,sdhi-r8a7778";
 266                 reg = <0xffe4f000 0x100>;
 267                 interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
 268                 status = "disabled";
 269         };
 270
 271         hspi0: spi@fffc7000 {
 272                 compatible = "renesas,hspi-r8a7778", "renesas,hspi";
 273                 reg = <0xfffc7000 0x18>;
 274                 interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
 275                 #address-cells = <1>;
 276                 #size-cells = <0>;
 277                 status = "disabled";
 278         };
 279
 280         hspi1: spi@fffc8000 {
 281                 compatible = "renesas,hspi-r8a7778", "renesas,hspi";
 282                 reg = <0xfffc8000 0x18>;
 283                 interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
 284                 #address-cells = <1>;
 285                 #size-cells = <0>;
 286                 status = "disabled";
 287         };
 288
 289         hspi2: spi@fffc6000 {
 290                 compatible = "renesas,hspi-r8a7778", "renesas,hspi";
 291                 reg = <0xfffc6000 0x18>;
 292                 interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
 293                 #address-cells = <1>;
 294                 #size-cells = <0>;
 295                 status = "disabled";
 296         };
 297 };