2 * Device Tree Source for the r8a7790 SoC
4 * Copyright (C) 2015 Renesas Electronics Corporation
5 * Copyright (C) 2013-2014 Renesas Solutions Corp.
6 * Copyright (C) 2014 Cogent Embedded Inc.
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
13 #include <dt-bindings/clock/r8a7790-clock.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/power/r8a7790-sysc.h>
19 compatible = "renesas,r8a7790";
20 interrupt-parent = <&gic>;
47 enable-method = "renesas,apmu";
51 compatible = "arm,cortex-a15";
53 clock-frequency = <1300000000>;
54 voltage-tolerance = <1>; /* 1% */
55 clocks = <&cpg_clocks R8A7790_CLK_Z>;
56 clock-latency = <300000>; /* 300 us */
57 power-domains = <&sysc R8A7790_PD_CA15_CPU0>;
58 next-level-cache = <&L2_CA15>;
60 /* kHz - uV - OPPs unknown yet */
61 operating-points = <1400000 1000000>,
71 compatible = "arm,cortex-a15";
73 clock-frequency = <1300000000>;
74 power-domains = <&sysc R8A7790_PD_CA15_CPU1>;
75 next-level-cache = <&L2_CA15>;
80 compatible = "arm,cortex-a15";
82 clock-frequency = <1300000000>;
83 power-domains = <&sysc R8A7790_PD_CA15_CPU2>;
84 next-level-cache = <&L2_CA15>;
89 compatible = "arm,cortex-a15";
91 clock-frequency = <1300000000>;
92 power-domains = <&sysc R8A7790_PD_CA15_CPU3>;
93 next-level-cache = <&L2_CA15>;
98 compatible = "arm,cortex-a7";
100 clock-frequency = <780000000>;
101 power-domains = <&sysc R8A7790_PD_CA7_CPU0>;
102 next-level-cache = <&L2_CA7>;
107 compatible = "arm,cortex-a7";
109 clock-frequency = <780000000>;
110 power-domains = <&sysc R8A7790_PD_CA7_CPU1>;
111 next-level-cache = <&L2_CA7>;
116 compatible = "arm,cortex-a7";
118 clock-frequency = <780000000>;
119 power-domains = <&sysc R8A7790_PD_CA7_CPU2>;
120 next-level-cache = <&L2_CA7>;
125 compatible = "arm,cortex-a7";
127 clock-frequency = <780000000>;
128 power-domains = <&sysc R8A7790_PD_CA7_CPU3>;
129 next-level-cache = <&L2_CA7>;
132 L2_CA15: cache-controller@0 {
133 compatible = "cache";
135 power-domains = <&sysc R8A7790_PD_CA15_SCU>;
140 L2_CA7: cache-controller@100 {
141 compatible = "cache";
143 power-domains = <&sysc R8A7790_PD_CA7_SCU>;
150 cpu_thermal: cpu-thermal {
151 polling-delay-passive = <0>;
154 thermal-sensors = <&thermal>;
158 temperature = <115000>;
169 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
170 reg = <0 0xe6151000 0 0x188>;
171 cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
175 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
176 reg = <0 0xe6152000 0 0x188>;
177 cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
180 gic: interrupt-controller@f1001000 {
181 compatible = "arm,gic-400";
182 #interrupt-cells = <3>;
183 #address-cells = <0>;
184 interrupt-controller;
185 reg = <0 0xf1001000 0 0x1000>,
186 <0 0xf1002000 0 0x1000>,
187 <0 0xf1004000 0 0x2000>,
188 <0 0xf1006000 0 0x2000>;
189 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
192 gpio0: gpio@e6050000 {
193 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
194 reg = <0 0xe6050000 0 0x50>;
195 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
198 gpio-ranges = <&pfc 0 0 32>;
199 #interrupt-cells = <2>;
200 interrupt-controller;
201 clocks = <&mstp9_clks R8A7790_CLK_GPIO0>;
202 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
205 gpio1: gpio@e6051000 {
206 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
207 reg = <0 0xe6051000 0 0x50>;
208 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
211 gpio-ranges = <&pfc 0 32 30>;
212 #interrupt-cells = <2>;
213 interrupt-controller;
214 clocks = <&mstp9_clks R8A7790_CLK_GPIO1>;
215 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
218 gpio2: gpio@e6052000 {
219 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
220 reg = <0 0xe6052000 0 0x50>;
221 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
224 gpio-ranges = <&pfc 0 64 30>;
225 #interrupt-cells = <2>;
226 interrupt-controller;
227 clocks = <&mstp9_clks R8A7790_CLK_GPIO2>;
228 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
231 gpio3: gpio@e6053000 {
232 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
233 reg = <0 0xe6053000 0 0x50>;
234 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
237 gpio-ranges = <&pfc 0 96 32>;
238 #interrupt-cells = <2>;
239 interrupt-controller;
240 clocks = <&mstp9_clks R8A7790_CLK_GPIO3>;
241 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
244 gpio4: gpio@e6054000 {
245 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
246 reg = <0 0xe6054000 0 0x50>;
247 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
250 gpio-ranges = <&pfc 0 128 32>;
251 #interrupt-cells = <2>;
252 interrupt-controller;
253 clocks = <&mstp9_clks R8A7790_CLK_GPIO4>;
254 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
257 gpio5: gpio@e6055000 {
258 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
259 reg = <0 0xe6055000 0 0x50>;
260 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
263 gpio-ranges = <&pfc 0 160 32>;
264 #interrupt-cells = <2>;
265 interrupt-controller;
266 clocks = <&mstp9_clks R8A7790_CLK_GPIO5>;
267 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
270 thermal: thermal@e61f0000 {
271 compatible = "renesas,thermal-r8a7790",
272 "renesas,rcar-gen2-thermal",
273 "renesas,rcar-thermal";
274 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
275 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
276 clocks = <&mstp5_clks R8A7790_CLK_THERMAL>;
277 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
278 #thermal-sensor-cells = <0>;
282 compatible = "arm,armv7-timer";
283 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
284 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
285 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
286 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
289 cmt0: timer@ffca0000 {
290 compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
291 reg = <0 0xffca0000 0 0x1004>;
292 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
293 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
294 clocks = <&mstp1_clks R8A7790_CLK_CMT0>;
296 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
298 renesas,channels-mask = <0x60>;
303 cmt1: timer@e6130000 {
304 compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
305 reg = <0 0xe6130000 0 0x1004>;
306 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
307 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
308 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
309 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
310 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
311 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
312 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
313 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
314 clocks = <&mstp3_clks R8A7790_CLK_CMT1>;
316 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
318 renesas,channels-mask = <0xff>;
323 irqc0: interrupt-controller@e61c0000 {
324 compatible = "renesas,irqc-r8a7790", "renesas,irqc";
325 #interrupt-cells = <2>;
326 interrupt-controller;
327 reg = <0 0xe61c0000 0 0x200>;
328 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
329 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
330 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
331 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
332 clocks = <&mstp4_clks R8A7790_CLK_IRQC>;
333 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
336 dmac0: dma-controller@e6700000 {
337 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
338 reg = <0 0xe6700000 0 0x20000>;
339 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
340 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
341 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
342 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
343 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
344 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
345 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
346 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
347 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
348 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
349 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
350 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
351 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
352 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
353 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
354 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
355 interrupt-names = "error",
356 "ch0", "ch1", "ch2", "ch3",
357 "ch4", "ch5", "ch6", "ch7",
358 "ch8", "ch9", "ch10", "ch11",
359 "ch12", "ch13", "ch14";
360 clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC0>;
362 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
367 dmac1: dma-controller@e6720000 {
368 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
369 reg = <0 0xe6720000 0 0x20000>;
370 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
371 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
372 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
373 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
374 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
375 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
376 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
377 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
378 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
379 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
380 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
381 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
382 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
383 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
384 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
385 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
386 interrupt-names = "error",
387 "ch0", "ch1", "ch2", "ch3",
388 "ch4", "ch5", "ch6", "ch7",
389 "ch8", "ch9", "ch10", "ch11",
390 "ch12", "ch13", "ch14";
391 clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC1>;
393 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
398 audma0: dma-controller@ec700000 {
399 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
400 reg = <0 0xec700000 0 0x10000>;
401 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
402 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
403 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
404 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
405 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
406 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
407 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
408 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
409 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
410 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
411 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
412 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
413 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
414 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
415 interrupt-names = "error",
416 "ch0", "ch1", "ch2", "ch3",
417 "ch4", "ch5", "ch6", "ch7",
418 "ch8", "ch9", "ch10", "ch11",
420 clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC0>;
422 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
427 audma1: dma-controller@ec720000 {
428 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
429 reg = <0 0xec720000 0 0x10000>;
430 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
431 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
432 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
433 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
434 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
435 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
436 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
437 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
438 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
439 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
440 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
441 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
442 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
443 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
444 interrupt-names = "error",
445 "ch0", "ch1", "ch2", "ch3",
446 "ch4", "ch5", "ch6", "ch7",
447 "ch8", "ch9", "ch10", "ch11",
449 clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC1>;
451 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
456 usb_dmac0: dma-controller@e65a0000 {
457 compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
458 reg = <0 0xe65a0000 0 0x100>;
459 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
460 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
461 interrupt-names = "ch0", "ch1";
462 clocks = <&mstp3_clks R8A7790_CLK_USBDMAC0>;
463 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
468 usb_dmac1: dma-controller@e65b0000 {
469 compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
470 reg = <0 0xe65b0000 0 0x100>;
471 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
472 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
473 interrupt-names = "ch0", "ch1";
474 clocks = <&mstp3_clks R8A7790_CLK_USBDMAC1>;
475 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
481 #address-cells = <1>;
483 compatible = "renesas,i2c-r8a7790";
484 reg = <0 0xe6508000 0 0x40>;
485 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
486 clocks = <&mstp9_clks R8A7790_CLK_I2C0>;
487 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
488 i2c-scl-internal-delay-ns = <110>;
493 #address-cells = <1>;
495 compatible = "renesas,i2c-r8a7790";
496 reg = <0 0xe6518000 0 0x40>;
497 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
498 clocks = <&mstp9_clks R8A7790_CLK_I2C1>;
499 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
500 i2c-scl-internal-delay-ns = <6>;
505 #address-cells = <1>;
507 compatible = "renesas,i2c-r8a7790";
508 reg = <0 0xe6530000 0 0x40>;
509 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
510 clocks = <&mstp9_clks R8A7790_CLK_I2C2>;
511 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
512 i2c-scl-internal-delay-ns = <6>;
517 #address-cells = <1>;
519 compatible = "renesas,i2c-r8a7790";
520 reg = <0 0xe6540000 0 0x40>;
521 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
522 clocks = <&mstp9_clks R8A7790_CLK_I2C3>;
523 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
524 i2c-scl-internal-delay-ns = <110>;
529 #address-cells = <1>;
531 compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
532 reg = <0 0xe6500000 0 0x425>;
533 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
534 clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
535 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
536 <&dmac1 0x61>, <&dmac1 0x62>;
537 dma-names = "tx", "rx", "tx", "rx";
538 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
543 #address-cells = <1>;
545 compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
546 reg = <0 0xe6510000 0 0x425>;
547 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
548 clocks = <&mstp3_clks R8A7790_CLK_IIC1>;
549 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
550 <&dmac1 0x65>, <&dmac1 0x66>;
551 dma-names = "tx", "rx", "tx", "rx";
552 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
557 #address-cells = <1>;
559 compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
560 reg = <0 0xe6520000 0 0x425>;
561 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
562 clocks = <&mstp3_clks R8A7790_CLK_IIC2>;
563 dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
564 <&dmac1 0x69>, <&dmac1 0x6a>;
565 dma-names = "tx", "rx", "tx", "rx";
566 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
571 #address-cells = <1>;
573 compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
574 reg = <0 0xe60b0000 0 0x425>;
575 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
576 clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>;
577 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
578 <&dmac1 0x77>, <&dmac1 0x78>;
579 dma-names = "tx", "rx", "tx", "rx";
580 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
584 mmcif0: mmc@ee200000 {
585 compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
586 reg = <0 0xee200000 0 0x80>;
587 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
588 clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>;
589 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
590 <&dmac1 0xd1>, <&dmac1 0xd2>;
591 dma-names = "tx", "rx", "tx", "rx";
592 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
595 max-frequency = <97500000>;
598 mmcif1: mmc@ee220000 {
599 compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
600 reg = <0 0xee220000 0 0x80>;
601 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
602 clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>;
603 dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
604 <&dmac1 0xe1>, <&dmac1 0xe2>;
605 dma-names = "tx", "rx", "tx", "rx";
606 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
609 max-frequency = <97500000>;
613 compatible = "renesas,pfc-r8a7790";
614 reg = <0 0xe6060000 0 0x250>;
618 compatible = "renesas,sdhi-r8a7790";
619 reg = <0 0xee100000 0 0x328>;
620 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
621 clocks = <&mstp3_clks R8A7790_CLK_SDHI0>;
622 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
623 <&dmac1 0xcd>, <&dmac1 0xce>;
624 dma-names = "tx", "rx", "tx", "rx";
625 max-frequency = <195000000>;
626 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
631 compatible = "renesas,sdhi-r8a7790";
632 reg = <0 0xee120000 0 0x328>;
633 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
634 clocks = <&mstp3_clks R8A7790_CLK_SDHI1>;
635 dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
636 <&dmac1 0xc9>, <&dmac1 0xca>;
637 dma-names = "tx", "rx", "tx", "rx";
638 max-frequency = <195000000>;
639 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
644 compatible = "renesas,sdhi-r8a7790";
645 reg = <0 0xee140000 0 0x100>;
646 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
647 clocks = <&mstp3_clks R8A7790_CLK_SDHI2>;
648 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
649 <&dmac1 0xc1>, <&dmac1 0xc2>;
650 dma-names = "tx", "rx", "tx", "rx";
651 max-frequency = <97500000>;
652 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
657 compatible = "renesas,sdhi-r8a7790";
658 reg = <0 0xee160000 0 0x100>;
659 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
660 clocks = <&mstp3_clks R8A7790_CLK_SDHI3>;
661 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
662 <&dmac1 0xd3>, <&dmac1 0xd4>;
663 dma-names = "tx", "rx", "tx", "rx";
664 max-frequency = <97500000>;
665 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
669 scifa0: serial@e6c40000 {
670 compatible = "renesas,scifa-r8a7790",
671 "renesas,rcar-gen2-scifa", "renesas,scifa";
672 reg = <0 0xe6c40000 0 64>;
673 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
674 clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>;
676 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
677 <&dmac1 0x21>, <&dmac1 0x22>;
678 dma-names = "tx", "rx", "tx", "rx";
679 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
683 scifa1: serial@e6c50000 {
684 compatible = "renesas,scifa-r8a7790",
685 "renesas,rcar-gen2-scifa", "renesas,scifa";
686 reg = <0 0xe6c50000 0 64>;
687 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
688 clocks = <&mstp2_clks R8A7790_CLK_SCIFA1>;
690 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
691 <&dmac1 0x25>, <&dmac1 0x26>;
692 dma-names = "tx", "rx", "tx", "rx";
693 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
697 scifa2: serial@e6c60000 {
698 compatible = "renesas,scifa-r8a7790",
699 "renesas,rcar-gen2-scifa", "renesas,scifa";
700 reg = <0 0xe6c60000 0 64>;
701 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
702 clocks = <&mstp2_clks R8A7790_CLK_SCIFA2>;
704 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
705 <&dmac1 0x27>, <&dmac1 0x28>;
706 dma-names = "tx", "rx", "tx", "rx";
707 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
711 scifb0: serial@e6c20000 {
712 compatible = "renesas,scifb-r8a7790",
713 "renesas,rcar-gen2-scifb", "renesas,scifb";
714 reg = <0 0xe6c20000 0 64>;
715 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
716 clocks = <&mstp2_clks R8A7790_CLK_SCIFB0>;
718 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
719 <&dmac1 0x3d>, <&dmac1 0x3e>;
720 dma-names = "tx", "rx", "tx", "rx";
721 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
725 scifb1: serial@e6c30000 {
726 compatible = "renesas,scifb-r8a7790",
727 "renesas,rcar-gen2-scifb", "renesas,scifb";
728 reg = <0 0xe6c30000 0 64>;
729 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
730 clocks = <&mstp2_clks R8A7790_CLK_SCIFB1>;
732 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
733 <&dmac1 0x19>, <&dmac1 0x1a>;
734 dma-names = "tx", "rx", "tx", "rx";
735 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
739 scifb2: serial@e6ce0000 {
740 compatible = "renesas,scifb-r8a7790",
741 "renesas,rcar-gen2-scifb", "renesas,scifb";
742 reg = <0 0xe6ce0000 0 64>;
743 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
744 clocks = <&mstp2_clks R8A7790_CLK_SCIFB2>;
746 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
747 <&dmac1 0x1d>, <&dmac1 0x1e>;
748 dma-names = "tx", "rx", "tx", "rx";
749 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
753 scif0: serial@e6e60000 {
754 compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
756 reg = <0 0xe6e60000 0 64>;
757 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
758 clocks = <&mstp7_clks R8A7790_CLK_SCIF0>, <&zs_clk>,
760 clock-names = "fck", "brg_int", "scif_clk";
761 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
762 <&dmac1 0x29>, <&dmac1 0x2a>;
763 dma-names = "tx", "rx", "tx", "rx";
764 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
768 scif1: serial@e6e68000 {
769 compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
771 reg = <0 0xe6e68000 0 64>;
772 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
773 clocks = <&mstp7_clks R8A7790_CLK_SCIF1>, <&zs_clk>,
775 clock-names = "fck", "brg_int", "scif_clk";
776 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
777 <&dmac1 0x2d>, <&dmac1 0x2e>;
778 dma-names = "tx", "rx", "tx", "rx";
779 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
783 scif2: serial@e6e56000 {
784 compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
786 reg = <0 0xe6e56000 0 64>;
787 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
788 clocks = <&mstp3_clks R8A7790_CLK_SCIF2>, <&zs_clk>,
790 clock-names = "fck", "brg_int", "scif_clk";
791 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
792 <&dmac1 0x2b>, <&dmac1 0x2c>;
793 dma-names = "tx", "rx", "tx", "rx";
794 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
798 hscif0: serial@e62c0000 {
799 compatible = "renesas,hscif-r8a7790",
800 "renesas,rcar-gen2-hscif", "renesas,hscif";
801 reg = <0 0xe62c0000 0 96>;
802 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
803 clocks = <&mstp7_clks R8A7790_CLK_HSCIF0>, <&zs_clk>,
805 clock-names = "fck", "brg_int", "scif_clk";
806 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
807 <&dmac1 0x39>, <&dmac1 0x3a>;
808 dma-names = "tx", "rx", "tx", "rx";
809 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
813 hscif1: serial@e62c8000 {
814 compatible = "renesas,hscif-r8a7790",
815 "renesas,rcar-gen2-hscif", "renesas,hscif";
816 reg = <0 0xe62c8000 0 96>;
817 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
818 clocks = <&mstp7_clks R8A7790_CLK_HSCIF1>, <&zs_clk>,
820 clock-names = "fck", "brg_int", "scif_clk";
821 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
822 <&dmac1 0x4d>, <&dmac1 0x4e>;
823 dma-names = "tx", "rx", "tx", "rx";
824 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
828 ether: ethernet@ee700000 {
829 compatible = "renesas,ether-r8a7790";
830 reg = <0 0xee700000 0 0x400>;
831 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
832 clocks = <&mstp8_clks R8A7790_CLK_ETHER>;
833 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
835 #address-cells = <1>;
840 avb: ethernet@e6800000 {
841 compatible = "renesas,etheravb-r8a7790",
842 "renesas,etheravb-rcar-gen2";
843 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
844 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
845 clocks = <&mstp8_clks R8A7790_CLK_ETHERAVB>;
846 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
847 #address-cells = <1>;
852 sata0: sata@ee300000 {
853 compatible = "renesas,sata-r8a7790";
854 reg = <0 0xee300000 0 0x2000>;
855 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
856 clocks = <&mstp8_clks R8A7790_CLK_SATA0>;
857 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
861 sata1: sata@ee500000 {
862 compatible = "renesas,sata-r8a7790";
863 reg = <0 0xee500000 0 0x2000>;
864 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
865 clocks = <&mstp8_clks R8A7790_CLK_SATA1>;
866 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
870 hsusb: usb@e6590000 {
871 compatible = "renesas,usbhs-r8a7790", "renesas,rcar-gen2-usbhs";
872 reg = <0 0xe6590000 0 0x100>;
873 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
874 clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
875 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
876 <&usb_dmac1 0>, <&usb_dmac1 1>;
877 dma-names = "ch0", "ch1", "ch2", "ch3";
878 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
879 renesas,buswait = <4>;
885 usbphy: usb-phy@e6590100 {
886 compatible = "renesas,usb-phy-r8a7790";
887 reg = <0 0xe6590100 0 0x100>;
888 #address-cells = <1>;
890 clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
891 clock-names = "usbhs";
892 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
895 usb0: usb-channel@0 {
899 usb2: usb-channel@2 {
905 vin0: video@e6ef0000 {
906 compatible = "renesas,vin-r8a7790";
907 reg = <0 0xe6ef0000 0 0x1000>;
908 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
909 clocks = <&mstp8_clks R8A7790_CLK_VIN0>;
910 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
914 vin1: video@e6ef1000 {
915 compatible = "renesas,vin-r8a7790";
916 reg = <0 0xe6ef1000 0 0x1000>;
917 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
918 clocks = <&mstp8_clks R8A7790_CLK_VIN1>;
919 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
923 vin2: video@e6ef2000 {
924 compatible = "renesas,vin-r8a7790";
925 reg = <0 0xe6ef2000 0 0x1000>;
926 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
927 clocks = <&mstp8_clks R8A7790_CLK_VIN2>;
928 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
932 vin3: video@e6ef3000 {
933 compatible = "renesas,vin-r8a7790";
934 reg = <0 0xe6ef3000 0 0x1000>;
935 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
936 clocks = <&mstp8_clks R8A7790_CLK_VIN3>;
937 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
942 compatible = "renesas,vsp1";
943 reg = <0 0xfe920000 0 0x8000>;
944 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
945 clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>;
946 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
955 compatible = "renesas,vsp1";
956 reg = <0 0xfe928000 0 0x8000>;
957 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
958 clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>;
959 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
969 compatible = "renesas,vsp1";
970 reg = <0 0xfe930000 0 0x8000>;
971 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
972 clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU0>;
973 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
983 compatible = "renesas,vsp1";
984 reg = <0 0xfe938000 0 0x8000>;
985 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
986 clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU1>;
987 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
996 du: display@feb00000 {
997 compatible = "renesas,du-r8a7790";
998 reg = <0 0xfeb00000 0 0x70000>,
999 <0 0xfeb90000 0 0x1c>,
1000 <0 0xfeb94000 0 0x1c>;
1001 reg-names = "du", "lvds.0", "lvds.1";
1002 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1003 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1004 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1005 clocks = <&mstp7_clks R8A7790_CLK_DU0>,
1006 <&mstp7_clks R8A7790_CLK_DU1>,
1007 <&mstp7_clks R8A7790_CLK_DU2>,
1008 <&mstp7_clks R8A7790_CLK_LVDS0>,
1009 <&mstp7_clks R8A7790_CLK_LVDS1>;
1010 clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1";
1011 status = "disabled";
1014 #address-cells = <1>;
1019 du_out_rgb: endpoint {
1024 du_out_lvds0: endpoint {
1029 du_out_lvds1: endpoint {
1035 can0: can@e6e80000 {
1036 compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
1037 reg = <0 0xe6e80000 0 0x1000>;
1038 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1039 clocks = <&mstp9_clks R8A7790_CLK_RCAN0>,
1040 <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>;
1041 clock-names = "clkp1", "clkp2", "can_clk";
1042 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1043 status = "disabled";
1046 can1: can@e6e88000 {
1047 compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
1048 reg = <0 0xe6e88000 0 0x1000>;
1049 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1050 clocks = <&mstp9_clks R8A7790_CLK_RCAN1>,
1051 <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>;
1052 clock-names = "clkp1", "clkp2", "can_clk";
1053 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1054 status = "disabled";
1057 jpu: jpeg-codec@fe980000 {
1058 compatible = "renesas,jpu-r8a7790", "renesas,rcar-gen2-jpu";
1059 reg = <0 0xfe980000 0 0x10300>;
1060 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1061 clocks = <&mstp1_clks R8A7790_CLK_JPU>;
1062 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1066 #address-cells = <2>;
1070 /* External root clock */
1072 compatible = "fixed-clock";
1074 /* This value must be overriden by the board. */
1075 clock-frequency = <0>;
1078 /* External PCIe clock - can be overridden by the board */
1079 pcie_bus_clk: pcie_bus {
1080 compatible = "fixed-clock";
1082 clock-frequency = <0>;
1086 * The external audio clocks are configured as 0 Hz fixed frequency clocks by
1087 * default. Boards that provide audio clocks should override them.
1089 audio_clk_a: audio_clk_a {
1090 compatible = "fixed-clock";
1092 clock-frequency = <0>;
1094 audio_clk_b: audio_clk_b {
1095 compatible = "fixed-clock";
1097 clock-frequency = <0>;
1099 audio_clk_c: audio_clk_c {
1100 compatible = "fixed-clock";
1102 clock-frequency = <0>;
1105 /* External SCIF clock */
1107 compatible = "fixed-clock";
1109 /* This value must be overridden by the board. */
1110 clock-frequency = <0>;
1113 /* External USB clock - can be overridden by the board */
1114 usb_extal_clk: usb_extal {
1115 compatible = "fixed-clock";
1117 clock-frequency = <48000000>;
1120 /* External CAN clock */
1122 compatible = "fixed-clock";
1124 /* This value must be overridden by the board. */
1125 clock-frequency = <0>;
1128 /* Special CPG clocks */
1129 cpg_clocks: cpg_clocks@e6150000 {
1130 compatible = "renesas,r8a7790-cpg-clocks",
1131 "renesas,rcar-gen2-cpg-clocks";
1132 reg = <0 0xe6150000 0 0x1000>;
1133 clocks = <&extal_clk &usb_extal_clk>;
1135 clock-output-names = "main", "pll0", "pll1", "pll3",
1136 "lb", "qspi", "sdh", "sd0", "sd1",
1137 "z", "rcan", "adsp";
1138 #power-domain-cells = <0>;
1141 /* Variable factor clocks */
1142 sd2_clk: sd2@e6150078 {
1143 compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
1144 reg = <0 0xe6150078 0 4>;
1145 clocks = <&pll1_div2_clk>;
1148 sd3_clk: sd3@e615026c {
1149 compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
1150 reg = <0 0xe615026c 0 4>;
1151 clocks = <&pll1_div2_clk>;
1154 mmc0_clk: mmc0@e6150240 {
1155 compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
1156 reg = <0 0xe6150240 0 4>;
1157 clocks = <&pll1_div2_clk>;
1160 mmc1_clk: mmc1@e6150244 {
1161 compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
1162 reg = <0 0xe6150244 0 4>;
1163 clocks = <&pll1_div2_clk>;
1166 ssp_clk: ssp@e6150248 {
1167 compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
1168 reg = <0 0xe6150248 0 4>;
1169 clocks = <&pll1_div2_clk>;
1172 ssprs_clk: ssprs@e615024c {
1173 compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
1174 reg = <0 0xe615024c 0 4>;
1175 clocks = <&pll1_div2_clk>;
1179 /* Fixed factor clocks */
1180 pll1_div2_clk: pll1_div2 {
1181 compatible = "fixed-factor-clock";
1182 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1188 compatible = "fixed-factor-clock";
1189 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1195 compatible = "fixed-factor-clock";
1196 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1202 compatible = "fixed-factor-clock";
1203 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1209 compatible = "fixed-factor-clock";
1210 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1216 compatible = "fixed-factor-clock";
1217 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1223 compatible = "fixed-factor-clock";
1224 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1230 compatible = "fixed-factor-clock";
1231 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1237 compatible = "fixed-factor-clock";
1238 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1244 compatible = "fixed-factor-clock";
1245 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1251 compatible = "fixed-factor-clock";
1252 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1258 compatible = "fixed-factor-clock";
1259 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1265 compatible = "fixed-factor-clock";
1266 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1268 clock-div = <(48 * 1024)>;
1271 oscclk_clk: oscclk {
1272 compatible = "fixed-factor-clock";
1273 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1275 clock-div = <(12 * 1024)>;
1279 compatible = "fixed-factor-clock";
1280 clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
1286 compatible = "fixed-factor-clock";
1287 clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
1293 compatible = "fixed-factor-clock";
1294 clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
1300 compatible = "fixed-factor-clock";
1301 clocks = <&pll1_div2_clk>;
1307 compatible = "fixed-factor-clock";
1308 clocks = <&extal_clk>;
1315 mstp0_clks: mstp0_clks@e6150130 {
1316 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1317 reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>;
1320 clock-indices = <R8A7790_CLK_MSIOF0>;
1321 clock-output-names = "msiof0";
1323 mstp1_clks: mstp1_clks@e6150134 {
1324 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1325 reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
1326 clocks = <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&m2_clk>,
1327 <&zs_clk>, <&p_clk>, <&zg_clk>, <&zs_clk>, <&zs_clk>,
1328 <&zs_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
1329 <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>;
1332 R8A7790_CLK_VCP1 R8A7790_CLK_VCP0 R8A7790_CLK_VPC1
1333 R8A7790_CLK_VPC0 R8A7790_CLK_JPU R8A7790_CLK_SSP1
1334 R8A7790_CLK_TMU1 R8A7790_CLK_3DG R8A7790_CLK_2DDMAC
1335 R8A7790_CLK_FDP1_2 R8A7790_CLK_FDP1_1 R8A7790_CLK_FDP1_0
1336 R8A7790_CLK_TMU3 R8A7790_CLK_TMU2 R8A7790_CLK_CMT0
1337 R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1 R8A7790_CLK_VSP1_DU0
1338 R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S
1340 clock-output-names =
1341 "vcp1", "vcp0", "vpc1", "vpc0", "jpu", "ssp1",
1342 "tmu1", "3dg", "2ddmac", "fdp1-2", "fdp1-1",
1343 "fdp1-0", "tmu3", "tmu2", "cmt0", "tmu0",
1344 "vsp1-du1", "vsp1-du0", "vsp1-rt", "vsp1-sy";
1346 mstp2_clks: mstp2_clks@e6150138 {
1347 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1348 reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
1349 clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
1350 <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&zs_clk>,
1354 R8A7790_CLK_SCIFA2 R8A7790_CLK_SCIFA1 R8A7790_CLK_SCIFA0
1355 R8A7790_CLK_MSIOF2 R8A7790_CLK_SCIFB0 R8A7790_CLK_SCIFB1
1356 R8A7790_CLK_MSIOF1 R8A7790_CLK_MSIOF3 R8A7790_CLK_SCIFB2
1357 R8A7790_CLK_SYS_DMAC1 R8A7790_CLK_SYS_DMAC0
1359 clock-output-names =
1360 "scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
1361 "scifb1", "msiof1", "msiof3", "scifb2",
1362 "sys-dmac1", "sys-dmac0";
1364 mstp3_clks: mstp3_clks@e615013c {
1365 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1366 reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
1367 clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&p_clk>, <&sd3_clk>,
1368 <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>,
1369 <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>,
1370 <&hp_clk>, <&hp_clk>;
1373 R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SCIF2 R8A7790_CLK_SDHI3
1374 R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0
1375 R8A7790_CLK_IIC0 R8A7790_CLK_PCIEC R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1
1376 R8A7790_CLK_USBDMAC0 R8A7790_CLK_USBDMAC1
1378 clock-output-names =
1379 "iic2", "tpu0", "mmcif1", "scif2", "sdhi3",
1380 "sdhi2", "sdhi1", "sdhi0", "mmcif0",
1381 "iic0", "pciec", "iic1", "ssusb", "cmt1",
1382 "usbdmac0", "usbdmac1";
1384 mstp4_clks: mstp4_clks@e6150140 {
1385 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1386 reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
1389 clock-indices = <R8A7790_CLK_IRQC>;
1390 clock-output-names = "irqc";
1392 mstp5_clks: mstp5_clks@e6150144 {
1393 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1394 reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
1395 clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7790_CLK_ADSP>,
1396 <&extal_clk>, <&p_clk>;
1399 R8A7790_CLK_AUDIO_DMAC0 R8A7790_CLK_AUDIO_DMAC1
1400 R8A7790_CLK_ADSP_MOD R8A7790_CLK_THERMAL
1403 clock-output-names = "audmac0", "audmac1", "adsp_mod",
1406 mstp7_clks: mstp7_clks@e615014c {
1407 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1408 reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
1409 clocks = <&mp_clk>, <&hp_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>,
1410 <&p_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>,
1414 R8A7790_CLK_EHCI R8A7790_CLK_HSUSB R8A7790_CLK_HSCIF1
1415 R8A7790_CLK_HSCIF0 R8A7790_CLK_SCIF1 R8A7790_CLK_SCIF0
1416 R8A7790_CLK_DU2 R8A7790_CLK_DU1 R8A7790_CLK_DU0
1417 R8A7790_CLK_LVDS1 R8A7790_CLK_LVDS0
1419 clock-output-names =
1420 "ehci", "hsusb", "hscif1", "hscif0", "scif1",
1421 "scif0", "du2", "du1", "du0", "lvds1", "lvds0";
1423 mstp8_clks: mstp8_clks@e6150990 {
1424 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1425 reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
1426 clocks = <&hp_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>,
1427 <&zg_clk>, <&hp_clk>, <&p_clk>, <&zs_clk>,
1431 R8A7790_CLK_MLB R8A7790_CLK_VIN3 R8A7790_CLK_VIN2
1432 R8A7790_CLK_VIN1 R8A7790_CLK_VIN0
1433 R8A7790_CLK_ETHERAVB R8A7790_CLK_ETHER
1434 R8A7790_CLK_SATA1 R8A7790_CLK_SATA0
1436 clock-output-names =
1437 "mlb", "vin3", "vin2", "vin1", "vin0",
1438 "etheravb", "ether", "sata1", "sata0";
1440 mstp9_clks: mstp9_clks@e6150994 {
1441 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1442 reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
1443 clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>,
1444 <&cp_clk>, <&cp_clk>, <&cp_clk>,
1445 <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, <&cp_clk>,
1446 <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
1449 R8A7790_CLK_GPIO5 R8A7790_CLK_GPIO4 R8A7790_CLK_GPIO3
1450 R8A7790_CLK_GPIO2 R8A7790_CLK_GPIO1 R8A7790_CLK_GPIO0
1451 R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD R8A7790_CLK_IICDVFS
1452 R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 R8A7790_CLK_I2C0
1454 clock-output-names =
1455 "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0",
1456 "rcan1", "rcan0", "qspi_mod", "iic3",
1457 "i2c3", "i2c2", "i2c1", "i2c0";
1459 mstp10_clks: mstp10_clks@e6150998 {
1460 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1461 reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
1463 <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
1464 <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
1466 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
1467 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
1468 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
1469 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
1470 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
1471 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
1472 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>;
1477 R8A7790_CLK_SSI9 R8A7790_CLK_SSI8 R8A7790_CLK_SSI7 R8A7790_CLK_SSI6 R8A7790_CLK_SSI5
1478 R8A7790_CLK_SSI4 R8A7790_CLK_SSI3 R8A7790_CLK_SSI2 R8A7790_CLK_SSI1 R8A7790_CLK_SSI0
1480 R8A7790_CLK_SCU_DVC1 R8A7790_CLK_SCU_DVC0
1481 R8A7790_CLK_SCU_CTU1_MIX1 R8A7790_CLK_SCU_CTU0_MIX0
1482 R8A7790_CLK_SCU_SRC9 R8A7790_CLK_SCU_SRC8 R8A7790_CLK_SCU_SRC7 R8A7790_CLK_SCU_SRC6 R8A7790_CLK_SCU_SRC5
1483 R8A7790_CLK_SCU_SRC4 R8A7790_CLK_SCU_SRC3 R8A7790_CLK_SCU_SRC2 R8A7790_CLK_SCU_SRC1 R8A7790_CLK_SCU_SRC0
1485 clock-output-names =
1487 "ssi9", "ssi8", "ssi7", "ssi6", "ssi5",
1488 "ssi4", "ssi3", "ssi2", "ssi1", "ssi0",
1490 "scu-dvc1", "scu-dvc0",
1491 "scu-ctu1-mix1", "scu-ctu0-mix0",
1492 "scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5",
1493 "scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0";
1497 sysc: system-controller@e6180000 {
1498 compatible = "renesas,r8a7790-sysc";
1499 reg = <0 0xe6180000 0 0x0200>;
1500 #power-domain-cells = <1>;
1503 qspi: spi@e6b10000 {
1504 compatible = "renesas,qspi-r8a7790", "renesas,qspi";
1505 reg = <0 0xe6b10000 0 0x2c>;
1506 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
1507 clocks = <&mstp9_clks R8A7790_CLK_QSPI_MOD>;
1508 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
1509 <&dmac1 0x17>, <&dmac1 0x18>;
1510 dma-names = "tx", "rx", "tx", "rx";
1511 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1513 #address-cells = <1>;
1515 status = "disabled";
1518 msiof0: spi@e6e20000 {
1519 compatible = "renesas,msiof-r8a7790";
1520 reg = <0 0xe6e20000 0 0x0064>;
1521 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1522 clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
1523 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
1524 <&dmac1 0x51>, <&dmac1 0x52>;
1525 dma-names = "tx", "rx", "tx", "rx";
1526 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1527 #address-cells = <1>;
1529 status = "disabled";
1532 msiof1: spi@e6e10000 {
1533 compatible = "renesas,msiof-r8a7790";
1534 reg = <0 0xe6e10000 0 0x0064>;
1535 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1536 clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
1537 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
1538 <&dmac1 0x55>, <&dmac1 0x56>;
1539 dma-names = "tx", "rx", "tx", "rx";
1540 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1541 #address-cells = <1>;
1543 status = "disabled";
1546 msiof2: spi@e6e00000 {
1547 compatible = "renesas,msiof-r8a7790";
1548 reg = <0 0xe6e00000 0 0x0064>;
1549 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1550 clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
1551 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1552 <&dmac1 0x41>, <&dmac1 0x42>;
1553 dma-names = "tx", "rx", "tx", "rx";
1554 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1555 #address-cells = <1>;
1557 status = "disabled";
1560 msiof3: spi@e6c90000 {
1561 compatible = "renesas,msiof-r8a7790";
1562 reg = <0 0xe6c90000 0 0x0064>;
1563 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1564 clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
1565 dmas = <&dmac0 0x45>, <&dmac0 0x46>,
1566 <&dmac1 0x45>, <&dmac1 0x46>;
1567 dma-names = "tx", "rx", "tx", "rx";
1568 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1569 #address-cells = <1>;
1571 status = "disabled";
1574 xhci: usb@ee000000 {
1575 compatible = "renesas,xhci-r8a7790", "renesas,rcar-gen2-xhci";
1576 reg = <0 0xee000000 0 0xc00>;
1577 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1578 clocks = <&mstp3_clks R8A7790_CLK_SSUSB>;
1579 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1582 status = "disabled";
1585 pci0: pci@ee090000 {
1586 compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
1587 device_type = "pci";
1588 reg = <0 0xee090000 0 0xc00>,
1589 <0 0xee080000 0 0x1100>;
1590 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1591 clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
1592 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1593 status = "disabled";
1596 #address-cells = <3>;
1598 #interrupt-cells = <1>;
1599 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1600 interrupt-map-mask = <0xff00 0 0 0x7>;
1601 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1602 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1603 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1606 reg = <0x800 0 0 0 0>;
1607 device_type = "pci";
1613 reg = <0x1000 0 0 0 0>;
1614 device_type = "pci";
1620 pci1: pci@ee0b0000 {
1621 compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
1622 device_type = "pci";
1623 reg = <0 0xee0b0000 0 0xc00>,
1624 <0 0xee0a0000 0 0x1100>;
1625 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1626 clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
1627 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1628 status = "disabled";
1631 #address-cells = <3>;
1633 #interrupt-cells = <1>;
1634 ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
1635 interrupt-map-mask = <0xff00 0 0 0x7>;
1636 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1637 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1638 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1641 pci2: pci@ee0d0000 {
1642 compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
1643 device_type = "pci";
1644 clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
1645 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1646 reg = <0 0xee0d0000 0 0xc00>,
1647 <0 0xee0c0000 0 0x1100>;
1648 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1649 status = "disabled";
1652 #address-cells = <3>;
1654 #interrupt-cells = <1>;
1655 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1656 interrupt-map-mask = <0xff00 0 0 0x7>;
1657 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1658 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1659 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1662 reg = <0x800 0 0 0 0>;
1663 device_type = "pci";
1669 reg = <0x1000 0 0 0 0>;
1670 device_type = "pci";
1676 pciec: pcie@fe000000 {
1677 compatible = "renesas,pcie-r8a7790", "renesas,pcie-rcar-gen2";
1678 reg = <0 0xfe000000 0 0x80000>;
1679 #address-cells = <3>;
1681 bus-range = <0x00 0xff>;
1682 device_type = "pci";
1683 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1684 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1685 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1686 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1687 /* Map all possible DDR as inbound ranges */
1688 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1689 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
1690 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1691 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1692 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1693 #interrupt-cells = <1>;
1694 interrupt-map-mask = <0 0 0 0>;
1695 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1696 clocks = <&mstp3_clks R8A7790_CLK_PCIEC>, <&pcie_bus_clk>;
1697 clock-names = "pcie", "pcie_bus";
1698 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1699 status = "disabled";
1702 rcar_sound: sound@ec500000 {
1704 * #sound-dai-cells is required
1706 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1707 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1709 compatible = "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2";
1710 reg = <0 0xec500000 0 0x1000>, /* SCU */
1711 <0 0xec5a0000 0 0x100>, /* ADG */
1712 <0 0xec540000 0 0x1000>, /* SSIU */
1713 <0 0xec541000 0 0x280>, /* SSI */
1714 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1715 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1717 clocks = <&mstp10_clks R8A7790_CLK_SSI_ALL>,
1718 <&mstp10_clks R8A7790_CLK_SSI9>, <&mstp10_clks R8A7790_CLK_SSI8>,
1719 <&mstp10_clks R8A7790_CLK_SSI7>, <&mstp10_clks R8A7790_CLK_SSI6>,
1720 <&mstp10_clks R8A7790_CLK_SSI5>, <&mstp10_clks R8A7790_CLK_SSI4>,
1721 <&mstp10_clks R8A7790_CLK_SSI3>, <&mstp10_clks R8A7790_CLK_SSI2>,
1722 <&mstp10_clks R8A7790_CLK_SSI1>, <&mstp10_clks R8A7790_CLK_SSI0>,
1723 <&mstp10_clks R8A7790_CLK_SCU_SRC9>, <&mstp10_clks R8A7790_CLK_SCU_SRC8>,
1724 <&mstp10_clks R8A7790_CLK_SCU_SRC7>, <&mstp10_clks R8A7790_CLK_SCU_SRC6>,
1725 <&mstp10_clks R8A7790_CLK_SCU_SRC5>, <&mstp10_clks R8A7790_CLK_SCU_SRC4>,
1726 <&mstp10_clks R8A7790_CLK_SCU_SRC3>, <&mstp10_clks R8A7790_CLK_SCU_SRC2>,
1727 <&mstp10_clks R8A7790_CLK_SCU_SRC1>, <&mstp10_clks R8A7790_CLK_SCU_SRC0>,
1728 <&mstp10_clks R8A7790_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7790_CLK_SCU_CTU1_MIX1>,
1729 <&mstp10_clks R8A7790_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7790_CLK_SCU_CTU1_MIX1>,
1730 <&mstp10_clks R8A7790_CLK_SCU_DVC0>, <&mstp10_clks R8A7790_CLK_SCU_DVC1>,
1731 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>;
1732 clock-names = "ssi-all",
1733 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1734 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1735 "src.9", "src.8", "src.7", "src.6", "src.5",
1736 "src.4", "src.3", "src.2", "src.1", "src.0",
1740 "clk_a", "clk_b", "clk_c", "clk_i";
1741 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1743 status = "disabled";
1747 dmas = <&audma0 0xbc>;
1751 dmas = <&audma0 0xbe>;
1774 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1775 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1776 dma-names = "rx", "tx";
1779 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1780 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1781 dma-names = "rx", "tx";
1784 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1785 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1786 dma-names = "rx", "tx";
1789 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1790 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1791 dma-names = "rx", "tx";
1794 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1795 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1796 dma-names = "rx", "tx";
1799 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1800 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1801 dma-names = "rx", "tx";
1804 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1805 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1806 dma-names = "rx", "tx";
1809 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1810 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1811 dma-names = "rx", "tx";
1814 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1815 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1816 dma-names = "rx", "tx";
1819 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1820 dmas = <&audma0 0x97>, <&audma1 0xba>;
1821 dma-names = "rx", "tx";
1827 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1828 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1829 dma-names = "rx", "tx", "rxu", "txu";
1832 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1833 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1834 dma-names = "rx", "tx", "rxu", "txu";
1837 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1838 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1839 dma-names = "rx", "tx", "rxu", "txu";
1842 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1843 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1844 dma-names = "rx", "tx", "rxu", "txu";
1847 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1848 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1849 dma-names = "rx", "tx", "rxu", "txu";
1852 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1853 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1854 dma-names = "rx", "tx", "rxu", "txu";
1857 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1858 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1859 dma-names = "rx", "tx", "rxu", "txu";
1862 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1863 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1864 dma-names = "rx", "tx", "rxu", "txu";
1867 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1868 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1869 dma-names = "rx", "tx", "rxu", "txu";
1872 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1873 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1874 dma-names = "rx", "tx", "rxu", "txu";
1879 ipmmu_sy0: mmu@e6280000 {
1880 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1881 reg = <0 0xe6280000 0 0x1000>;
1882 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
1883 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1885 status = "disabled";
1888 ipmmu_sy1: mmu@e6290000 {
1889 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1890 reg = <0 0xe6290000 0 0x1000>;
1891 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1893 status = "disabled";
1896 ipmmu_ds: mmu@e6740000 {
1897 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1898 reg = <0 0xe6740000 0 0x1000>;
1899 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1900 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
1902 status = "disabled";
1905 ipmmu_mp: mmu@ec680000 {
1906 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1907 reg = <0 0xec680000 0 0x1000>;
1908 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
1910 status = "disabled";
1913 ipmmu_mx: mmu@fe951000 {
1914 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1915 reg = <0 0xfe951000 0 0x1000>;
1916 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
1917 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
1919 status = "disabled";
1922 ipmmu_rt: mmu@ffc80000 {
1923 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1924 reg = <0 0xffc80000 0 0x1000>;
1925 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
1927 status = "disabled";