arch/arm/boot/dts/r8a7793-gose.dts

   1 /*
   2  * Device Tree Source for the Gose board
   3  *
   4  * Copyright (C) 2014-2015 Renesas Electronics Corporation
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 /dts-v1/;
  12 #include "r8a7793.dtsi"
  13 #include <dt-bindings/gpio/gpio.h>
  14 #include <dt-bindings/input/input.h>
  15
  16 / {
  17         model = "Gose";
  18         compatible = "renesas,gose", "renesas,r8a7793";
  19
  20         aliases {
  21                 serial0 = &scif0;
  22                 serial1 = &scif1;
  23         };
  24
  25         chosen {
  26                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
  27                 stdout-path = &scif0;
  28         };
  29
  30         memory@40000000 {
  31                 device_type = "memory";
  32                 reg = <0 0x40000000 0 0x40000000>;
  33         };
  34 };
  35
  36 &extal_clk {
  37         clock-frequency = <20000000>;
  38 };
  39
  40 &pfc {
  41         scif0_pins: serial0 {
  42                 renesas,groups = "scif0_data_d";
  43                 renesas,function = "scif0";
  44         };
  45
  46         scif1_pins: serial1 {
  47                 renesas,groups = "scif1_data_d";
  48                 renesas,function = "scif1";
  49         };
  50
  51         ether_pins: ether {
  52                 renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
  53                 renesas,function = "eth";
  54         };
  55
  56         phy1_pins: phy1 {
  57                 renesas,groups = "intc_irq0";
  58                 renesas,function = "intc";
  59         };
  60 };
  61
  62 &ether {
  63         pinctrl-0 = <&ether_pins &phy1_pins>;
  64         pinctrl-names = "default";
  65
  66         phy-handle = <&phy1>;
  67         renesas,ether-link-active-low;
  68         status = "okay";
  69
  70         phy1: ethernet-phy@1 {
  71                 reg = <1>;
  72                 interrupt-parent = <&irqc0>;
  73                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
  74                 micrel,led-mode = <1>;
  75         };
  76 };
  77
  78 &cmt0 {
  79         status = "okay";
  80 };
  81
  82 &scif0 {
  83         pinctrl-0 = <&scif0_pins>;
  84         pinctrl-names = "default";
  85
  86         status = "okay";
  87 };
  88
  89 &scif1 {
  90         pinctrl-0 = <&scif1_pins>;
  91         pinctrl-names = "default";
  92
  93         status = "okay";
  94 };