2 * sama5d2.dtsi - Device Tree Include file for SAMA5D2 family SoC
4 * Copyright (C) 2015 Atmel,
5 * 2015 Ludovic Desroches <ludovic.desroches@atmel.com>
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
12 * a) This file is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of the
15 * License, or (at your option) any later version.
17 * This file is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
24 * b) Permission is hereby granted, free of charge, to any person
25 * obtaining a copy of this software and associated documentation
26 * files (the "Software"), to deal in the Software without
27 * restriction, including without limitation the rights to use,
28 * copy, modify, merge, publish, distribute, sublicense, and/or
29 * sell copies of the Software, and to permit persons to whom the
30 * Software is furnished to do so, subject to the following
33 * The above copyright notice and this permission notice shall be
34 * included in all copies or substantial portions of the Software.
36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43 * OTHER DEALINGS IN THE SOFTWARE.
46 #include "skeleton.dtsi"
47 #include <dt-bindings/dma/at91.h>
48 #include <dt-bindings/interrupt-controller/irq.h>
49 #include <dt-bindings/clock/at91.h>
52 model = "Atmel SAMA5D2 family SoC";
53 compatible = "atmel,sama5d2";
54 interrupt-parent = <&aic>;
69 compatible = "arm,cortex-a5";
71 next-level-cache = <&L2>;
76 compatible = "arm,cortex-a5-pmu";
77 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 0>;
81 reg = <0x20000000 0x20000000>;
85 slow_xtal: slow_xtal {
86 compatible = "fixed-clock";
88 clock-frequency = <0>;
91 main_xtal: main_xtal {
92 compatible = "fixed-clock";
94 clock-frequency = <0>;
98 ns_sram: sram@00200000 {
99 compatible = "mmio-sram";
100 reg = <0x00200000 0x20000>;
104 compatible = "simple-bus";
105 #address-cells = <1>;
109 usb0: gadget@00300000 {
110 #address-cells = <1>;
112 compatible = "atmel,sama5d3-udc";
113 reg = <0x00300000 0x100000
115 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 2>;
116 clocks = <&udphs_clk>, <&utmi>;
117 clock-names = "pclk", "hclk";
122 atmel,fifo-size = <64>;
123 atmel,nb-banks = <1>;
128 atmel,fifo-size = <1024>;
129 atmel,nb-banks = <3>;
136 atmel,fifo-size = <1024>;
137 atmel,nb-banks = <3>;
144 atmel,fifo-size = <1024>;
145 atmel,nb-banks = <2>;
152 atmel,fifo-size = <1024>;
153 atmel,nb-banks = <2>;
160 atmel,fifo-size = <1024>;
161 atmel,nb-banks = <2>;
168 atmel,fifo-size = <1024>;
169 atmel,nb-banks = <2>;
176 atmel,fifo-size = <1024>;
177 atmel,nb-banks = <2>;
184 atmel,fifo-size = <1024>;
185 atmel,nb-banks = <2>;
191 atmel,fifo-size = <1024>;
192 atmel,nb-banks = <2>;
198 atmel,fifo-size = <1024>;
199 atmel,nb-banks = <2>;
205 atmel,fifo-size = <1024>;
206 atmel,nb-banks = <2>;
212 atmel,fifo-size = <1024>;
213 atmel,nb-banks = <2>;
219 atmel,fifo-size = <1024>;
220 atmel,nb-banks = <2>;
226 atmel,fifo-size = <1024>;
227 atmel,nb-banks = <2>;
233 atmel,fifo-size = <1024>;
234 atmel,nb-banks = <2>;
239 usb1: ohci@00400000 {
240 compatible = "atmel,sama5d2-ohci", "usb-ohci";
241 reg = <0x00400000 0x100000>;
242 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 2>;
243 clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
244 clock-names = "ohci_clk", "hclk", "uhpck";
248 usb2: ehci@00500000 {
249 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
250 reg = <0x00500000 0x100000>;
251 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 2>;
252 clocks = <&utmi>, <&uhphs_clk>;
253 clock-names = "usb_clk", "ehci_clk";
257 L2: cache-controller@00a00000 {
258 compatible = "arm,pl310-cache";
259 reg = <0x00a00000 0x1000>;
260 interrupts = <63 IRQ_TYPE_LEVEL_HIGH 4>;
265 nand0: nand@80000000 {
266 compatible = "atmel,sama5d2-nand";
267 #address-cells = <1>;
270 reg = < /* EBI CS3 */
271 0x80000000 0x08000000
273 0xf8014070 0x00000490
274 /* SMC PMECC Error Location regs */
275 0xf8014500 0x00000200
276 /* ROM Galois tables */
277 0x00040000 0x00018000
279 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 6>;
280 atmel,nand-addr-offset = <21>;
281 atmel,nand-cmd-offset = <22>;
284 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
288 compatible = "atmel,sama5d3-nfc";
289 #address-cells = <1>;
291 reg = < /* NFC Command Registers */
292 0xc0000000 0x08000000
294 0xf8014000 0x00000070
296 0x00100000 0x00100000
298 clocks = <&hsmc_clk>;
303 sdmmc0: sdio-host@a0000000 {
304 compatible = "atmel,sama5d2-sdhci";
305 reg = <0xa0000000 0x300>;
306 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
307 clocks = <&sdmmc0_hclk>, <&sdmmc0_gclk>, <&main>;
308 clock-names = "hclock", "multclk", "baseclk";
312 sdmmc1: sdio-host@b0000000 {
313 compatible = "atmel,sama5d2-sdhci";
314 reg = <0xb0000000 0x300>;
315 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 0>;
316 clocks = <&sdmmc1_hclk>, <&sdmmc1_gclk>, <&main>;
317 clock-names = "hclock", "multclk", "baseclk";
322 compatible = "simple-bus";
323 #address-cells = <1>;
327 hlcdc: hlcdc@f0000000 {
328 compatible = "atmel,sama5d2-hlcdc";
329 reg = <0xf0000000 0x2000>;
330 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 0>;
331 clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
332 clock-names = "periph_clk","sys_clk", "slow_clk";
335 hlcdc-display-controller {
336 compatible = "atmel,hlcdc-display-controller";
337 #address-cells = <1>;
341 #address-cells = <1>;
347 hlcdc_pwm: hlcdc-pwm {
348 compatible = "atmel,hlcdc-pwm";
353 ramc0: ramc@f000c000 {
354 compatible = "atmel,sama5d3-ddramc";
355 reg = <0xf000c000 0x200>;
356 clocks = <&ddrck>, <&mpddr_clk>;
357 clock-names = "ddrck", "mpddr";
360 dma0: dma-controller@f0010000 {
361 compatible = "atmel,sama5d4-dma";
362 reg = <0xf0010000 0x1000>;
363 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>;
365 clocks = <&dma0_clk>;
366 clock-names = "dma_clk";
370 compatible = "atmel,sama5d2-pmc", "syscon";
371 reg = <0xf0014000 0x160>;
372 interrupts = <74 IRQ_TYPE_LEVEL_HIGH 7>;
373 interrupt-controller;
374 #address-cells = <1>;
376 #interrupt-cells = <1>;
378 main_rc_osc: main_rc_osc {
379 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
381 interrupt-parent = <&pmc>;
382 interrupts = <AT91_PMC_MOSCRCS>;
383 clock-frequency = <12000000>;
384 clock-accuracy = <100000000>;
388 compatible = "atmel,at91rm9200-clk-main-osc";
390 interrupt-parent = <&pmc>;
391 interrupts = <AT91_PMC_MOSCS>;
392 clocks = <&main_xtal>;
396 compatible = "atmel,at91sam9x5-clk-main";
398 interrupt-parent = <&pmc>;
399 interrupts = <AT91_PMC_MOSCSELS>;
400 clocks = <&main_rc_osc &main_osc>;
404 compatible = "atmel,sama5d3-clk-pll";
406 interrupt-parent = <&pmc>;
407 interrupts = <AT91_PMC_LOCKA>;
410 atmel,clk-input-range = <12000000 12000000>;
411 #atmel,pll-clk-output-range-cells = <4>;
412 atmel,pll-clk-output-ranges = <600000000 1200000000 0 0>;
416 compatible = "atmel,at91sam9x5-clk-plldiv";
422 compatible = "atmel,at91sam9x5-clk-utmi";
424 interrupt-parent = <&pmc>;
425 interrupts = <AT91_PMC_LOCKU>;
430 compatible = "atmel,at91sam9x5-clk-master";
432 interrupt-parent = <&pmc>;
433 interrupts = <AT91_PMC_MCKRDY>;
434 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
435 atmel,clk-output-range = <124000000 166000000>;
436 atmel,clk-divisors = <1 2 4 3>;
441 compatible = "atmel,sama5d4-clk-h32mx";
446 compatible = "atmel,at91sam9x5-clk-usb";
448 clocks = <&plladiv>, <&utmi>;
452 compatible = "atmel,at91sam9x5-clk-programmable";
453 #address-cells = <1>;
455 interrupt-parent = <&pmc>;
456 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
461 interrupts = <AT91_PMC_PCKRDY(0)>;
467 interrupts = <AT91_PMC_PCKRDY(1)>;
473 interrupts = <AT91_PMC_PCKRDY(2)>;
478 compatible = "atmel,at91rm9200-clk-system";
479 #address-cells = <1>;
532 compatible = "atmel,at91sam9x5-clk-peripheral";
533 #address-cells = <1>;
537 macb0_clk: macb0_clk {
540 atmel,clk-output-range = <0 83000000>;
546 atmel,clk-output-range = <0 83000000>;
549 matrix1_clk: matrix1_clk {
562 atmel,clk-output-range = <0 83000000>;
568 atmel,clk-output-range = <0 83000000>;
574 atmel,clk-output-range = <0 83000000>;
580 atmel,clk-output-range = <0 83000000>;
586 atmel,clk-output-range = <0 83000000>;
592 atmel,clk-output-range = <0 83000000>;
595 uart0_clk: uart0_clk {
598 atmel,clk-output-range = <0 83000000>;
601 uart1_clk: uart1_clk {
604 atmel,clk-output-range = <0 83000000>;
607 uart2_clk: uart2_clk {
610 atmel,clk-output-range = <0 83000000>;
613 uart3_clk: uart3_clk {
616 atmel,clk-output-range = <0 83000000>;
619 uart4_clk: uart4_clk {
622 atmel,clk-output-range = <0 83000000>;
628 atmel,clk-output-range = <0 83000000>;
634 atmel,clk-output-range = <0 83000000>;
640 atmel,clk-output-range = <0 83000000>;
646 atmel,clk-output-range = <0 83000000>;
652 atmel,clk-output-range = <0 83000000>;
658 atmel,clk-output-range = <0 83000000>;
664 atmel,clk-output-range = <0 83000000>;
670 atmel,clk-output-range = <0 83000000>;
673 uhphs_clk: uhphs_clk {
676 atmel,clk-output-range = <0 83000000>;
679 udphs_clk: udphs_clk {
682 atmel,clk-output-range = <0 83000000>;
688 atmel,clk-output-range = <0 83000000>;
694 atmel,clk-output-range = <0 83000000>;
700 atmel,clk-output-range = <0 83000000>;
703 pdmic_clk: pdmic_clk {
706 atmel,clk-output-range = <0 83000000>;
712 atmel,clk-output-range = <0 83000000>;
718 atmel,clk-output-range = <0 83000000>;
721 classd_clk: classd_clk {
724 atmel,clk-output-range = <0 83000000>;
729 compatible = "atmel,at91sam9x5-clk-peripheral";
730 #address-cells = <1>;
759 mpddr_clk: mpddr_clk {
764 matrix0_clk: matrix0_clk {
769 sdmmc0_hclk: sdmmc0_hclk {
774 sdmmc1_hclk: sdmmc1_hclk {
789 qspi0_clk: qspi0_clk {
794 qspi1_clk: qspi1_clk {
801 compatible = "atmel,sama5d2-clk-generated";
802 #address-cells = <1>;
804 interrupt-parent = <&pmc>;
805 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
807 sdmmc0_gclk: sdmmc0_gclk {
812 sdmmc1_gclk: sdmmc1_gclk {
817 tcb0_gclk: tcb0_gclk {
820 atmel,clk-output-range = <0 83000000>;
823 tcb1_gclk: tcb1_gclk {
826 atmel,clk-output-range = <0 83000000>;
832 atmel,clk-output-range = <0 83000000>;
835 pdmic_gclk: pdmic_gclk {
840 i2s0_gclk: i2s0_gclk {
845 i2s1_gclk: i2s1_gclk {
853 compatible = "atmel,at91sam9g46-sha";
854 reg = <0xf0028000 0x100>;
855 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
857 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
858 AT91_XDMAC_DT_PERID(30))>;
861 clock-names = "sha_clk";
866 compatible = "atmel,at91sam9g46-aes";
867 reg = <0xf002c000 0x100>;
868 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
870 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
871 AT91_XDMAC_DT_PERID(26))>,
873 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
874 AT91_XDMAC_DT_PERID(27))>;
875 dma-names = "tx", "rx";
877 clock-names = "aes_clk";
882 compatible = "atmel,at91rm9200-spi";
883 reg = <0xf8000000 0x100>;
884 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>;
886 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
887 AT91_XDMAC_DT_PERID(6))>,
889 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
890 AT91_XDMAC_DT_PERID(7))>;
891 dma-names = "tx", "rx";
892 clocks = <&spi0_clk>;
893 clock-names = "spi_clk";
894 atmel,fifo-size = <16>;
895 #address-cells = <1>;
900 macb0: ethernet@f8008000 {
901 compatible = "atmel,sama5d2-gem";
902 reg = <0xf8008000 0x1000>;
903 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 3 /* Queue 0 */
904 66 IRQ_TYPE_LEVEL_HIGH 3 /* Queue 1 */
905 67 IRQ_TYPE_LEVEL_HIGH 3>; /* Queue 2 */
906 #address-cells = <1>;
908 clocks = <&macb0_clk>, <&macb0_clk>;
909 clock-names = "hclk", "pclk";
913 tcb0: timer@f800c000 {
914 compatible = "atmel,at91sam9x5-tcb";
915 reg = <0xf800c000 0x100>;
916 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
917 clocks = <&tcb0_clk>, <&clk32k>;
918 clock-names = "t0_clk", "slow_clk";
921 tcb1: timer@f8010000 {
922 compatible = "atmel,at91sam9x5-tcb";
923 reg = <0xf8010000 0x100>;
924 interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
925 clocks = <&tcb1_clk>, <&clk32k>;
926 clock-names = "t0_clk", "slow_clk";
929 pdmic: pdmic@f8018000 {
930 compatible = "atmel,sama5d2-pdmic";
931 reg = <0xf8018000 0x124>;
932 interrupts = <48 IRQ_TYPE_LEVEL_HIGH 7>;
934 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
935 | AT91_XDMAC_DT_PERID(50))>;
937 clocks = <&pdmic_clk>, <&pdmic_gclk>;
938 clock-names = "pclk", "gclk";
942 uart0: serial@f801c000 {
943 compatible = "atmel,at91sam9260-usart";
944 reg = <0xf801c000 0x100>;
945 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 7>;
947 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
948 AT91_XDMAC_DT_PERID(35))>,
950 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
951 AT91_XDMAC_DT_PERID(36))>;
952 dma-names = "tx", "rx";
953 clocks = <&uart0_clk>;
954 clock-names = "usart";
958 uart1: serial@f8020000 {
959 compatible = "atmel,at91sam9260-usart";
960 reg = <0xf8020000 0x100>;
961 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 7>;
963 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
964 AT91_XDMAC_DT_PERID(37))>,
966 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
967 AT91_XDMAC_DT_PERID(38))>;
968 dma-names = "tx", "rx";
969 clocks = <&uart1_clk>;
970 clock-names = "usart";
974 uart2: serial@f8024000 {
975 compatible = "atmel,at91sam9260-usart";
976 reg = <0xf8024000 0x100>;
977 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 7>;
979 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
980 AT91_XDMAC_DT_PERID(39))>,
982 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
983 AT91_XDMAC_DT_PERID(40))>;
984 dma-names = "tx", "rx";
985 clocks = <&uart2_clk>;
986 clock-names = "usart";
991 compatible = "atmel,sama5d2-i2c";
992 reg = <0xf8028000 0x100>;
993 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 7>;
995 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
996 AT91_XDMAC_DT_PERID(0))>,
998 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
999 AT91_XDMAC_DT_PERID(1))>;
1000 dma-names = "tx", "rx";
1001 #address-cells = <1>;
1003 clocks = <&twi0_clk>;
1004 status = "disabled";
1008 compatible = "atmel,sama5d2-sfr", "syscon";
1009 reg = <0xf8030000 0x98>;
1012 flx0: flexcom@f8034000 {
1013 compatible = "atmel,sama5d2-flexcom";
1014 reg = <0xf8034000 0x200>;
1015 clocks = <&flx0_clk>;
1016 #address-cells = <1>;
1018 ranges = <0x0 0xf8034000 0x800>;
1019 status = "disabled";
1022 flx1: flexcom@f8038000 {
1023 compatible = "atmel,sama5d2-flexcom";
1024 reg = <0xf8038000 0x200>;
1025 clocks = <&flx1_clk>;
1026 #address-cells = <1>;
1028 ranges = <0x0 0xf8038000 0x800>;
1029 status = "disabled";
1033 compatible = "atmel,sama5d3-rstc";
1034 reg = <0xf8048000 0x10>;
1039 compatible = "atmel,sama5d2-shdwc";
1040 reg = <0xf8048010 0x10>;
1042 #address-cells = <1>;
1044 atmel,wakeup-rtc-timer;
1047 pit: timer@f8048030 {
1048 compatible = "atmel,at91sam9260-pit";
1049 reg = <0xf8048030 0x10>;
1050 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1055 compatible = "atmel,sama5d4-wdt";
1056 reg = <0xf8048040 0x10>;
1057 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
1059 status = "disabled";
1063 compatible = "atmel,at91sam9x5-sckc";
1064 reg = <0xf8048050 0x4>;
1066 slow_rc_osc: slow_rc_osc {
1067 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1069 clock-frequency = <32768>;
1070 clock-accuracy = <250000000>;
1071 atmel,startup-time-usec = <75>;
1074 slow_osc: slow_osc {
1075 compatible = "atmel,at91sam9x5-clk-slow-osc";
1077 clocks = <&slow_xtal>;
1078 atmel,startup-time-usec = <1200000>;
1082 compatible = "atmel,at91sam9x5-clk-slow";
1084 clocks = <&slow_rc_osc &slow_osc>;
1089 compatible = "atmel,at91rm9200-rtc";
1090 reg = <0xf80480b0 0x30>;
1091 interrupts = <74 IRQ_TYPE_LEVEL_HIGH 7>;
1095 spi1: spi@fc000000 {
1096 compatible = "atmel,at91rm9200-spi";
1097 reg = <0xfc000000 0x100>;
1098 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 7>;
1100 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1101 AT91_XDMAC_DT_PERID(8))>,
1103 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1104 AT91_XDMAC_DT_PERID(9))>;
1105 dma-names = "tx", "rx";
1106 clocks = <&spi1_clk>;
1107 clock-names = "spi_clk";
1108 atmel,fifo-size = <16>;
1109 #address-cells = <1>;
1111 status = "disabled";
1114 uart3: serial@fc008000 {
1115 compatible = "atmel,at91sam9260-usart";
1116 reg = <0xfc008000 0x100>;
1117 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 7>;
1119 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1120 AT91_XDMAC_DT_PERID(41))>,
1122 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1123 AT91_XDMAC_DT_PERID(42))>;
1124 dma-names = "tx", "rx";
1125 clocks = <&uart3_clk>;
1126 clock-names = "usart";
1127 status = "disabled";
1130 uart4: serial@fc00c000 {
1131 compatible = "atmel,at91sam9260-usart";
1132 reg = <0xfc00c000 0x100>;
1134 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1135 AT91_XDMAC_DT_PERID(43))>,
1137 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1138 AT91_XDMAC_DT_PERID(44))>;
1139 dma-names = "tx", "rx";
1140 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 7>;
1141 clocks = <&uart4_clk>;
1142 clock-names = "usart";
1143 status = "disabled";
1146 flx2: flexcom@fc010000 {
1147 compatible = "atmel,sama5d2-flexcom";
1148 reg = <0xfc010000 0x200>;
1149 clocks = <&flx2_clk>;
1150 #address-cells = <1>;
1152 ranges = <0x0 0xfc010000 0x800>;
1153 status = "disabled";
1156 flx3: flexcom@fc014000 {
1157 compatible = "atmel,sama5d2-flexcom";
1158 reg = <0xfc014000 0x200>;
1159 clocks = <&flx3_clk>;
1160 #address-cells = <1>;
1162 ranges = <0x0 0xfc014000 0x800>;
1163 status = "disabled";
1166 flx4: flexcom@fc018000 {
1167 compatible = "atmel,sama5d2-flexcom";
1168 reg = <0xfc018000 0x200>;
1169 clocks = <&flx4_clk>;
1170 #address-cells = <1>;
1172 ranges = <0x0 0xfc018000 0x800>;
1173 status = "disabled";
1177 compatible = "atmel,at91sam9g45-trng";
1178 reg = <0xfc01c000 0x100>;
1179 interrupts = <47 IRQ_TYPE_LEVEL_HIGH 0>;
1180 clocks = <&trng_clk>;
1183 aic: interrupt-controller@fc020000 {
1184 #interrupt-cells = <3>;
1185 compatible = "atmel,sama5d2-aic";
1186 interrupt-controller;
1187 reg = <0xfc020000 0x200>;
1188 atmel,external-irqs = <49>;
1191 i2c1: i2c@fc028000 {
1192 compatible = "atmel,sama5d2-i2c";
1193 reg = <0xfc028000 0x100>;
1194 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 7>;
1196 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1197 AT91_XDMAC_DT_PERID(2))>,
1199 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1200 AT91_XDMAC_DT_PERID(3))>;
1201 dma-names = "tx", "rx";
1202 #address-cells = <1>;
1204 clocks = <&twi1_clk>;
1205 status = "disabled";
1209 compatible = "atmel,sama5d2-adc";
1210 reg = <0xfc030000 0x100>;
1211 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 7>;
1212 clocks = <&adc_clk>;
1213 clock-names = "adc_clk";
1214 atmel,min-sample-rate-hz = <200000>;
1215 atmel,max-sample-rate-hz = <20000000>;
1216 atmel,startup-time-ms = <4>;
1217 status = "disabled";
1220 pioA: pinctrl@fc038000 {
1221 compatible = "atmel,sama5d2-pinctrl";
1222 reg = <0xfc038000 0x600>;
1223 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 7>,
1224 <68 IRQ_TYPE_LEVEL_HIGH 7>,
1225 <69 IRQ_TYPE_LEVEL_HIGH 7>,
1226 <70 IRQ_TYPE_LEVEL_HIGH 7>;
1227 interrupt-controller;
1228 #interrupt-cells = <2>;
1231 clocks = <&pioA_clk>;
1235 compatible = "atmel,at91sam9g46-tdes";
1236 reg = <0xfc044000 0x100>;
1237 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
1239 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1240 AT91_XDMAC_DT_PERID(28))>,
1242 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1243 AT91_XDMAC_DT_PERID(29))>;
1244 dma-names = "tx", "rx";
1245 clocks = <&tdes_clk>;
1246 clock-names = "tdes_clk";
1251 compatible = "atmel,sama5d2-chipid";
1252 reg = <0xfc069000 0x8>;