2 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
3 * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC
5 * Copyright (C) 2013 Atmel,
6 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
8 * Licensed under GPLv2 or later.
11 #include "skeleton.dtsi"
12 #include <dt-bindings/dma/at91.h>
13 #include <dt-bindings/pinctrl/at91.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/clk/at91.h>
19 model = "Atmel SAMA5D3 family SoC";
20 compatible = "atmel,sama5d3", "atmel,sama5";
21 interrupt-parent = <&aic>;
47 compatible = "arm,cortex-a5";
53 compatible = "arm,cortex-a5-pmu";
54 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
58 reg = <0x20000000 0x8000000>;
62 adc_op_clk: adc_op_clk{
63 compatible = "fixed-clock";
65 clock-frequency = <20000000>;
70 compatible = "simple-bus";
76 compatible = "simple-bus";
82 compatible = "atmel,hsmci";
83 reg = <0xf0000000 0x600>;
84 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
85 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>;
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
93 clock-names = "mci_clk";
99 compatible = "atmel,at91rm9200-spi";
100 reg = <0xf0004000 0x100>;
101 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
102 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>,
103 <&dma0 2 AT91_DMA_CFG_PER_ID(2)>;
104 dma-names = "tx", "rx";
105 pinctrl-names = "default";
106 pinctrl-0 = <&pinctrl_spi0>;
107 clocks = <&spi0_clk>;
108 clock-names = "spi_clk";
113 compatible = "atmel,at91sam9g45-ssc";
114 reg = <0xf0008000 0x4000>;
115 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
116 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(13)>,
117 <&dma0 2 AT91_DMA_CFG_PER_ID(14)>;
118 dma-names = "tx", "rx";
119 pinctrl-names = "default";
120 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
121 clocks = <&ssc0_clk>;
122 clock-names = "pclk";
126 tcb0: timer@f0010000 {
127 compatible = "atmel,at91sam9x5-tcb";
128 reg = <0xf0010000 0x100>;
129 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
130 clocks = <&tcb0_clk>;
131 clock-names = "t0_clk";
135 compatible = "atmel,at91sam9x5-i2c";
136 reg = <0xf0014000 0x4000>;
137 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
138 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
139 <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
140 dma-names = "tx", "rx";
141 pinctrl-names = "default";
142 pinctrl-0 = <&pinctrl_i2c0>;
143 #address-cells = <1>;
145 clocks = <&twi0_clk>;
150 compatible = "atmel,at91sam9x5-i2c";
151 reg = <0xf0018000 0x4000>;
152 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
153 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
154 <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
155 dma-names = "tx", "rx";
156 pinctrl-names = "default";
157 pinctrl-0 = <&pinctrl_i2c1>;
158 #address-cells = <1>;
160 clocks = <&twi1_clk>;
164 usart0: serial@f001c000 {
165 compatible = "atmel,at91sam9260-usart";
166 reg = <0xf001c000 0x100>;
167 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
168 pinctrl-names = "default";
169 pinctrl-0 = <&pinctrl_usart0>;
170 clocks = <&usart0_clk>;
171 clock-names = "usart";
175 usart1: serial@f0020000 {
176 compatible = "atmel,at91sam9260-usart";
177 reg = <0xf0020000 0x100>;
178 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
179 pinctrl-names = "default";
180 pinctrl-0 = <&pinctrl_usart1>;
181 clocks = <&usart1_clk>;
182 clock-names = "usart";
187 compatible = "atmel,sama5d3-pwm";
188 reg = <0xf002c000 0x300>;
189 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>;
196 compatible = "atmel,at91sam9g45-isi";
197 reg = <0xf0034000 0x4000>;
198 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
203 compatible = "atmel,hsmci";
204 reg = <0xf8000000 0x600>;
205 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
206 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>;
208 pinctrl-names = "default";
209 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
211 #address-cells = <1>;
213 clocks = <&mci1_clk>;
214 clock-names = "mci_clk";
218 #address-cells = <1>;
220 compatible = "atmel,at91rm9200-spi";
221 reg = <0xf8008000 0x100>;
222 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
223 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>,
224 <&dma1 2 AT91_DMA_CFG_PER_ID(16)>;
225 dma-names = "tx", "rx";
226 pinctrl-names = "default";
227 pinctrl-0 = <&pinctrl_spi1>;
228 clocks = <&spi1_clk>;
229 clock-names = "spi_clk";
234 compatible = "atmel,at91sam9g45-ssc";
235 reg = <0xf800c000 0x4000>;
236 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
237 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(3)>,
238 <&dma1 2 AT91_DMA_CFG_PER_ID(4)>;
239 dma-names = "tx", "rx";
240 pinctrl-names = "default";
241 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
242 clocks = <&ssc1_clk>;
243 clock-names = "pclk";
248 #address-cells = <1>;
250 compatible = "atmel,at91sam9x5-adc";
251 reg = <0xf8018000 0x100>;
252 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
253 pinctrl-names = "default";
271 clock-names = "adc_clk", "adc_op_clk";
272 atmel,adc-channels-used = <0xfff>;
273 atmel,adc-startup-time = <40>;
274 atmel,adc-use-external-triggers;
275 atmel,adc-vref = <3000>;
276 atmel,adc-res = <10 12>;
277 atmel,adc-res-names = "lowres", "highres";
282 trigger-name = "external-rising";
283 trigger-value = <0x1>;
288 trigger-name = "external-falling";
289 trigger-value = <0x2>;
294 trigger-name = "external-any";
295 trigger-value = <0x3>;
300 trigger-name = "continuous";
301 trigger-value = <0x6>;
306 compatible = "atmel,at91sam9x5-i2c";
307 reg = <0xf801c000 0x4000>;
308 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
309 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
310 <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
311 dma-names = "tx", "rx";
312 pinctrl-names = "default";
313 pinctrl-0 = <&pinctrl_i2c2>;
314 #address-cells = <1>;
316 clocks = <&twi2_clk>;
320 usart2: serial@f8020000 {
321 compatible = "atmel,at91sam9260-usart";
322 reg = <0xf8020000 0x100>;
323 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
324 pinctrl-names = "default";
325 pinctrl-0 = <&pinctrl_usart2>;
326 clocks = <&usart2_clk>;
327 clock-names = "usart";
331 usart3: serial@f8024000 {
332 compatible = "atmel,at91sam9260-usart";
333 reg = <0xf8024000 0x100>;
334 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
335 pinctrl-names = "default";
336 pinctrl-0 = <&pinctrl_usart3>;
337 clocks = <&usart3_clk>;
338 clock-names = "usart";
343 compatible = "atmel,at91sam9g46-sha";
344 reg = <0xf8034000 0x100>;
345 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
346 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>;
349 clock-names = "sha_clk";
353 compatible = "atmel,at91sam9g46-aes";
354 reg = <0xf8038000 0x100>;
355 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>;
356 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>,
357 <&dma1 2 AT91_DMA_CFG_PER_ID(19)>;
358 dma-names = "tx", "rx";
360 clock-names = "aes_clk";
364 compatible = "atmel,at91sam9g46-tdes";
365 reg = <0xf803c000 0x100>;
366 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
367 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>,
368 <&dma1 2 AT91_DMA_CFG_PER_ID(21)>;
369 dma-names = "tx", "rx";
370 clocks = <&tdes_clk>;
371 clock-names = "tdes_clk";
374 dma0: dma-controller@ffffe600 {
375 compatible = "atmel,at91sam9g45-dma";
376 reg = <0xffffe600 0x200>;
377 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
379 clocks = <&dma0_clk>;
380 clock-names = "dma_clk";
383 dma1: dma-controller@ffffe800 {
384 compatible = "atmel,at91sam9g45-dma";
385 reg = <0xffffe800 0x200>;
386 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
388 clocks = <&dma1_clk>;
389 clock-names = "dma_clk";
392 ramc0: ramc@ffffea00 {
393 compatible = "atmel,at91sam9g45-ddramc";
394 reg = <0xffffea00 0x200>;
397 dbgu: serial@ffffee00 {
398 compatible = "atmel,at91sam9260-usart";
399 reg = <0xffffee00 0x200>;
400 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
401 pinctrl-names = "default";
402 pinctrl-0 = <&pinctrl_dbgu>;
403 clocks = <&dbgu_clk>;
404 clock-names = "usart";
408 aic: interrupt-controller@fffff000 {
409 #interrupt-cells = <3>;
410 compatible = "atmel,sama5d3-aic";
411 interrupt-controller;
412 reg = <0xfffff000 0x200>;
413 atmel,external-irqs = <47>;
417 #address-cells = <1>;
419 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
420 ranges = <0xfffff200 0xfffff200 0xa00>;
423 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */
424 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */
425 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */
426 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */
427 0xffffffff 0xbf9f8000 0x18000000 /* pioE */
430 /* shared pinctrl settings */
432 pinctrl_adc0_adtrg: adc0_adtrg {
434 <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
436 pinctrl_adc0_ad0: adc0_ad0 {
438 <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
440 pinctrl_adc0_ad1: adc0_ad1 {
442 <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
444 pinctrl_adc0_ad2: adc0_ad2 {
446 <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
448 pinctrl_adc0_ad3: adc0_ad3 {
450 <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
452 pinctrl_adc0_ad4: adc0_ad4 {
454 <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
456 pinctrl_adc0_ad5: adc0_ad5 {
458 <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
460 pinctrl_adc0_ad6: adc0_ad6 {
462 <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
464 pinctrl_adc0_ad7: adc0_ad7 {
466 <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
468 pinctrl_adc0_ad8: adc0_ad8 {
470 <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
472 pinctrl_adc0_ad9: adc0_ad9 {
474 <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
476 pinctrl_adc0_ad10: adc0_ad10 {
478 <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
480 pinctrl_adc0_ad11: adc0_ad11 {
482 <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
487 pinctrl_dbgu: dbgu-0 {
489 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB30 periph A */
490 AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB31 periph A with pullup */
495 pinctrl_i2c0: i2c0-0 {
497 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
498 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
503 pinctrl_i2c1: i2c1-0 {
505 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
506 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
511 pinctrl_i2c2: i2c2-0 {
513 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */
514 AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */
521 <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
522 AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
523 AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
524 AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
525 AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
526 AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
527 AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
528 AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
529 AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
530 AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
531 AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
532 AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
533 AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
535 pinctrl_isi_pck_as_mck: isi_pck_as_mck-0 {
537 <AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */
542 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
544 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */
545 AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
546 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */
548 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
550 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
551 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
552 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */
554 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
556 <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
557 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
558 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
559 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
564 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
566 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */
567 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
568 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
570 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
572 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
573 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
574 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
579 pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
581 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */
582 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */
587 pinctrl_spi0: spi0-0 {
589 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */
590 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */
591 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
596 pinctrl_spi1: spi1-0 {
598 <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */
599 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */
600 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
605 pinctrl_ssc0_tx: ssc0_tx {
607 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */
608 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */
609 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
612 pinctrl_ssc0_rx: ssc0_rx {
614 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */
615 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */
616 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
621 pinctrl_ssc1_tx: ssc1_tx {
623 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */
624 AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */
625 AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */
628 pinctrl_ssc1_rx: ssc1_rx {
630 <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */
631 AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */
632 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
637 pinctrl_usart0: usart0-0 {
639 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A */
640 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD18 periph A with pullup */
643 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
645 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
646 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
651 pinctrl_usart1: usart1-0 {
653 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB28 periph A */
654 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB29 periph A with pullup */
657 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
659 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */
660 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
665 pinctrl_usart2: usart2-0 {
667 <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE25 periph B, conflicts with A25 */
668 AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE26 periph B with pullup, conflicts NCS0 */
671 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
673 <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */
674 AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
679 pinctrl_usart3: usart3-0 {
681 <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE18 periph B, conflicts with A18 */
682 AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE19 periph B with pullup, conflicts with A19 */
685 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
687 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */
688 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
693 pioA: gpio@fffff200 {
694 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
695 reg = <0xfffff200 0x100>;
696 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
699 interrupt-controller;
700 #interrupt-cells = <2>;
701 clocks = <&pioA_clk>;
704 pioB: gpio@fffff400 {
705 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
706 reg = <0xfffff400 0x100>;
707 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
710 interrupt-controller;
711 #interrupt-cells = <2>;
712 clocks = <&pioB_clk>;
715 pioC: gpio@fffff600 {
716 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
717 reg = <0xfffff600 0x100>;
718 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
721 interrupt-controller;
722 #interrupt-cells = <2>;
723 clocks = <&pioC_clk>;
726 pioD: gpio@fffff800 {
727 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
728 reg = <0xfffff800 0x100>;
729 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
732 interrupt-controller;
733 #interrupt-cells = <2>;
734 clocks = <&pioD_clk>;
737 pioE: gpio@fffffa00 {
738 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
739 reg = <0xfffffa00 0x100>;
740 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
743 interrupt-controller;
744 #interrupt-cells = <2>;
745 clocks = <&pioE_clk>;
750 compatible = "atmel,sama5d3-pmc";
751 reg = <0xfffffc00 0x120>;
752 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
753 interrupt-controller;
754 #address-cells = <1>;
756 #interrupt-cells = <1>;
759 compatible = "fixed-clock";
761 clock-frequency = <32768>;
765 compatible = "atmel,at91rm9200-clk-main";
767 interrupt-parent = <&pmc>;
768 interrupts = <AT91_PMC_MOSCS>;
773 compatible = "atmel,sama5d3-clk-pll";
775 interrupt-parent = <&pmc>;
776 interrupts = <AT91_PMC_LOCKA>;
779 atmel,clk-input-range = <8000000 50000000>;
780 #atmel,pll-clk-output-range-cells = <4>;
781 atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>;
785 compatible = "atmel,at91sam9x5-clk-plldiv";
791 compatible = "atmel,at91sam9x5-clk-utmi";
793 interrupt-parent = <&pmc>;
794 interrupts = <AT91_PMC_LOCKU>;
799 compatible = "atmel,at91sam9x5-clk-master";
801 interrupt-parent = <&pmc>;
802 interrupts = <AT91_PMC_MCKRDY>;
803 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
804 atmel,clk-output-range = <0 166000000>;
805 atmel,clk-divisors = <1 2 4 3>;
809 compatible = "atmel,at91sam9x5-clk-usb";
811 clocks = <&plladiv>, <&utmi>;
815 compatible = "atmel,at91sam9x5-clk-programmable";
816 #address-cells = <1>;
818 interrupt-parent = <&pmc>;
819 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
824 interrupts = <AT91_PMC_PCKRDY(0)>;
830 interrupts = <AT91_PMC_PCKRDY(1)>;
836 interrupts = <AT91_PMC_PCKRDY(2)>;
841 compatible = "atmel,at91sam9x5-clk-smd";
843 clocks = <&plladiv>, <&utmi>;
847 compatible = "atmel,at91rm9200-clk-system";
848 #address-cells = <1>;
895 compatible = "atmel,at91sam9x5-clk-peripheral";
896 #address-cells = <1>;
930 usart0_clk: usart0_clk {
933 atmel,clk-output-range = <0 66000000>;
936 usart1_clk: usart1_clk {
939 atmel,clk-output-range = <0 66000000>;
942 usart2_clk: usart2_clk {
945 atmel,clk-output-range = <0 66000000>;
948 usart3_clk: usart3_clk {
951 atmel,clk-output-range = <0 66000000>;
957 atmel,clk-output-range = <0 16625000>;
963 atmel,clk-output-range = <0 16625000>;
969 atmel,clk-output-range = <0 16625000>;
985 atmel,clk-output-range = <0 133000000>;
991 atmel,clk-output-range = <0 133000000>;
997 atmel,clk-output-range = <0 133000000>;
1008 atmel,clk-output-range = <0 66000000>;
1011 dma0_clk: dma0_clk {
1016 dma1_clk: dma1_clk {
1021 uhphs_clk: uhphs_clk {
1026 udphs_clk: udphs_clk {
1036 ssc0_clk: ssc0_clk {
1039 atmel,clk-output-range = <0 66000000>;
1042 ssc1_clk: ssc1_clk {
1045 atmel,clk-output-range = <0 66000000>;
1058 tdes_clk: tdes_clk {
1063 trng_clk: trng_clk {
1068 fuse_clk: fuse_clk {
1076 compatible = "atmel,at91sam9g45-rstc";
1077 reg = <0xfffffe00 0x10>;
1080 pit: timer@fffffe30 {
1081 compatible = "atmel,at91sam9260-pit";
1082 reg = <0xfffffe30 0xf>;
1083 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1088 compatible = "atmel,at91sam9260-wdt";
1089 reg = <0xfffffe40 0x10>;
1090 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
1091 atmel,watchdog-type = "hardware";
1092 atmel,reset-type = "all";
1095 status = "disabled";
1099 compatible = "atmel,at91rm9200-rtc";
1100 reg = <0xfffffeb0 0x30>;
1101 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1105 usb0: gadget@00500000 {
1106 #address-cells = <1>;
1108 compatible = "atmel,at91sam9rl-udc";
1109 reg = <0x00500000 0x100000
1111 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
1112 clocks = <&udphs_clk>, <&utmi>;
1113 clock-names = "pclk", "hclk";
1114 status = "disabled";
1118 atmel,fifo-size = <64>;
1119 atmel,nb-banks = <1>;
1124 atmel,fifo-size = <1024>;
1125 atmel,nb-banks = <3>;
1132 atmel,fifo-size = <1024>;
1133 atmel,nb-banks = <3>;
1140 atmel,fifo-size = <1024>;
1141 atmel,nb-banks = <2>;
1147 atmel,fifo-size = <1024>;
1148 atmel,nb-banks = <2>;
1154 atmel,fifo-size = <1024>;
1155 atmel,nb-banks = <2>;
1161 atmel,fifo-size = <1024>;
1162 atmel,nb-banks = <2>;
1168 atmel,fifo-size = <1024>;
1169 atmel,nb-banks = <2>;
1175 atmel,fifo-size = <1024>;
1176 atmel,nb-banks = <2>;
1181 atmel,fifo-size = <1024>;
1182 atmel,nb-banks = <2>;
1187 atmel,fifo-size = <1024>;
1188 atmel,nb-banks = <2>;
1193 atmel,fifo-size = <1024>;
1194 atmel,nb-banks = <2>;
1199 atmel,fifo-size = <1024>;
1200 atmel,nb-banks = <2>;
1205 atmel,fifo-size = <1024>;
1206 atmel,nb-banks = <2>;
1211 atmel,fifo-size = <1024>;
1212 atmel,nb-banks = <2>;
1217 atmel,fifo-size = <1024>;
1218 atmel,nb-banks = <2>;
1222 usb1: ohci@00600000 {
1223 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1224 reg = <0x00600000 0x100000>;
1225 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1226 clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>,
1228 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
1229 status = "disabled";
1232 usb2: ehci@00700000 {
1233 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1234 reg = <0x00700000 0x100000>;
1235 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1236 clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
1237 clock-names = "usb_clk", "ehci_clk", "uhpck";
1238 status = "disabled";
1241 nand0: nand@60000000 {
1242 compatible = "atmel,at91rm9200-nand";
1243 #address-cells = <1>;
1246 reg = < 0x60000000 0x01000000 /* EBI CS3 */
1247 0xffffc070 0x00000490 /* SMC PMECC regs */
1248 0xffffc500 0x00000100 /* SMC PMECC Error Location regs */
1249 0x00110000 0x00018000 /* ROM code */
1251 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
1252 atmel,nand-addr-offset = <21>;
1253 atmel,nand-cmd-offset = <22>;
1255 pinctrl-names = "default";
1256 pinctrl-0 = <&pinctrl_nand0_ale_cle>;
1257 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
1258 status = "disabled";
1261 compatible = "atmel,sama5d3-nfc";
1262 #address-cells = <1>;
1265 0x70000000 0x10000000 /* NFC Command Registers */
1266 0xffffc000 0x00000070 /* NFC HSMC regs */
1267 0x00200000 0x00100000 /* NFC SRAM banks */