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Merge tag 'at91-dt' of git://github.com/at91linux/linux-at91 into next/dt
[deliverable/linux.git] / arch / arm / boot / dts / sama5d3.dtsi
1 /*
2 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
3 * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35 SoC
4 *
5 * Copyright (C) 2013 Atmel,
6 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
7 *
8 * Licensed under GPLv2 or later.
9 */
10
11 #include "skeleton.dtsi"
12 #include <dt-bindings/dma/at91.h>
13 #include <dt-bindings/pinctrl/at91.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/gpio/gpio.h>
16
17 / {
18 model = "Atmel SAMA5D3 family SoC";
19 compatible = "atmel,sama5d3", "atmel,sama5";
20 interrupt-parent = <&aic>;
21
22 aliases {
23 serial0 = &dbgu;
24 serial1 = &usart0;
25 serial2 = &usart1;
26 serial3 = &usart2;
27 serial4 = &usart3;
28 gpio0 = &pioA;
29 gpio1 = &pioB;
30 gpio2 = &pioC;
31 gpio3 = &pioD;
32 gpio4 = &pioE;
33 tcb0 = &tcb0;
34 tcb1 = &tcb1;
35 i2c0 = &i2c0;
36 i2c1 = &i2c1;
37 i2c2 = &i2c2;
38 ssc0 = &ssc0;
39 ssc1 = &ssc1;
40 };
41 cpus {
42 #address-cells = <1>;
43 #size-cells = <0>;
44 cpu@0 {
45 device_type = "cpu";
46 compatible = "arm,cortex-a5";
47 reg = <0x0>;
48 };
49 };
50
51 memory {
52 reg = <0x20000000 0x8000000>;
53 };
54
55 ahb {
56 compatible = "simple-bus";
57 #address-cells = <1>;
58 #size-cells = <1>;
59 ranges;
60
61 apb {
62 compatible = "simple-bus";
63 #address-cells = <1>;
64 #size-cells = <1>;
65 ranges;
66
67 mmc0: mmc@f0000000 {
68 compatible = "atmel,hsmci";
69 reg = <0xf0000000 0x600>;
70 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
71 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>;
72 dma-names = "rxtx";
73 pinctrl-names = "default";
74 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
75 status = "disabled";
76 #address-cells = <1>;
77 #size-cells = <0>;
78 };
79
80 spi0: spi@f0004000 {
81 #address-cells = <1>;
82 #size-cells = <0>;
83 compatible = "atmel,at91rm9200-spi";
84 reg = <0xf0004000 0x100>;
85 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
86 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>,
87 <&dma0 2 AT91_DMA_CFG_PER_ID(2)>;
88 dma-names = "tx", "rx";
89 pinctrl-names = "default";
90 pinctrl-0 = <&pinctrl_spi0>;
91 status = "disabled";
92 };
93
94 ssc0: ssc@f0008000 {
95 compatible = "atmel,at91sam9g45-ssc";
96 reg = <0xf0008000 0x4000>;
97 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
98 pinctrl-names = "default";
99 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
100 status = "disabled";
101 };
102
103 can0: can@f000c000 {
104 compatible = "atmel,at91sam9x5-can";
105 reg = <0xf000c000 0x300>;
106 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>;
107 pinctrl-names = "default";
108 pinctrl-0 = <&pinctrl_can0_rx_tx>;
109 status = "disabled";
110 };
111
112 tcb0: timer@f0010000 {
113 compatible = "atmel,at91sam9x5-tcb";
114 reg = <0xf0010000 0x100>;
115 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
116 };
117
118 i2c0: i2c@f0014000 {
119 compatible = "atmel,at91sam9x5-i2c";
120 reg = <0xf0014000 0x4000>;
121 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
122 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
123 <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
124 dma-names = "tx", "rx";
125 pinctrl-names = "default";
126 pinctrl-0 = <&pinctrl_i2c0>;
127 #address-cells = <1>;
128 #size-cells = <0>;
129 status = "disabled";
130 };
131
132 i2c1: i2c@f0018000 {
133 compatible = "atmel,at91sam9x5-i2c";
134 reg = <0xf0018000 0x4000>;
135 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
136 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
137 <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
138 dma-names = "tx", "rx";
139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_i2c1>;
141 #address-cells = <1>;
142 #size-cells = <0>;
143 status = "disabled";
144 };
145
146 usart0: serial@f001c000 {
147 compatible = "atmel,at91sam9260-usart";
148 reg = <0xf001c000 0x100>;
149 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
150 pinctrl-names = "default";
151 pinctrl-0 = <&pinctrl_usart0>;
152 status = "disabled";
153 };
154
155 usart1: serial@f0020000 {
156 compatible = "atmel,at91sam9260-usart";
157 reg = <0xf0020000 0x100>;
158 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
159 pinctrl-names = "default";
160 pinctrl-0 = <&pinctrl_usart1>;
161 status = "disabled";
162 };
163
164 macb0: ethernet@f0028000 {
165 compatible = "cdns,pc302-gem", "cdns,gem";
166 reg = <0xf0028000 0x100>;
167 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 3>;
168 pinctrl-names = "default";
169 pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>;
170 status = "disabled";
171 };
172
173 isi: isi@f0034000 {
174 compatible = "atmel,at91sam9g45-isi";
175 reg = <0xf0034000 0x4000>;
176 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
177 status = "disabled";
178 };
179
180 mmc1: mmc@f8000000 {
181 compatible = "atmel,hsmci";
182 reg = <0xf8000000 0x600>;
183 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
184 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>;
185 dma-names = "rxtx";
186 pinctrl-names = "default";
187 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
188 status = "disabled";
189 #address-cells = <1>;
190 #size-cells = <0>;
191 };
192
193 mmc2: mmc@f8004000 {
194 compatible = "atmel,hsmci";
195 reg = <0xf8004000 0x600>;
196 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
197 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(1)>;
198 dma-names = "rxtx";
199 pinctrl-names = "default";
200 pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>;
201 status = "disabled";
202 #address-cells = <1>;
203 #size-cells = <0>;
204 };
205
206 spi1: spi@f8008000 {
207 #address-cells = <1>;
208 #size-cells = <0>;
209 compatible = "atmel,at91rm9200-spi";
210 reg = <0xf8008000 0x100>;
211 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
212 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>,
213 <&dma1 2 AT91_DMA_CFG_PER_ID(16)>;
214 dma-names = "tx", "rx";
215 pinctrl-names = "default";
216 pinctrl-0 = <&pinctrl_spi1>;
217 status = "disabled";
218 };
219
220 ssc1: ssc@f800c000 {
221 compatible = "atmel,at91sam9g45-ssc";
222 reg = <0xf800c000 0x4000>;
223 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
224 pinctrl-names = "default";
225 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
226 status = "disabled";
227 };
228
229 can1: can@f8010000 {
230 compatible = "atmel,at91sam9x5-can";
231 reg = <0xf8010000 0x300>;
232 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>;
233 pinctrl-names = "default";
234 pinctrl-0 = <&pinctrl_can1_rx_tx>;
235 };
236
237 tcb1: timer@f8014000 {
238 compatible = "atmel,at91sam9x5-tcb";
239 reg = <0xf8014000 0x100>;
240 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
241 };
242
243 adc0: adc@f8018000 {
244 compatible = "atmel,at91sam9260-adc";
245 reg = <0xf8018000 0x100>;
246 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
247 pinctrl-names = "default";
248 pinctrl-0 = <
249 &pinctrl_adc0_adtrg
250 &pinctrl_adc0_ad0
251 &pinctrl_adc0_ad1
252 &pinctrl_adc0_ad2
253 &pinctrl_adc0_ad3
254 &pinctrl_adc0_ad4
255 &pinctrl_adc0_ad5
256 &pinctrl_adc0_ad6
257 &pinctrl_adc0_ad7
258 &pinctrl_adc0_ad8
259 &pinctrl_adc0_ad9
260 &pinctrl_adc0_ad10
261 &pinctrl_adc0_ad11
262 >;
263 atmel,adc-channel-base = <0x50>;
264 atmel,adc-channels-used = <0xfff>;
265 atmel,adc-drdy-mask = <0x1000000>;
266 atmel,adc-num-channels = <12>;
267 atmel,adc-startup-time = <40>;
268 atmel,adc-status-register = <0x30>;
269 atmel,adc-trigger-register = <0xc0>;
270 atmel,adc-use-external;
271 atmel,adc-vref = <3000>;
272 atmel,adc-res = <10 12>;
273 atmel,adc-res-names = "lowres", "highres";
274 status = "disabled";
275
276 trigger@0 {
277 trigger-name = "external-rising";
278 trigger-value = <0x1>;
279 trigger-external;
280 };
281 trigger@1 {
282 trigger-name = "external-falling";
283 trigger-value = <0x2>;
284 trigger-external;
285 };
286 trigger@2 {
287 trigger-name = "external-any";
288 trigger-value = <0x3>;
289 trigger-external;
290 };
291 trigger@3 {
292 trigger-name = "continuous";
293 trigger-value = <0x6>;
294 };
295 };
296
297 tsadcc: tsadcc@f8018000 {
298 compatible = "atmel,at91sam9x5-tsadcc";
299 reg = <0xf8018000 0x4000>;
300 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
301 atmel,tsadcc_clock = <300000>;
302 atmel,filtering_average = <0x03>;
303 atmel,pendet_debounce = <0x08>;
304 atmel,pendet_sensitivity = <0x02>;
305 atmel,ts_sample_hold_time = <0x0a>;
306 status = "disabled";
307 };
308
309 i2c2: i2c@f801c000 {
310 compatible = "atmel,at91sam9x5-i2c";
311 reg = <0xf801c000 0x4000>;
312 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
313 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
314 <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
315 dma-names = "tx", "rx";
316 #address-cells = <1>;
317 #size-cells = <0>;
318 status = "disabled";
319 };
320
321 usart2: serial@f8020000 {
322 compatible = "atmel,at91sam9260-usart";
323 reg = <0xf8020000 0x100>;
324 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
325 pinctrl-names = "default";
326 pinctrl-0 = <&pinctrl_usart2>;
327 status = "disabled";
328 };
329
330 usart3: serial@f8024000 {
331 compatible = "atmel,at91sam9260-usart";
332 reg = <0xf8024000 0x100>;
333 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
334 pinctrl-names = "default";
335 pinctrl-0 = <&pinctrl_usart3>;
336 status = "disabled";
337 };
338
339 macb1: ethernet@f802c000 {
340 compatible = "cdns,at32ap7000-macb", "cdns,macb";
341 reg = <0xf802c000 0x100>;
342 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>;
343 pinctrl-names = "default";
344 pinctrl-0 = <&pinctrl_macb1_rmii>;
345 status = "disabled";
346 };
347
348 sha@f8034000 {
349 compatible = "atmel,sam9g46-sha";
350 reg = <0xf8034000 0x100>;
351 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
352 };
353
354 aes@f8038000 {
355 compatible = "atmel,sam9g46-aes";
356 reg = <0xf8038000 0x100>;
357 interrupts = <43 4 0>;
358 };
359
360 tdes@f803c000 {
361 compatible = "atmel,sam9g46-tdes";
362 reg = <0xf803c000 0x100>;
363 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
364 };
365
366 dma0: dma-controller@ffffe600 {
367 compatible = "atmel,at91sam9g45-dma";
368 reg = <0xffffe600 0x200>;
369 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
370 #dma-cells = <2>;
371 };
372
373 dma1: dma-controller@ffffe800 {
374 compatible = "atmel,at91sam9g45-dma";
375 reg = <0xffffe800 0x200>;
376 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
377 #dma-cells = <2>;
378 };
379
380 ramc0: ramc@ffffea00 {
381 compatible = "atmel,at91sam9g45-ddramc";
382 reg = <0xffffea00 0x200>;
383 };
384
385 dbgu: serial@ffffee00 {
386 compatible = "atmel,at91sam9260-usart";
387 reg = <0xffffee00 0x200>;
388 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
389 pinctrl-names = "default";
390 pinctrl-0 = <&pinctrl_dbgu>;
391 status = "disabled";
392 };
393
394 aic: interrupt-controller@fffff000 {
395 #interrupt-cells = <3>;
396 compatible = "atmel,sama5d3-aic";
397 interrupt-controller;
398 reg = <0xfffff000 0x200>;
399 atmel,external-irqs = <47>;
400 };
401
402 pinctrl@fffff200 {
403 #address-cells = <1>;
404 #size-cells = <1>;
405 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
406 ranges = <0xfffff200 0xfffff200 0xa00>;
407 atmel,mux-mask = <
408 /* A B C */
409 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */
410 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */
411 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */
412 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */
413 0xffffffff 0xbf9f8000 0x18000000 /* pioE */
414 >;
415
416 /* shared pinctrl settings */
417 adc0 {
418 pinctrl_adc0_adtrg: adc0_adtrg {
419 atmel,pins =
420 <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
421 };
422 pinctrl_adc0_ad0: adc0_ad0 {
423 atmel,pins =
424 <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
425 };
426 pinctrl_adc0_ad1: adc0_ad1 {
427 atmel,pins =
428 <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
429 };
430 pinctrl_adc0_ad2: adc0_ad2 {
431 atmel,pins =
432 <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
433 };
434 pinctrl_adc0_ad3: adc0_ad3 {
435 atmel,pins =
436 <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
437 };
438 pinctrl_adc0_ad4: adc0_ad4 {
439 atmel,pins =
440 <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
441 };
442 pinctrl_adc0_ad5: adc0_ad5 {
443 atmel,pins =
444 <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
445 };
446 pinctrl_adc0_ad6: adc0_ad6 {
447 atmel,pins =
448 <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
449 };
450 pinctrl_adc0_ad7: adc0_ad7 {
451 atmel,pins =
452 <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
453 };
454 pinctrl_adc0_ad8: adc0_ad8 {
455 atmel,pins =
456 <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
457 };
458 pinctrl_adc0_ad9: adc0_ad9 {
459 atmel,pins =
460 <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
461 };
462 pinctrl_adc0_ad10: adc0_ad10 {
463 atmel,pins =
464 <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
465 };
466 pinctrl_adc0_ad11: adc0_ad11 {
467 atmel,pins =
468 <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
469 };
470 };
471
472 can0 {
473 pinctrl_can0_rx_tx: can0_rx_tx {
474 atmel,pins =
475 <AT91_PIOD 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1 */
476 AT91_PIOD 15 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS2 */
477 };
478 };
479
480 can1 {
481 pinctrl_can1_rx_tx: can1_rx_tx {
482 atmel,pins =
483 <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B RX, conflicts with GCRS */
484 AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B TX, conflicts with GCOL */
485 };
486 };
487
488 dbgu {
489 pinctrl_dbgu: dbgu-0 {
490 atmel,pins =
491 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB30 periph A */
492 AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB31 periph A with pullup */
493 };
494 };
495
496 i2c0 {
497 pinctrl_i2c0: i2c0-0 {
498 atmel,pins =
499 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
500 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
501 };
502 };
503
504 i2c1 {
505 pinctrl_i2c1: i2c1-0 {
506 atmel,pins =
507 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
508 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
509 };
510 };
511
512 isi {
513 pinctrl_isi: isi-0 {
514 atmel,pins =
515 <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
516 AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
517 AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
518 AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
519 AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
520 AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
521 AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
522 AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
523 AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
524 AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
525 AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
526 AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
527 AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
528 };
529 pinctrl_isi_pck_as_mck: isi_pck_as_mck-0 {
530 atmel,pins =
531 <AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */
532 };
533 };
534
535 lcd {
536 pinctrl_lcd: lcd-0 {
537 atmel,pins =
538 <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA24 periph A LCDPWM */
539 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA26 periph A LCDVSYNC */
540 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA27 periph A LCDHSYNC */
541 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA25 periph A LCDDISP */
542 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA29 periph A LCDDEN */
543 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA28 periph A LCDPCK */
544 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A LCDD0 pin */
545 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A LCDD1 pin */
546 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA2 periph A LCDD2 pin */
547 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA3 periph A LCDD3 pin */
548 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA4 periph A LCDD4 pin */
549 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA5 periph A LCDD5 pin */
550 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA6 periph A LCDD6 pin */
551 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A LCDD7 pin */
552 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A LCDD8 pin */
553 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A LCDD9 pin */
554 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A LCDD10 pin */
555 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A LCDD11 pin */
556 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A LCDD12 pin */
557 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A LCDD13 pin */
558 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A LCDD14 pin */
559 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A LCDD15 pin */
560 AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC14 periph C LCDD16 pin */
561 AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC13 periph C LCDD17 pin */
562 AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC12 periph C LCDD18 pin */
563 AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC11 periph C LCDD19 pin */
564 AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC10 periph C LCDD20 pin */
565 AT91_PIOC 15 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC15 periph C LCDD21 pin */
566 AT91_PIOE 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PE27 periph C LCDD22 pin */
567 AT91_PIOE 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PE28 periph C LCDD23 pin */
568 };
569 };
570
571 macb0 {
572 pinctrl_macb0_data_rgmii: macb0_data_rgmii {
573 atmel,pins =
574 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A GTX0, conflicts with PWMH0 */
575 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A GTX1, conflicts with PWML0 */
576 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A GTX2, conflicts with TK1 */
577 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A GTX3, conflicts with TF1 */
578 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A GRX0, conflicts with PWMH1 */
579 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A GRX1, conflicts with PWML1 */
580 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A GRX2, conflicts with TD1 */
581 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A GRX3, conflicts with RK1 */
582 };
583 pinctrl_macb0_data_gmii: macb0_data_gmii {
584 atmel,pins =
585 <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB19 periph B GTX4, conflicts with MCI1_CDA */
586 AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB20 periph B GTX5, conflicts with MCI1_DA0 */
587 AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB21 periph B GTX6, conflicts with MCI1_DA1 */
588 AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB22 periph B GTX7, conflicts with MCI1_DA2 */
589 AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB23 periph B GRX4, conflicts with MCI1_DA3 */
590 AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB24 periph B GRX5, conflicts with MCI1_CK */
591 AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB25 periph B GRX6, conflicts with SCK1 */
592 AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB26 periph B GRX7, conflicts with CTS1 */
593 };
594 pinctrl_macb0_signal_rgmii: macb0_signal_rgmii {
595 atmel,pins =
596 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A GTXCK, conflicts with PWMH2 */
597 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */
598 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */
599 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */
600 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */
601 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */
602 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A G125CK */
603 };
604 pinctrl_macb0_signal_gmii: macb0_signal_gmii {
605 atmel,pins =
606 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */
607 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A GTXER, conflicts with RF1 */
608 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */
609 AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A GRXDV, conflicts with PWMH3 */
610 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */
611 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A GCRS, conflicts with CANRX1 */
612 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A GCOL, conflicts with CANTX1 */
613 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */
614 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */
615 AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB27 periph B G125CKO */
616 };
617
618 };
619
620 macb1 {
621 pinctrl_macb1_rmii: macb1_rmii-0 {
622 atmel,pins =
623 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC0 periph A ETX0, conflicts with TIOA3 */
624 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A ETX1, conflicts with TIOB3 */
625 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A ERX0, conflicts with TCLK3 */
626 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A ERX1, conflicts with TIOA4 */
627 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC4 periph A ETXEN, conflicts with TIOB4 */
628 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC5 periph A ECRSDV,conflicts with TCLK4 */
629 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A ERXER, conflicts with TIOA5 */
630 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A EREFCK, conflicts with TIOB5 */
631 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A EMDC, conflicts with TCLK5 */
632 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC9 periph A EMDIO */
633 };
634 };
635
636 mmc0 {
637 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
638 atmel,pins =
639 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */
640 AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
641 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */
642 };
643 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
644 atmel,pins =
645 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
646 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
647 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */
648 };
649 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
650 atmel,pins =
651 <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
652 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
653 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
654 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
655 };
656 };
657
658 mmc1 {
659 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
660 atmel,pins =
661 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */
662 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
663 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
664 };
665 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
666 atmel,pins =
667 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
668 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
669 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
670 };
671 };
672
673 mmc2 {
674 pinctrl_mmc2_clk_cmd_dat0: mmc2_clk_cmd_dat0 {
675 atmel,pins =
676 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A MCI2_CK, conflicts with PCK2 */
677 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC10 periph A MCI2_CDA with pullup */
678 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC11 periph A MCI2_DA0 with pullup */
679 };
680 pinctrl_mmc2_dat1_3: mmc2_dat1_3 {
681 atmel,pins =
682 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC12 periph A MCI2_DA1 with pullup, conflicts with TIOA1 */
683 AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC13 periph A MCI2_DA2 with pullup, conflicts with TIOB1 */
684 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC14 periph A MCI2_DA3 with pullup, conflicts with TCLK1 */
685 };
686 };
687
688 nand0 {
689 pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
690 atmel,pins =
691 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */
692 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */
693 };
694 };
695
696 spi0 {
697 pinctrl_spi0: spi0-0 {
698 atmel,pins =
699 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */
700 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */
701 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
702 };
703 };
704
705 spi1 {
706 pinctrl_spi1: spi1-0 {
707 atmel,pins =
708 <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */
709 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */
710 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
711 };
712 };
713
714 ssc0 {
715 pinctrl_ssc0_tx: ssc0_tx {
716 atmel,pins =
717 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */
718 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */
719 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
720 };
721
722 pinctrl_ssc0_rx: ssc0_rx {
723 atmel,pins =
724 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */
725 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */
726 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
727 };
728 };
729
730 ssc1 {
731 pinctrl_ssc1_tx: ssc1_tx {
732 atmel,pins =
733 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */
734 AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */
735 AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */
736 };
737
738 pinctrl_ssc1_rx: ssc1_rx {
739 atmel,pins =
740 <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */
741 AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */
742 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
743 };
744 };
745
746 uart0 {
747 pinctrl_uart0: uart0-0 {
748 atmel,pins =
749 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC29 periph A, conflicts with PWMFI2, ISI_D8 */
750 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC30 periph A with pullup, conflicts with ISI_PCK */
751 };
752 };
753
754 uart1 {
755 pinctrl_uart1: uart1-0 {
756 atmel,pins =
757 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA30 periph B, conflicts with TWD0, ISI_VSYNC */
758 AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA31 periph B with pullup, conflicts with TWCK0, ISI_HSYNC */
759 };
760 };
761
762 usart0 {
763 pinctrl_usart0: usart0-0 {
764 atmel,pins =
765 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A */
766 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD18 periph A with pullup */
767 };
768
769 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
770 atmel,pins =
771 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
772 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
773 };
774 };
775
776 usart1 {
777 pinctrl_usart1: usart1-0 {
778 atmel,pins =
779 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB28 periph A */
780 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB29 periph A with pullup */
781 };
782
783 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
784 atmel,pins =
785 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */
786 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
787 };
788 };
789
790 usart2 {
791 pinctrl_usart2: usart2-0 {
792 atmel,pins =
793 <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE25 periph B, conflicts with A25 */
794 AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE26 periph B with pullup, conflicts NCS0 */
795 };
796
797 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
798 atmel,pins =
799 <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */
800 AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
801 };
802 };
803
804 usart3 {
805 pinctrl_usart3: usart3-0 {
806 atmel,pins =
807 <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE18 periph B, conflicts with A18 */
808 AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE19 periph B with pullup, conflicts with A19 */
809 };
810
811 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
812 atmel,pins =
813 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */
814 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
815 };
816 };
817
818
819 pioA: gpio@fffff200 {
820 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
821 reg = <0xfffff200 0x100>;
822 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
823 #gpio-cells = <2>;
824 gpio-controller;
825 interrupt-controller;
826 #interrupt-cells = <2>;
827 };
828
829 pioB: gpio@fffff400 {
830 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
831 reg = <0xfffff400 0x100>;
832 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
833 #gpio-cells = <2>;
834 gpio-controller;
835 interrupt-controller;
836 #interrupt-cells = <2>;
837 };
838
839 pioC: gpio@fffff600 {
840 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
841 reg = <0xfffff600 0x100>;
842 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
843 #gpio-cells = <2>;
844 gpio-controller;
845 interrupt-controller;
846 #interrupt-cells = <2>;
847 };
848
849 pioD: gpio@fffff800 {
850 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
851 reg = <0xfffff800 0x100>;
852 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
853 #gpio-cells = <2>;
854 gpio-controller;
855 interrupt-controller;
856 #interrupt-cells = <2>;
857 };
858
859 pioE: gpio@fffffa00 {
860 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
861 reg = <0xfffffa00 0x100>;
862 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
863 #gpio-cells = <2>;
864 gpio-controller;
865 interrupt-controller;
866 #interrupt-cells = <2>;
867 };
868 };
869
870 pmc: pmc@fffffc00 {
871 compatible = "atmel,at91rm9200-pmc";
872 reg = <0xfffffc00 0x120>;
873 };
874
875 rstc@fffffe00 {
876 compatible = "atmel,at91sam9g45-rstc";
877 reg = <0xfffffe00 0x10>;
878 };
879
880 pit: timer@fffffe30 {
881 compatible = "atmel,at91sam9260-pit";
882 reg = <0xfffffe30 0xf>;
883 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
884 };
885
886 watchdog@fffffe40 {
887 compatible = "atmel,at91sam9260-wdt";
888 reg = <0xfffffe40 0x10>;
889 status = "disabled";
890 };
891
892 rtc@fffffeb0 {
893 compatible = "atmel,at91rm9200-rtc";
894 reg = <0xfffffeb0 0x30>;
895 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
896 };
897 };
898
899 usb0: gadget@00500000 {
900 #address-cells = <1>;
901 #size-cells = <0>;
902 compatible = "atmel,at91sam9rl-udc";
903 reg = <0x00500000 0x100000
904 0xf8030000 0x4000>;
905 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
906 status = "disabled";
907
908 ep0 {
909 reg = <0>;
910 atmel,fifo-size = <64>;
911 atmel,nb-banks = <1>;
912 };
913
914 ep1 {
915 reg = <1>;
916 atmel,fifo-size = <1024>;
917 atmel,nb-banks = <3>;
918 atmel,can-dma;
919 atmel,can-isoc;
920 };
921
922 ep2 {
923 reg = <2>;
924 atmel,fifo-size = <1024>;
925 atmel,nb-banks = <3>;
926 atmel,can-dma;
927 atmel,can-isoc;
928 };
929
930 ep3 {
931 reg = <3>;
932 atmel,fifo-size = <1024>;
933 atmel,nb-banks = <2>;
934 atmel,can-dma;
935 };
936
937 ep4 {
938 reg = <4>;
939 atmel,fifo-size = <1024>;
940 atmel,nb-banks = <2>;
941 atmel,can-dma;
942 };
943
944 ep5 {
945 reg = <5>;
946 atmel,fifo-size = <1024>;
947 atmel,nb-banks = <2>;
948 atmel,can-dma;
949 };
950
951 ep6 {
952 reg = <6>;
953 atmel,fifo-size = <1024>;
954 atmel,nb-banks = <2>;
955 atmel,can-dma;
956 };
957
958 ep7 {
959 reg = <7>;
960 atmel,fifo-size = <1024>;
961 atmel,nb-banks = <2>;
962 atmel,can-dma;
963 };
964
965 ep8 {
966 reg = <8>;
967 atmel,fifo-size = <1024>;
968 atmel,nb-banks = <2>;
969 };
970
971 ep9 {
972 reg = <9>;
973 atmel,fifo-size = <1024>;
974 atmel,nb-banks = <2>;
975 };
976
977 ep10 {
978 reg = <10>;
979 atmel,fifo-size = <1024>;
980 atmel,nb-banks = <2>;
981 };
982
983 ep11 {
984 reg = <11>;
985 atmel,fifo-size = <1024>;
986 atmel,nb-banks = <2>;
987 };
988
989 ep12 {
990 reg = <12>;
991 atmel,fifo-size = <1024>;
992 atmel,nb-banks = <2>;
993 };
994
995 ep13 {
996 reg = <13>;
997 atmel,fifo-size = <1024>;
998 atmel,nb-banks = <2>;
999 };
1000
1001 ep14 {
1002 reg = <14>;
1003 atmel,fifo-size = <1024>;
1004 atmel,nb-banks = <2>;
1005 };
1006
1007 ep15 {
1008 reg = <15>;
1009 atmel,fifo-size = <1024>;
1010 atmel,nb-banks = <2>;
1011 };
1012 };
1013
1014 usb1: ohci@00600000 {
1015 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1016 reg = <0x00600000 0x100000>;
1017 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1018 status = "disabled";
1019 };
1020
1021 usb2: ehci@00700000 {
1022 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1023 reg = <0x00700000 0x100000>;
1024 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1025 status = "disabled";
1026 };
1027
1028 nand0: nand@60000000 {
1029 compatible = "atmel,at91rm9200-nand";
1030 #address-cells = <1>;
1031 #size-cells = <1>;
1032 reg = < 0x60000000 0x01000000 /* EBI CS3 */
1033 0xffffc070 0x00000490 /* SMC PMECC regs */
1034 0xffffc500 0x00000100 /* SMC PMECC Error Location regs */
1035 0x00100000 0x00100000 /* ROM code */
1036 0x70000000 0x10000000 /* NFC Command Registers */
1037 0xffffc000 0x00000070 /* NFC HSMC regs */
1038 0x00200000 0x00100000 /* NFC SRAM banks */
1039 >;
1040 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
1041 atmel,nand-addr-offset = <21>;
1042 atmel,nand-cmd-offset = <22>;
1043 pinctrl-names = "default";
1044 pinctrl-0 = <&pinctrl_nand0_ale_cle>;
1045 atmel,pmecc-lookup-table-offset = <0x10000 0x18000>;
1046 status = "disabled";
1047 };
1048 };
1049 };
Linux kernel - Deliverables
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