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Merge tag 'at91-dt' of git://github.com/at91linux/linux-at91 into next/dt
[deliverable/linux.git] / arch / arm / boot / dts / sama5d3.dtsi
1 /*
2 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
3 * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35 SoC
4 *
5 * Copyright (C) 2013 Atmel,
6 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
7 *
8 * Licensed under GPLv2 or later.
9 */
10
11 #include "skeleton.dtsi"
12 #include <dt-bindings/dma/at91.h>
13 #include <dt-bindings/pinctrl/at91.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/gpio/gpio.h>
16
17 / {
18 model = "Atmel SAMA5D3 family SoC";
19 compatible = "atmel,sama5d3", "atmel,sama5";
20 interrupt-parent = <&aic>;
21
22 aliases {
23 serial0 = &dbgu;
24 serial1 = &usart0;
25 serial2 = &usart1;
26 serial3 = &usart2;
27 serial4 = &usart3;
28 gpio0 = &pioA;
29 gpio1 = &pioB;
30 gpio2 = &pioC;
31 gpio3 = &pioD;
32 gpio4 = &pioE;
33 tcb0 = &tcb0;
34 tcb1 = &tcb1;
35 i2c0 = &i2c0;
36 i2c1 = &i2c1;
37 i2c2 = &i2c2;
38 ssc0 = &ssc0;
39 ssc1 = &ssc1;
40 };
41 cpus {
42 #address-cells = <1>;
43 #size-cells = <0>;
44 cpu@0 {
45 device_type = "cpu";
46 compatible = "arm,cortex-a5";
47 reg = <0x0>;
48 };
49 };
50
51 memory {
52 reg = <0x20000000 0x8000000>;
53 };
54
55 ahb {
56 compatible = "simple-bus";
57 #address-cells = <1>;
58 #size-cells = <1>;
59 ranges;
60
61 apb {
62 compatible = "simple-bus";
63 #address-cells = <1>;
64 #size-cells = <1>;
65 ranges;
66
67 mmc0: mmc@f0000000 {
68 compatible = "atmel,hsmci";
69 reg = <0xf0000000 0x600>;
70 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
71 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>;
72 dma-names = "rxtx";
73 pinctrl-names = "default";
74 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
75 status = "disabled";
76 #address-cells = <1>;
77 #size-cells = <0>;
78 };
79
80 spi0: spi@f0004000 {
81 #address-cells = <1>;
82 #size-cells = <0>;
83 compatible = "atmel,at91sam9x5-spi";
84 reg = <0xf0004000 0x100>;
85 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
86 pinctrl-names = "default";
87 pinctrl-0 = <&pinctrl_spi0>;
88 status = "disabled";
89 };
90
91 ssc0: ssc@f0008000 {
92 compatible = "atmel,at91sam9g45-ssc";
93 reg = <0xf0008000 0x4000>;
94 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
95 pinctrl-names = "default";
96 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
97 status = "disabled";
98 };
99
100 can0: can@f000c000 {
101 compatible = "atmel,at91sam9x5-can";
102 reg = <0xf000c000 0x300>;
103 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>;
104 pinctrl-names = "default";
105 pinctrl-0 = <&pinctrl_can0_rx_tx>;
106 status = "disabled";
107 };
108
109 tcb0: timer@f0010000 {
110 compatible = "atmel,at91sam9x5-tcb";
111 reg = <0xf0010000 0x100>;
112 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
113 };
114
115 i2c0: i2c@f0014000 {
116 compatible = "atmel,at91sam9x5-i2c";
117 reg = <0xf0014000 0x4000>;
118 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
119 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
120 <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
121 dma-names = "tx", "rx";
122 pinctrl-names = "default";
123 pinctrl-0 = <&pinctrl_i2c0>;
124 #address-cells = <1>;
125 #size-cells = <0>;
126 status = "disabled";
127 };
128
129 i2c1: i2c@f0018000 {
130 compatible = "atmel,at91sam9x5-i2c";
131 reg = <0xf0018000 0x4000>;
132 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
133 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
134 <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
135 dma-names = "tx", "rx";
136 pinctrl-names = "default";
137 pinctrl-0 = <&pinctrl_i2c1>;
138 #address-cells = <1>;
139 #size-cells = <0>;
140 status = "disabled";
141 };
142
143 usart0: serial@f001c000 {
144 compatible = "atmel,at91sam9260-usart";
145 reg = <0xf001c000 0x100>;
146 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
147 pinctrl-names = "default";
148 pinctrl-0 = <&pinctrl_usart0>;
149 status = "disabled";
150 };
151
152 usart1: serial@f0020000 {
153 compatible = "atmel,at91sam9260-usart";
154 reg = <0xf0020000 0x100>;
155 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
156 pinctrl-names = "default";
157 pinctrl-0 = <&pinctrl_usart1>;
158 status = "disabled";
159 };
160
161 macb0: ethernet@f0028000 {
162 compatible = "cdns,pc302-gem", "cdns,gem";
163 reg = <0xf0028000 0x100>;
164 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 3>;
165 pinctrl-names = "default";
166 pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>;
167 status = "disabled";
168 };
169
170 isi: isi@f0034000 {
171 compatible = "atmel,at91sam9g45-isi";
172 reg = <0xf0034000 0x4000>;
173 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
174 status = "disabled";
175 };
176
177 mmc1: mmc@f8000000 {
178 compatible = "atmel,hsmci";
179 reg = <0xf8000000 0x600>;
180 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
181 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>;
182 dma-names = "rxtx";
183 pinctrl-names = "default";
184 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
185 status = "disabled";
186 #address-cells = <1>;
187 #size-cells = <0>;
188 };
189
190 mmc2: mmc@f8004000 {
191 compatible = "atmel,hsmci";
192 reg = <0xf8004000 0x600>;
193 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
194 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(1)>;
195 dma-names = "rxtx";
196 pinctrl-names = "default";
197 pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>;
198 status = "disabled";
199 #address-cells = <1>;
200 #size-cells = <0>;
201 };
202
203 spi1: spi@f8008000 {
204 #address-cells = <1>;
205 #size-cells = <0>;
206 compatible = "atmel,at91sam9x5-spi";
207 reg = <0xf8008000 0x100>;
208 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
209 pinctrl-names = "default";
210 pinctrl-0 = <&pinctrl_spi1>;
211 status = "disabled";
212 };
213
214 ssc1: ssc@f800c000 {
215 compatible = "atmel,at91sam9g45-ssc";
216 reg = <0xf800c000 0x4000>;
217 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
218 pinctrl-names = "default";
219 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
220 status = "disabled";
221 };
222
223 can1: can@f8010000 {
224 compatible = "atmel,at91sam9x5-can";
225 reg = <0xf8010000 0x300>;
226 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>;
227 pinctrl-names = "default";
228 pinctrl-0 = <&pinctrl_can1_rx_tx>;
229 };
230
231 tcb1: timer@f8014000 {
232 compatible = "atmel,at91sam9x5-tcb";
233 reg = <0xf8014000 0x100>;
234 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
235 };
236
237 adc0: adc@f8018000 {
238 compatible = "atmel,at91sam9260-adc";
239 reg = <0xf8018000 0x100>;
240 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
241 pinctrl-names = "default";
242 pinctrl-0 = <
243 &pinctrl_adc0_adtrg
244 &pinctrl_adc0_ad0
245 &pinctrl_adc0_ad1
246 &pinctrl_adc0_ad2
247 &pinctrl_adc0_ad3
248 &pinctrl_adc0_ad4
249 &pinctrl_adc0_ad5
250 &pinctrl_adc0_ad6
251 &pinctrl_adc0_ad7
252 &pinctrl_adc0_ad8
253 &pinctrl_adc0_ad9
254 &pinctrl_adc0_ad10
255 &pinctrl_adc0_ad11
256 >;
257 atmel,adc-channel-base = <0x50>;
258 atmel,adc-channels-used = <0xfff>;
259 atmel,adc-drdy-mask = <0x1000000>;
260 atmel,adc-num-channels = <12>;
261 atmel,adc-startup-time = <40>;
262 atmel,adc-status-register = <0x30>;
263 atmel,adc-trigger-register = <0xc0>;
264 atmel,adc-use-external;
265 atmel,adc-vref = <3000>;
266 atmel,adc-res = <10 12>;
267 atmel,adc-res-names = "lowres", "highres";
268 status = "disabled";
269
270 trigger@0 {
271 trigger-name = "external-rising";
272 trigger-value = <0x1>;
273 trigger-external;
274 };
275 trigger@1 {
276 trigger-name = "external-falling";
277 trigger-value = <0x2>;
278 trigger-external;
279 };
280 trigger@2 {
281 trigger-name = "external-any";
282 trigger-value = <0x3>;
283 trigger-external;
284 };
285 trigger@3 {
286 trigger-name = "continuous";
287 trigger-value = <0x6>;
288 };
289 };
290
291 tsadcc: tsadcc@f8018000 {
292 compatible = "atmel,at91sam9x5-tsadcc";
293 reg = <0xf8018000 0x4000>;
294 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
295 atmel,tsadcc_clock = <300000>;
296 atmel,filtering_average = <0x03>;
297 atmel,pendet_debounce = <0x08>;
298 atmel,pendet_sensitivity = <0x02>;
299 atmel,ts_sample_hold_time = <0x0a>;
300 status = "disabled";
301 };
302
303 i2c2: i2c@f801c000 {
304 compatible = "atmel,at91sam9x5-i2c";
305 reg = <0xf801c000 0x4000>;
306 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
307 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
308 <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
309 dma-names = "tx", "rx";
310 #address-cells = <1>;
311 #size-cells = <0>;
312 status = "disabled";
313 };
314
315 usart2: serial@f8020000 {
316 compatible = "atmel,at91sam9260-usart";
317 reg = <0xf8020000 0x100>;
318 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
319 pinctrl-names = "default";
320 pinctrl-0 = <&pinctrl_usart2>;
321 status = "disabled";
322 };
323
324 usart3: serial@f8024000 {
325 compatible = "atmel,at91sam9260-usart";
326 reg = <0xf8024000 0x100>;
327 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
328 pinctrl-names = "default";
329 pinctrl-0 = <&pinctrl_usart3>;
330 status = "disabled";
331 };
332
333 macb1: ethernet@f802c000 {
334 compatible = "cdns,at32ap7000-macb", "cdns,macb";
335 reg = <0xf802c000 0x100>;
336 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>;
337 pinctrl-names = "default";
338 pinctrl-0 = <&pinctrl_macb1_rmii>;
339 status = "disabled";
340 };
341
342 sha@f8034000 {
343 compatible = "atmel,sam9g46-sha";
344 reg = <0xf8034000 0x100>;
345 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
346 };
347
348 aes@f8038000 {
349 compatible = "atmel,sam9g46-aes";
350 reg = <0xf8038000 0x100>;
351 interrupts = <43 4 0>;
352 };
353
354 tdes@f803c000 {
355 compatible = "atmel,sam9g46-tdes";
356 reg = <0xf803c000 0x100>;
357 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
358 };
359
360 dma0: dma-controller@ffffe600 {
361 compatible = "atmel,at91sam9g45-dma";
362 reg = <0xffffe600 0x200>;
363 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
364 #dma-cells = <2>;
365 };
366
367 dma1: dma-controller@ffffe800 {
368 compatible = "atmel,at91sam9g45-dma";
369 reg = <0xffffe800 0x200>;
370 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
371 #dma-cells = <2>;
372 };
373
374 ramc0: ramc@ffffea00 {
375 compatible = "atmel,at91sam9g45-ddramc";
376 reg = <0xffffea00 0x200>;
377 };
378
379 dbgu: serial@ffffee00 {
380 compatible = "atmel,at91sam9260-usart";
381 reg = <0xffffee00 0x200>;
382 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
383 pinctrl-names = "default";
384 pinctrl-0 = <&pinctrl_dbgu>;
385 status = "disabled";
386 };
387
388 aic: interrupt-controller@fffff000 {
389 #interrupt-cells = <3>;
390 compatible = "atmel,sama5d3-aic";
391 interrupt-controller;
392 reg = <0xfffff000 0x200>;
393 atmel,external-irqs = <47>;
394 };
395
396 pinctrl@fffff200 {
397 #address-cells = <1>;
398 #size-cells = <1>;
399 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
400 ranges = <0xfffff200 0xfffff200 0xa00>;
401 atmel,mux-mask = <
402 /* A B C */
403 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */
404 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */
405 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */
406 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */
407 0xffffffff 0xbf9f8000 0x18000000 /* pioE */
408 >;
409
410 /* shared pinctrl settings */
411 adc0 {
412 pinctrl_adc0_adtrg: adc0_adtrg {
413 atmel,pins =
414 <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
415 };
416 pinctrl_adc0_ad0: adc0_ad0 {
417 atmel,pins =
418 <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
419 };
420 pinctrl_adc0_ad1: adc0_ad1 {
421 atmel,pins =
422 <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
423 };
424 pinctrl_adc0_ad2: adc0_ad2 {
425 atmel,pins =
426 <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
427 };
428 pinctrl_adc0_ad3: adc0_ad3 {
429 atmel,pins =
430 <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
431 };
432 pinctrl_adc0_ad4: adc0_ad4 {
433 atmel,pins =
434 <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
435 };
436 pinctrl_adc0_ad5: adc0_ad5 {
437 atmel,pins =
438 <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
439 };
440 pinctrl_adc0_ad6: adc0_ad6 {
441 atmel,pins =
442 <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
443 };
444 pinctrl_adc0_ad7: adc0_ad7 {
445 atmel,pins =
446 <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
447 };
448 pinctrl_adc0_ad8: adc0_ad8 {
449 atmel,pins =
450 <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
451 };
452 pinctrl_adc0_ad9: adc0_ad9 {
453 atmel,pins =
454 <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
455 };
456 pinctrl_adc0_ad10: adc0_ad10 {
457 atmel,pins =
458 <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
459 };
460 pinctrl_adc0_ad11: adc0_ad11 {
461 atmel,pins =
462 <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
463 };
464 };
465
466 can0 {
467 pinctrl_can0_rx_tx: can0_rx_tx {
468 atmel,pins =
469 <AT91_PIOD 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1 */
470 AT91_PIOD 15 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS2 */
471 };
472 };
473
474 can1 {
475 pinctrl_can1_rx_tx: can1_rx_tx {
476 atmel,pins =
477 <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B RX, conflicts with GCRS */
478 AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B TX, conflicts with GCOL */
479 };
480 };
481
482 dbgu {
483 pinctrl_dbgu: dbgu-0 {
484 atmel,pins =
485 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB30 periph A */
486 AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB31 periph A with pullup */
487 };
488 };
489
490 i2c0 {
491 pinctrl_i2c0: i2c0-0 {
492 atmel,pins =
493 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
494 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
495 };
496 };
497
498 i2c1 {
499 pinctrl_i2c1: i2c1-0 {
500 atmel,pins =
501 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
502 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
503 };
504 };
505
506 isi {
507 pinctrl_isi: isi-0 {
508 atmel,pins =
509 <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
510 AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
511 AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
512 AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
513 AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
514 AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
515 AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
516 AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
517 AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
518 AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
519 AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
520 AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
521 AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
522 };
523 pinctrl_isi_pck_as_mck: isi_pck_as_mck-0 {
524 atmel,pins =
525 <AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */
526 };
527 };
528
529 lcd {
530 pinctrl_lcd: lcd-0 {
531 atmel,pins =
532 <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA24 periph A LCDPWM */
533 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA26 periph A LCDVSYNC */
534 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA27 periph A LCDHSYNC */
535 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA25 periph A LCDDISP */
536 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA29 periph A LCDDEN */
537 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA28 periph A LCDPCK */
538 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A LCDD0 pin */
539 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A LCDD1 pin */
540 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA2 periph A LCDD2 pin */
541 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA3 periph A LCDD3 pin */
542 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA4 periph A LCDD4 pin */
543 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA5 periph A LCDD5 pin */
544 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA6 periph A LCDD6 pin */
545 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A LCDD7 pin */
546 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A LCDD8 pin */
547 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A LCDD9 pin */
548 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A LCDD10 pin */
549 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A LCDD11 pin */
550 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A LCDD12 pin */
551 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A LCDD13 pin */
552 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A LCDD14 pin */
553 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A LCDD15 pin */
554 AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC14 periph C LCDD16 pin */
555 AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC13 periph C LCDD17 pin */
556 AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC12 periph C LCDD18 pin */
557 AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC11 periph C LCDD19 pin */
558 AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC10 periph C LCDD20 pin */
559 AT91_PIOC 15 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC15 periph C LCDD21 pin */
560 AT91_PIOE 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PE27 periph C LCDD22 pin */
561 AT91_PIOE 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PE28 periph C LCDD23 pin */
562 };
563 };
564
565 macb0 {
566 pinctrl_macb0_data_rgmii: macb0_data_rgmii {
567 atmel,pins =
568 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A GTX0, conflicts with PWMH0 */
569 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A GTX1, conflicts with PWML0 */
570 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A GTX2, conflicts with TK1 */
571 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A GTX3, conflicts with TF1 */
572 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A GRX0, conflicts with PWMH1 */
573 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A GRX1, conflicts with PWML1 */
574 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A GRX2, conflicts with TD1 */
575 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A GRX3, conflicts with RK1 */
576 };
577 pinctrl_macb0_data_gmii: macb0_data_gmii {
578 atmel,pins =
579 <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB19 periph B GTX4, conflicts with MCI1_CDA */
580 AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB20 periph B GTX5, conflicts with MCI1_DA0 */
581 AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB21 periph B GTX6, conflicts with MCI1_DA1 */
582 AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB22 periph B GTX7, conflicts with MCI1_DA2 */
583 AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB23 periph B GRX4, conflicts with MCI1_DA3 */
584 AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB24 periph B GRX5, conflicts with MCI1_CK */
585 AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB25 periph B GRX6, conflicts with SCK1 */
586 AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB26 periph B GRX7, conflicts with CTS1 */
587 };
588 pinctrl_macb0_signal_rgmii: macb0_signal_rgmii {
589 atmel,pins =
590 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A GTXCK, conflicts with PWMH2 */
591 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */
592 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */
593 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */
594 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */
595 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */
596 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A G125CK */
597 };
598 pinctrl_macb0_signal_gmii: macb0_signal_gmii {
599 atmel,pins =
600 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */
601 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A GTXER, conflicts with RF1 */
602 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */
603 AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A GRXDV, conflicts with PWMH3 */
604 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */
605 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A GCRS, conflicts with CANRX1 */
606 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A GCOL, conflicts with CANTX1 */
607 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */
608 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */
609 AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB27 periph B G125CKO */
610 };
611
612 };
613
614 macb1 {
615 pinctrl_macb1_rmii: macb1_rmii-0 {
616 atmel,pins =
617 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC0 periph A ETX0, conflicts with TIOA3 */
618 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A ETX1, conflicts with TIOB3 */
619 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A ERX0, conflicts with TCLK3 */
620 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A ERX1, conflicts with TIOA4 */
621 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC4 periph A ETXEN, conflicts with TIOB4 */
622 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC5 periph A ECRSDV,conflicts with TCLK4 */
623 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A ERXER, conflicts with TIOA5 */
624 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A EREFCK, conflicts with TIOB5 */
625 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A EMDC, conflicts with TCLK5 */
626 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC9 periph A EMDIO */
627 };
628 };
629
630 mmc0 {
631 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
632 atmel,pins =
633 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */
634 AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
635 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */
636 };
637 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
638 atmel,pins =
639 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
640 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
641 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */
642 };
643 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
644 atmel,pins =
645 <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
646 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
647 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
648 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
649 };
650 };
651
652 mmc1 {
653 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
654 atmel,pins =
655 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */
656 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
657 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
658 };
659 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
660 atmel,pins =
661 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
662 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
663 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
664 };
665 };
666
667 mmc2 {
668 pinctrl_mmc2_clk_cmd_dat0: mmc2_clk_cmd_dat0 {
669 atmel,pins =
670 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A MCI2_CK, conflicts with PCK2 */
671 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC10 periph A MCI2_CDA with pullup */
672 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC11 periph A MCI2_DA0 with pullup */
673 };
674 pinctrl_mmc2_dat1_3: mmc2_dat1_3 {
675 atmel,pins =
676 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC12 periph A MCI2_DA1 with pullup, conflicts with TIOA1 */
677 AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC13 periph A MCI2_DA2 with pullup, conflicts with TIOB1 */
678 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC14 periph A MCI2_DA3 with pullup, conflicts with TCLK1 */
679 };
680 };
681
682 nand0 {
683 pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
684 atmel,pins =
685 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */
686 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */
687 };
688 };
689
690 spi0 {
691 pinctrl_spi0: spi0-0 {
692 atmel,pins =
693 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */
694 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */
695 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
696 };
697 };
698
699 spi1 {
700 pinctrl_spi1: spi1-0 {
701 atmel,pins =
702 <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */
703 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */
704 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
705 };
706 };
707
708 ssc0 {
709 pinctrl_ssc0_tx: ssc0_tx {
710 atmel,pins =
711 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */
712 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */
713 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
714 };
715
716 pinctrl_ssc0_rx: ssc0_rx {
717 atmel,pins =
718 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */
719 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */
720 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
721 };
722 };
723
724 ssc1 {
725 pinctrl_ssc1_tx: ssc1_tx {
726 atmel,pins =
727 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */
728 AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */
729 AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */
730 };
731
732 pinctrl_ssc1_rx: ssc1_rx {
733 atmel,pins =
734 <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */
735 AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */
736 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
737 };
738 };
739
740 uart0 {
741 pinctrl_uart0: uart0-0 {
742 atmel,pins =
743 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC29 periph A, conflicts with PWMFI2, ISI_D8 */
744 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC30 periph A with pullup, conflicts with ISI_PCK */
745 };
746 };
747
748 uart1 {
749 pinctrl_uart1: uart1-0 {
750 atmel,pins =
751 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA30 periph B, conflicts with TWD0, ISI_VSYNC */
752 AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA31 periph B with pullup, conflicts with TWCK0, ISI_HSYNC */
753 };
754 };
755
756 usart0 {
757 pinctrl_usart0: usart0-0 {
758 atmel,pins =
759 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A */
760 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD18 periph A with pullup */
761 };
762
763 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
764 atmel,pins =
765 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
766 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
767 };
768 };
769
770 usart1 {
771 pinctrl_usart1: usart1-0 {
772 atmel,pins =
773 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB28 periph A */
774 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB29 periph A with pullup */
775 };
776
777 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
778 atmel,pins =
779 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */
780 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
781 };
782 };
783
784 usart2 {
785 pinctrl_usart2: usart2-0 {
786 atmel,pins =
787 <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE25 periph B, conflicts with A25 */
788 AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE26 periph B with pullup, conflicts NCS0 */
789 };
790
791 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
792 atmel,pins =
793 <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */
794 AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
795 };
796 };
797
798 usart3 {
799 pinctrl_usart3: usart3-0 {
800 atmel,pins =
801 <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE18 periph B, conflicts with A18 */
802 AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE19 periph B with pullup, conflicts with A19 */
803 };
804
805 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
806 atmel,pins =
807 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */
808 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
809 };
810 };
811
812
813 pioA: gpio@fffff200 {
814 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
815 reg = <0xfffff200 0x100>;
816 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
817 #gpio-cells = <2>;
818 gpio-controller;
819 interrupt-controller;
820 #interrupt-cells = <2>;
821 };
822
823 pioB: gpio@fffff400 {
824 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
825 reg = <0xfffff400 0x100>;
826 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
827 #gpio-cells = <2>;
828 gpio-controller;
829 interrupt-controller;
830 #interrupt-cells = <2>;
831 };
832
833 pioC: gpio@fffff600 {
834 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
835 reg = <0xfffff600 0x100>;
836 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
837 #gpio-cells = <2>;
838 gpio-controller;
839 interrupt-controller;
840 #interrupt-cells = <2>;
841 };
842
843 pioD: gpio@fffff800 {
844 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
845 reg = <0xfffff800 0x100>;
846 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
847 #gpio-cells = <2>;
848 gpio-controller;
849 interrupt-controller;
850 #interrupt-cells = <2>;
851 };
852
853 pioE: gpio@fffffa00 {
854 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
855 reg = <0xfffffa00 0x100>;
856 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
857 #gpio-cells = <2>;
858 gpio-controller;
859 interrupt-controller;
860 #interrupt-cells = <2>;
861 };
862 };
863
864 pmc: pmc@fffffc00 {
865 compatible = "atmel,at91rm9200-pmc";
866 reg = <0xfffffc00 0x120>;
867 };
868
869 rstc@fffffe00 {
870 compatible = "atmel,at91sam9g45-rstc";
871 reg = <0xfffffe00 0x10>;
872 };
873
874 pit: timer@fffffe30 {
875 compatible = "atmel,at91sam9260-pit";
876 reg = <0xfffffe30 0xf>;
877 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
878 };
879
880 watchdog@fffffe40 {
881 compatible = "atmel,at91sam9260-wdt";
882 reg = <0xfffffe40 0x10>;
883 status = "disabled";
884 };
885
886 rtc@fffffeb0 {
887 compatible = "atmel,at91rm9200-rtc";
888 reg = <0xfffffeb0 0x30>;
889 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
890 };
891 };
892
893 usb0: gadget@00500000 {
894 #address-cells = <1>;
895 #size-cells = <0>;
896 compatible = "atmel,at91sam9rl-udc";
897 reg = <0x00500000 0x100000
898 0xf8030000 0x4000>;
899 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
900 status = "disabled";
901
902 ep0 {
903 reg = <0>;
904 atmel,fifo-size = <64>;
905 atmel,nb-banks = <1>;
906 };
907
908 ep1 {
909 reg = <1>;
910 atmel,fifo-size = <1024>;
911 atmel,nb-banks = <3>;
912 atmel,can-dma;
913 atmel,can-isoc;
914 };
915
916 ep2 {
917 reg = <2>;
918 atmel,fifo-size = <1024>;
919 atmel,nb-banks = <3>;
920 atmel,can-dma;
921 atmel,can-isoc;
922 };
923
924 ep3 {
925 reg = <3>;
926 atmel,fifo-size = <1024>;
927 atmel,nb-banks = <2>;
928 atmel,can-dma;
929 };
930
931 ep4 {
932 reg = <4>;
933 atmel,fifo-size = <1024>;
934 atmel,nb-banks = <2>;
935 atmel,can-dma;
936 };
937
938 ep5 {
939 reg = <5>;
940 atmel,fifo-size = <1024>;
941 atmel,nb-banks = <2>;
942 atmel,can-dma;
943 };
944
945 ep6 {
946 reg = <6>;
947 atmel,fifo-size = <1024>;
948 atmel,nb-banks = <2>;
949 atmel,can-dma;
950 };
951
952 ep7 {
953 reg = <7>;
954 atmel,fifo-size = <1024>;
955 atmel,nb-banks = <2>;
956 atmel,can-dma;
957 };
958
959 ep8 {
960 reg = <8>;
961 atmel,fifo-size = <1024>;
962 atmel,nb-banks = <2>;
963 };
964
965 ep9 {
966 reg = <9>;
967 atmel,fifo-size = <1024>;
968 atmel,nb-banks = <2>;
969 };
970
971 ep10 {
972 reg = <10>;
973 atmel,fifo-size = <1024>;
974 atmel,nb-banks = <2>;
975 };
976
977 ep11 {
978 reg = <11>;
979 atmel,fifo-size = <1024>;
980 atmel,nb-banks = <2>;
981 };
982
983 ep12 {
984 reg = <12>;
985 atmel,fifo-size = <1024>;
986 atmel,nb-banks = <2>;
987 };
988
989 ep13 {
990 reg = <13>;
991 atmel,fifo-size = <1024>;
992 atmel,nb-banks = <2>;
993 };
994
995 ep14 {
996 reg = <14>;
997 atmel,fifo-size = <1024>;
998 atmel,nb-banks = <2>;
999 };
1000
1001 ep15 {
1002 reg = <15>;
1003 atmel,fifo-size = <1024>;
1004 atmel,nb-banks = <2>;
1005 };
1006 };
1007
1008 usb1: ohci@00600000 {
1009 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1010 reg = <0x00600000 0x100000>;
1011 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1012 status = "disabled";
1013 };
1014
1015 usb2: ehci@00700000 {
1016 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1017 reg = <0x00700000 0x100000>;
1018 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1019 status = "disabled";
1020 };
1021
1022 nand0: nand@60000000 {
1023 compatible = "atmel,at91rm9200-nand";
1024 #address-cells = <1>;
1025 #size-cells = <1>;
1026 reg = < 0x60000000 0x01000000 /* EBI CS3 */
1027 0xffffc070 0x00000490 /* SMC PMECC regs */
1028 0xffffc500 0x00000100 /* SMC PMECC Error Location regs */
1029 0x00100000 0x00100000 /* ROM code */
1030 0x70000000 0x10000000 /* NFC Command Registers */
1031 0xffffc000 0x00000070 /* NFC HSMC regs */
1032 0x00200000 0x00100000 /* NFC SRAM banks */
1033 >;
1034 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
1035 atmel,nand-addr-offset = <21>;
1036 atmel,nand-cmd-offset = <22>;
1037 pinctrl-names = "default";
1038 pinctrl-0 = <&pinctrl_nand0_ale_cle>;
1039 atmel,pmecc-lookup-table-offset = <0x10000 0x18000>;
1040 status = "disabled";
1041 };
1042 };
1043 };
Linux kernel - Deliverables
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