arch/arm/boot/dts/stih41x.dtsi

   1 / {
   2         #address-cells = <1>;
   3         #size-cells = <1>;
   4
   5         cpus {
   6                 #address-cells = <1>;
   7                 #size-cells = <0>;
   8                 cpu@0 {
   9                         device_type = "cpu";
  10                         compatible = "arm,cortex-a9";
  11                         reg = <0>;
  12                 };
  13                 cpu@1 {
  14                         device_type = "cpu";
  15                         compatible = "arm,cortex-a9";
  16                         reg = <1>;
  17                 };
  18         };
  19
  20         intc: interrupt-controller@fffe1000 {
  21                 compatible = "arm,cortex-a9-gic";
  22                 #interrupt-cells = <3>;
  23                 interrupt-controller;
  24                 reg = <0xfffe1000 0x1000>,
  25                       <0xfffe0100 0x100>;
  26         };
  27
  28         scu@fffe0000 {
  29                 compatible = "arm,cortex-a9-scu";
  30                 reg = <0xfffe0000 0x1000>;
  31         };
  32
  33         timer@fffe0200 {
  34                 interrupt-parent = <&intc>;
  35                 compatible = "arm,cortex-a9-global-timer";
  36                 reg = <0xfffe0200 0x100>;
  37                 interrupts = <1 11 0x04>;
  38                 clocks = <&arm_periph_clk>;
  39         };
  40 };