Merge remote-tracking branch 'spi/topic/build' into spi-next
[deliverable/linux.git] / arch / arm / boot / dts / tegra20-whistler.dts
1 /dts-v1/;
2
3 #include "tegra20.dtsi"
4
5 / {
6 model = "NVIDIA Tegra20 Whistler evaluation board";
7 compatible = "nvidia,whistler", "nvidia,tegra20";
8
9 memory {
10 reg = <0x00000000 0x20000000>;
11 };
12
13 host1x {
14 hdmi {
15 status = "okay";
16
17 vdd-supply = <&hdmi_vdd_reg>;
18 pll-supply = <&hdmi_pll_reg>;
19
20 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
21 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
22 GPIO_ACTIVE_HIGH>;
23 };
24 };
25
26 pinmux {
27 pinctrl-names = "default";
28 pinctrl-0 = <&state_default>;
29
30 state_default: pinmux {
31 ata {
32 nvidia,pins = "ata", "atb", "ate", "gma", "gmb",
33 "gmc", "gmd", "gpu";
34 nvidia,function = "gmi";
35 };
36 atc {
37 nvidia,pins = "atc", "atd";
38 nvidia,function = "sdio4";
39 };
40 cdev1 {
41 nvidia,pins = "cdev1";
42 nvidia,function = "plla_out";
43 };
44 cdev2 {
45 nvidia,pins = "cdev2";
46 nvidia,function = "osc";
47 };
48 crtp {
49 nvidia,pins = "crtp";
50 nvidia,function = "crt";
51 };
52 csus {
53 nvidia,pins = "csus";
54 nvidia,function = "vi_sensor_clk";
55 };
56 dap1 {
57 nvidia,pins = "dap1";
58 nvidia,function = "dap1";
59 };
60 dap2 {
61 nvidia,pins = "dap2";
62 nvidia,function = "dap2";
63 };
64 dap3 {
65 nvidia,pins = "dap3";
66 nvidia,function = "dap3";
67 };
68 dap4 {
69 nvidia,pins = "dap4";
70 nvidia,function = "dap4";
71 };
72 ddc {
73 nvidia,pins = "ddc";
74 nvidia,function = "i2c2";
75 };
76 dta {
77 nvidia,pins = "dta", "dtb", "dtc", "dtd";
78 nvidia,function = "vi";
79 };
80 dte {
81 nvidia,pins = "dte";
82 nvidia,function = "rsvd1";
83 };
84 dtf {
85 nvidia,pins = "dtf";
86 nvidia,function = "i2c3";
87 };
88 gme {
89 nvidia,pins = "gme";
90 nvidia,function = "dap5";
91 };
92 gpu7 {
93 nvidia,pins = "gpu7";
94 nvidia,function = "rtck";
95 };
96 gpv {
97 nvidia,pins = "gpv";
98 nvidia,function = "pcie";
99 };
100 hdint {
101 nvidia,pins = "hdint", "pta";
102 nvidia,function = "hdmi";
103 };
104 i2cp {
105 nvidia,pins = "i2cp";
106 nvidia,function = "i2cp";
107 };
108 irrx {
109 nvidia,pins = "irrx", "irtx";
110 nvidia,function = "uartb";
111 };
112 kbca {
113 nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";
114 nvidia,function = "kbc";
115 };
116 kbcb {
117 nvidia,pins = "kbcb", "kbcd";
118 nvidia,function = "sdio2";
119 };
120 lcsn {
121 nvidia,pins = "lcsn", "lsck", "lsda", "lsdi",
122 "spia", "spib", "spic";
123 nvidia,function = "spi3";
124 };
125 ld0 {
126 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
127 "ld5", "ld6", "ld7", "ld8", "ld9",
128 "ld10", "ld11", "ld12", "ld13", "ld14",
129 "ld15", "ld16", "ld17", "ldc", "ldi",
130 "lhp0", "lhp1", "lhp2", "lhs", "lm0",
131 "lm1", "lpp", "lpw0", "lpw1", "lpw2",
132 "lsc0", "lsc1", "lspi", "lvp0", "lvp1",
133 "lvs";
134 nvidia,function = "displaya";
135 };
136 owc {
137 nvidia,pins = "owc", "uac";
138 nvidia,function = "owr";
139 };
140 pmc {
141 nvidia,pins = "pmc";
142 nvidia,function = "pwr_on";
143 };
144 rm {
145 nvidia,pins = "rm";
146 nvidia,function = "i2c1";
147 };
148 sdb {
149 nvidia,pins = "sdb", "sdc", "sdd", "slxa",
150 "slxc", "slxd", "slxk";
151 nvidia,function = "sdio3";
152 };
153 sdio1 {
154 nvidia,pins = "sdio1";
155 nvidia,function = "sdio1";
156 };
157 spdi {
158 nvidia,pins = "spdi", "spdo";
159 nvidia,function = "rsvd2";
160 };
161 spid {
162 nvidia,pins = "spid", "spie", "spig", "spih";
163 nvidia,function = "spi2_alt";
164 };
165 spif {
166 nvidia,pins = "spif";
167 nvidia,function = "spi2";
168 };
169 uaa {
170 nvidia,pins = "uaa", "uab";
171 nvidia,function = "uarta";
172 };
173 uad {
174 nvidia,pins = "uad";
175 nvidia,function = "irda";
176 };
177 uca {
178 nvidia,pins = "uca", "ucb";
179 nvidia,function = "uartc";
180 };
181 uda {
182 nvidia,pins = "uda";
183 nvidia,function = "spi1";
184 };
185 conf_ata {
186 nvidia,pins = "ata", "atb", "atc", "ddc", "gma",
187 "gmb", "gmc", "gmd", "irrx", "irtx",
188 "kbca", "kbcb", "kbcc", "kbcd", "kbce",
189 "kbcf", "sdc", "sdd", "spie", "spig",
190 "spih", "uaa", "uab", "uad", "uca",
191 "ucb";
192 nvidia,pull = <2>;
193 nvidia,tristate = <0>;
194 };
195 conf_atd {
196 nvidia,pins = "atd", "ate", "cdev1", "csus",
197 "dap1", "dap2", "dap3", "dap4", "dte",
198 "dtf", "gpu", "gpu7", "gpv", "i2cp",
199 "rm", "sdio1", "slxa", "slxc", "slxd",
200 "slxk", "spdi", "spdo", "uac", "uda";
201 nvidia,pull = <0>;
202 nvidia,tristate = <0>;
203 };
204 conf_cdev2 {
205 nvidia,pins = "cdev2", "spia", "spib";
206 nvidia,pull = <1>;
207 nvidia,tristate = <1>;
208 };
209 conf_ck32 {
210 nvidia,pins = "ck32", "ddrc", "lc", "pmca",
211 "pmcb", "pmcc", "pmcd", "xm2c",
212 "xm2d";
213 nvidia,pull = <0>;
214 };
215 conf_crtp {
216 nvidia,pins = "crtp";
217 nvidia,pull = <0>;
218 nvidia,tristate = <1>;
219 };
220 conf_dta {
221 nvidia,pins = "dta", "dtb", "dtc", "dtd",
222 "spid", "spif";
223 nvidia,pull = <1>;
224 nvidia,tristate = <0>;
225 };
226 conf_gme {
227 nvidia,pins = "gme", "owc", "pta", "spic";
228 nvidia,pull = <2>;
229 nvidia,tristate = <1>;
230 };
231 conf_ld17_0 {
232 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
233 "ld23_22";
234 nvidia,pull = <1>;
235 };
236 conf_ls {
237 nvidia,pins = "ls", "pmce";
238 nvidia,pull = <2>;
239 };
240 drive_dap1 {
241 nvidia,pins = "drive_dap1";
242 nvidia,high-speed-mode = <0>;
243 nvidia,schmitt = <1>;
244 nvidia,low-power-mode = <0>;
245 nvidia,pull-down-strength = <0>;
246 nvidia,pull-up-strength = <0>;
247 nvidia,slew-rate-rising = <0>;
248 nvidia,slew-rate-falling = <0>;
249 };
250 };
251 };
252
253 i2s@70002800 {
254 status = "okay";
255 };
256
257 serial@70006000 {
258 status = "okay";
259 };
260
261 hdmi_ddc: i2c@7000c400 {
262 status = "okay";
263 clock-frequency = <100000>;
264 };
265
266 i2c@7000d000 {
267 status = "okay";
268 clock-frequency = <100000>;
269
270 codec: codec@1a {
271 compatible = "wlf,wm8753";
272 reg = <0x1a>;
273 };
274
275 tca6416: gpio@20 {
276 compatible = "ti,tca6416";
277 reg = <0x20>;
278 gpio-controller;
279 #gpio-cells = <2>;
280 };
281
282 max8907@3c {
283 compatible = "maxim,max8907";
284 reg = <0x3c>;
285 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
286
287 maxim,system-power-controller;
288
289 mbatt-supply = <&usb0_vbus_reg>;
290 in-v1-supply = <&mbatt_reg>;
291 in-v2-supply = <&mbatt_reg>;
292 in-v3-supply = <&mbatt_reg>;
293 in1-supply = <&mbatt_reg>;
294 in2-supply = <&nvvdd_sv3_reg>;
295 in3-supply = <&mbatt_reg>;
296 in4-supply = <&mbatt_reg>;
297 in5-supply = <&mbatt_reg>;
298 in6-supply = <&mbatt_reg>;
299 in7-supply = <&mbatt_reg>;
300 in8-supply = <&mbatt_reg>;
301 in9-supply = <&mbatt_reg>;
302 in10-supply = <&mbatt_reg>;
303 in11-supply = <&mbatt_reg>;
304 in12-supply = <&mbatt_reg>;
305 in13-supply = <&mbatt_reg>;
306 in14-supply = <&mbatt_reg>;
307 in15-supply = <&mbatt_reg>;
308 in16-supply = <&mbatt_reg>;
309 in17-supply = <&nvvdd_sv3_reg>;
310 in18-supply = <&nvvdd_sv3_reg>;
311 in19-supply = <&mbatt_reg>;
312 in20-supply = <&mbatt_reg>;
313
314 regulators {
315 mbatt_reg: mbatt {
316 regulator-name = "vbat_pmu";
317 regulator-always-on;
318 };
319
320 sd1 {
321 regulator-name = "nvvdd_sv1,vdd_cpu_pmu";
322 regulator-min-microvolt = <1000000>;
323 regulator-max-microvolt = <1000000>;
324 regulator-always-on;
325 };
326
327 sd2 {
328 regulator-name = "nvvdd_sv2,vdd_core";
329 regulator-min-microvolt = <1200000>;
330 regulator-max-microvolt = <1200000>;
331 regulator-always-on;
332 };
333
334 nvvdd_sv3_reg: sd3 {
335 regulator-name = "nvvdd_sv3";
336 regulator-min-microvolt = <1800000>;
337 regulator-max-microvolt = <1800000>;
338 regulator-always-on;
339 };
340
341 ldo1 {
342 regulator-name = "nvvdd_ldo1,vddio_rx_ddr,vcore_acc";
343 regulator-min-microvolt = <3300000>;
344 regulator-max-microvolt = <3300000>;
345 regulator-always-on;
346 };
347
348 ldo2 {
349 regulator-name = "nvvdd_ldo2,avdd_pll*";
350 regulator-min-microvolt = <1100000>;
351 regulator-max-microvolt = <1100000>;
352 regulator-always-on;
353 };
354
355 ldo3 {
356 regulator-name = "nvvdd_ldo3,vcom_1v8b";
357 regulator-min-microvolt = <1800000>;
358 regulator-max-microvolt = <1800000>;
359 regulator-always-on;
360 };
361
362 ldo4 {
363 regulator-name = "nvvdd_ldo4,avdd_usb*";
364 regulator-min-microvolt = <3300000>;
365 regulator-max-microvolt = <3300000>;
366 regulator-always-on;
367 };
368
369 ldo5 {
370 regulator-name = "nvvdd_ldo5,vcore_mmc,avdd_lcd1,vddio_1wire";
371 regulator-min-microvolt = <2800000>;
372 regulator-max-microvolt = <2800000>;
373 regulator-always-on;
374 };
375
376 hdmi_pll_reg: ldo6 {
377 regulator-name = "nvvdd_ldo6,avdd_hdmi_pll";
378 regulator-min-microvolt = <1800000>;
379 regulator-max-microvolt = <1800000>;
380 };
381
382 ldo7 {
383 regulator-name = "nvvdd_ldo7,avddio_audio";
384 regulator-min-microvolt = <2800000>;
385 regulator-max-microvolt = <2800000>;
386 regulator-always-on;
387 };
388
389 ldo8 {
390 regulator-name = "nvvdd_ldo8,vcom_3v0,vcore_cmps";
391 regulator-min-microvolt = <3000000>;
392 regulator-max-microvolt = <3000000>;
393 };
394
395 ldo9 {
396 regulator-name = "nvvdd_ldo9,avdd_cam*";
397 regulator-min-microvolt = <2800000>;
398 regulator-max-microvolt = <2800000>;
399 };
400
401 ldo10 {
402 regulator-name = "nvvdd_ldo10,avdd_usb_ic_3v0";
403 regulator-min-microvolt = <3000000>;
404 regulator-max-microvolt = <3000000>;
405 regulator-always-on;
406 };
407
408 hdmi_vdd_reg: ldo11 {
409 regulator-name = "nvvdd_ldo11,vddio_pex_clk,vcom_33,avdd_hdmi";
410 regulator-min-microvolt = <3300000>;
411 regulator-max-microvolt = <3300000>;
412 };
413
414 ldo12 {
415 regulator-name = "nvvdd_ldo12,vddio_sdio";
416 regulator-min-microvolt = <2800000>;
417 regulator-max-microvolt = <2800000>;
418 regulator-always-on;
419 };
420
421 ldo13 {
422 regulator-name = "nvvdd_ldo13,vcore_phtn,vdd_af";
423 regulator-min-microvolt = <2800000>;
424 regulator-max-microvolt = <2800000>;
425 };
426
427 ldo14 {
428 regulator-name = "nvvdd_ldo14,avdd_vdac";
429 regulator-min-microvolt = <2800000>;
430 regulator-max-microvolt = <2800000>;
431 };
432
433 ldo15 {
434 regulator-name = "nvvdd_ldo15,vcore_temp,vddio_hdcp";
435 regulator-min-microvolt = <3300000>;
436 regulator-max-microvolt = <3300000>;
437 };
438
439 ldo16 {
440 regulator-name = "nvvdd_ldo16,vdd_dbrtr";
441 regulator-min-microvolt = <1300000>;
442 regulator-max-microvolt = <1300000>;
443 };
444
445 ldo17 {
446 regulator-name = "nvvdd_ldo17,vddio_mipi";
447 regulator-min-microvolt = <1200000>;
448 regulator-max-microvolt = <1200000>;
449 };
450
451 ldo18 {
452 regulator-name = "nvvdd_ldo18,vddio_vi,vcore_cam*";
453 regulator-min-microvolt = <1800000>;
454 regulator-max-microvolt = <1800000>;
455 };
456
457 ldo19 {
458 regulator-name = "nvvdd_ldo19,avdd_lcd2,vddio_lx";
459 regulator-min-microvolt = <2800000>;
460 regulator-max-microvolt = <2800000>;
461 };
462
463 ldo20 {
464 regulator-name = "nvvdd_ldo20,vddio_ddr_1v2,vddio_hsic,vcom_1v2";
465 regulator-min-microvolt = <1200000>;
466 regulator-max-microvolt = <1200000>;
467 regulator-always-on;
468 };
469
470 out5v {
471 regulator-name = "usb0_vbus_reg";
472 };
473
474 out33v {
475 regulator-name = "pmu_out3v3";
476 };
477
478 bbat {
479 regulator-name = "pmu_bbat";
480 regulator-min-microvolt = <2400000>;
481 regulator-max-microvolt = <2400000>;
482 regulator-always-on;
483 };
484
485 sdby {
486 regulator-name = "vdd_aon";
487 regulator-always-on;
488 };
489
490 vrtc {
491 regulator-name = "vrtc,pmu_vccadc";
492 regulator-always-on;
493 };
494 };
495 };
496 };
497
498 pmc {
499 nvidia,invert-interrupt;
500 nvidia,suspend-mode = <2>;
501 nvidia,cpu-pwr-good-time = <2000>;
502 nvidia,cpu-pwr-off-time = <1000>;
503 nvidia,core-pwr-good-time = <0 3845>;
504 nvidia,core-pwr-off-time = <93727>;
505 nvidia,core-power-req-active-high;
506 nvidia,sys-clock-req-active-high;
507 nvidia,combined-power-req;
508 };
509
510 usb@c5000000 {
511 status = "okay";
512 nvidia,vbus-gpio = <&tca6416 0 GPIO_ACTIVE_HIGH>;
513 };
514
515 usb-phy@c5000000 {
516 status = "okay";
517 vbus-supply = <&vbus1_reg>;
518 };
519
520 usb@c5008000 {
521 status = "okay";
522 nvidia,vbus-gpio = <&tca6416 1 GPIO_ACTIVE_HIGH>;
523 };
524
525 usb-phy@c5008000 {
526 status = "okay";
527 vbus-supply = <&vbus3_reg>;
528 };
529
530 sdhci@c8000400 {
531 status = "okay";
532 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
533 wp-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
534 bus-width = <8>;
535 };
536
537 sdhci@c8000600 {
538 status = "okay";
539 bus-width = <8>;
540 non-removable;
541 };
542
543 clocks {
544 compatible = "simple-bus";
545 #address-cells = <1>;
546 #size-cells = <0>;
547
548 clk32k_in: clock {
549 compatible = "fixed-clock";
550 reg=<0>;
551 #clock-cells = <0>;
552 clock-frequency = <32768>;
553 };
554 };
555
556 kbc {
557 status = "okay";
558 nvidia,debounce-delay-ms = <20>;
559 nvidia,repeat-delay-ms = <160>;
560 nvidia,kbc-row-pins = <0 1 2>;
561 nvidia,kbc-col-pins = <16 17>;
562 nvidia,wakeup-source;
563 linux,keymap = <0x00000074 /* KEY_POWER */
564 0x01000066 /* KEY_HOME */
565 0x0101009E /* KEY_BACK */
566 0x0201008B>; /* KEY_MENU */
567 };
568
569 regulators {
570 compatible = "simple-bus";
571 #address-cells = <1>;
572 #size-cells = <0>;
573
574 usb0_vbus_reg: regulator {
575 compatible = "regulator-fixed";
576 reg = <0>;
577 regulator-name = "usb0_vbus";
578 regulator-min-microvolt = <5000000>;
579 regulator-max-microvolt = <5000000>;
580 regulator-always-on;
581 };
582
583 vbus1_reg: regulator@2 {
584 compatible = "regulator-fixed";
585 reg = <2>;
586 regulator-name = "vbus1";
587 regulator-min-microvolt = <5000000>;
588 regulator-max-microvolt = <5000000>;
589 enable-active-high;
590 gpio = <&tca6416 0 0>; /* GPIO_PMU0 */
591 regulator-always-on;
592 regulator-boot-on;
593 };
594
595 vbus3_reg: regulator@3 {
596 compatible = "regulator-fixed";
597 reg = <3>;
598 regulator-name = "vbus3";
599 regulator-min-microvolt = <5000000>;
600 regulator-max-microvolt = <5000000>;
601 enable-active-high;
602 gpio = <&tca6416 1 0>; /* GPIO_PMU1 */
603 regulator-always-on;
604 regulator-boot-on;
605 };
606 };
607
608 sound {
609 compatible = "nvidia,tegra-audio-wm8753-whistler",
610 "nvidia,tegra-audio-wm8753";
611 nvidia,model = "NVIDIA Tegra Whistler";
612
613 nvidia,audio-routing =
614 "Headphone Jack", "LOUT1",
615 "Headphone Jack", "ROUT1",
616 "MIC2", "Mic Jack",
617 "MIC2N", "Mic Jack";
618
619 nvidia,i2s-controller = <&tegra_i2s1>;
620 nvidia,audio-codec = <&codec>;
621
622 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
623 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
624 <&tegra_car TEGRA20_CLK_CDEV1>;
625 clock-names = "pll_a", "pll_a_out0", "mclk";
626 };
627 };
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