2 * Copyright 2013 Freescale Semiconductor, Inc.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
14 model = "VF610 Tower Board";
15 compatible = "fsl,vf610-twr", "fsl,vf610";
18 bootargs = "console=ttyLP1,115200";
22 reg = <0x80000000 0x8000000>;
27 compatible = "fixed-clock";
29 clock-frequency = <24576000>;
33 compatible = "fixed-clock";
35 clock-frequency = <50000000>;
40 compatible = "simple-bus";
44 reg_3p3v: regulator@0 {
45 compatible = "regulator-fixed";
47 regulator-name = "3P3V";
48 regulator-min-microvolt = <3300000>;
49 regulator-max-microvolt = <3300000>;
53 reg_vcc_3v3_mcu: regulator@1 {
54 compatible = "regulator-fixed";
56 regulator-name = "vcc_3v3_mcu";
57 regulator-min-microvolt = <3300000>;
58 regulator-max-microvolt = <3300000>;
63 compatible = "simple-audio-card";
64 simple-audio-card,format = "i2s";
65 simple-audio-card,widgets =
66 "Microphone", "Microphone Jack",
67 "Headphone", "Headphone Jack",
68 "Speaker", "Speaker Ext",
69 "Line", "Line In Jack";
70 simple-audio-card,routing =
71 "MIC_IN", "Microphone Jack",
72 "Microphone Jack", "Mic Bias",
73 "LINE_IN", "Line In Jack",
74 "Headphone Jack", "HP_OUT",
75 "Speaker Ext", "LINE_OUT";
77 simple-audio-card,cpu {
84 simple-audio-card,codec {
93 pinctrl-names = "default";
94 pinctrl-0 = <&pinctrl_adc0_ad5>;
95 vref-supply = <®_vcc_3v3_mcu>;
101 pinctrl-names = "default";
102 pinctrl-0 = <&pinctrl_dspi0>;
105 sflash: at26df081a@0 {
106 #address-cells = <1>;
108 compatible = "atmel,at26df081a";
109 spi-max-frequency = <16000000>;
118 pinctrl-names = "default";
119 pinctrl-0 = <&pinctrl_fec0>;
125 pinctrl-names = "default";
126 pinctrl-0 = <&pinctrl_fec1>;
131 clock-frequency = <100000>;
132 pinctrl-names = "default";
133 pinctrl-0 = <&pinctrl_i2c0>;
137 #sound-dai-cells = <0>;
138 compatible = "fsl,sgtl5000";
140 VDDA-supply = <®_3p3v>;
141 VDDIO-supply = <®_3p3v>;
142 clocks = <&clks VF610_CLK_SAI2>;
148 pinctrl_adc0_ad5: adc0ad5grp {
150 VF610_PAD_PTC30__ADC0_SE5 0xa1
154 pinctrl_dspi0: dspi0grp {
156 VF610_PAD_PTB19__DSPI0_CS0 0x1182
157 VF610_PAD_PTB20__DSPI0_SIN 0x1181
158 VF610_PAD_PTB21__DSPI0_SOUT 0x1182
159 VF610_PAD_PTB22__DSPI0_SCK 0x1182
163 pinctrl_fec0: fec0grp {
165 VF610_PAD_PTA6__RMII_CLKIN 0x30d1
166 VF610_PAD_PTC0__ENET_RMII0_MDC 0x30d3
167 VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30d1
168 VF610_PAD_PTC2__ENET_RMII0_CRS 0x30d1
169 VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30d1
170 VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30d1
171 VF610_PAD_PTC5__ENET_RMII0_RXER 0x30d1
172 VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30d2
173 VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30d2
174 VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30d2
178 pinctrl_fec1: fec1grp {
180 VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2
181 VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3
182 VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1
183 VF610_PAD_PTC12__ENET_RMII_RXD1 0x30d1
184 VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1
185 VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1
186 VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2
187 VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2
188 VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2
192 pinctrl_i2c0: i2c0grp {
194 VF610_PAD_PTB14__I2C0_SCL 0x30d3
195 VF610_PAD_PTB15__I2C0_SDA 0x30d3
199 pinctrl_sai2: sai2grp {
201 VF610_PAD_PTA16__SAI2_TX_BCLK 0x02ed
202 VF610_PAD_PTA18__SAI2_TX_DATA 0x02ee
203 VF610_PAD_PTA19__SAI2_TX_SYNC 0x02ed
204 VF610_PAD_PTA21__SAI2_RX_BCLK 0x02ed
205 VF610_PAD_PTA22__SAI2_RX_DATA 0x02ed
206 VF610_PAD_PTA23__SAI2_RX_SYNC 0x02ed
207 VF610_PAD_PTB18__EXT_AUDIO_MCLK 0x02ed
211 pinctrl_uart1: uart1grp {
213 VF610_PAD_PTB4__UART1_TX 0x21a2
214 VF610_PAD_PTB5__UART1_RX 0x21a1
221 #sound-dai-cells = <0>;
222 pinctrl-names = "default";
223 pinctrl-0 = <&pinctrl_sai2>;
228 pinctrl-names = "default";
229 pinctrl-0 = <&pinctrl_uart1>;