arch/arm/include/asm/kvm_mmu.h

   1 /*
   2  * Copyright (C) 2012 - Virtual Open Systems and Columbia University
   3  * Author: Christoffer Dall <c.dall@virtualopensystems.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License, version 2, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
  17  */
  18
  19 #ifndef __ARM_KVM_MMU_H__
  20 #define __ARM_KVM_MMU_H__
  21
  22 #include <asm/memory.h>
  23 #include <asm/page.h>
  24
  25 /*
  26  * We directly use the kernel VA for the HYP, as we can directly share
  27  * the mapping (HTTBR "covers" TTBR1).
  28  */
  29 #define HYP_PAGE_OFFSET_MASK    UL(~0)
  30 #define HYP_PAGE_OFFSET         PAGE_OFFSET
  31 #define KERN_TO_HYP(kva)        (kva)
  32
  33 /*
  34  * Our virtual mapping for the boot-time MMU-enable code. Must be
  35  * shared across all the page-tables. Conveniently, we use the vectors
  36  * page, where no kernel data will ever be shared with HYP.
  37  */
  38 #define TRAMPOLINE_VA           UL(CONFIG_VECTORS_BASE)
  39
  40 /*
  41  * KVM_MMU_CACHE_MIN_PAGES is the number of stage2 page table translation levels.
  42  */
  43 #define KVM_MMU_CACHE_MIN_PAGES 2
  44
  45 #ifndef __ASSEMBLY__
  46
  47 #include <linux/highmem.h>
  48 #include <asm/cacheflush.h>
  49 #include <asm/pgalloc.h>
  50
  51 int create_hyp_mappings(void *from, void *to);
  52 int create_hyp_io_mappings(void *from, void *to, phys_addr_t);
  53 void free_boot_hyp_pgd(void);
  54 void free_hyp_pgds(void);
  55
  56 void stage2_unmap_vm(struct kvm *kvm);
  57 int kvm_alloc_stage2_pgd(struct kvm *kvm);
  58 void kvm_free_stage2_pgd(struct kvm *kvm);
  59 int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
  60                           phys_addr_t pa, unsigned long size, bool writable);
  61
  62 int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run);
  63
  64 void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu);
  65
  66 phys_addr_t kvm_mmu_get_httbr(void);
  67 phys_addr_t kvm_mmu_get_boot_httbr(void);
  68 phys_addr_t kvm_get_idmap_vector(void);
  69 int kvm_mmu_init(void);
  70 void kvm_clear_hyp_idmap(void);
  71
  72 static inline void kvm_set_pmd(pmd_t *pmd, pmd_t new_pmd)
  73 {
  74         *pmd = new_pmd;
  75         flush_pmd_entry(pmd);
  76 }
  77
  78 static inline void kvm_set_pte(pte_t *pte, pte_t new_pte)
  79 {
  80         *pte = new_pte;
  81         /*
  82          * flush_pmd_entry just takes a void pointer and cleans the necessary
  83          * cache entries, so we can reuse the function for ptes.
  84          */
  85         flush_pmd_entry(pte);
  86 }
  87
  88 static inline void kvm_clean_pgd(pgd_t *pgd)
  89 {
  90         clean_dcache_area(pgd, PTRS_PER_S2_PGD * sizeof(pgd_t));
  91 }
  92
  93 static inline void kvm_clean_pmd(pmd_t *pmd)
  94 {
  95         clean_dcache_area(pmd, PTRS_PER_PMD * sizeof(pmd_t));
  96 }
  97
  98 static inline void kvm_clean_pmd_entry(pmd_t *pmd)
  99 {
 100         clean_pmd_entry(pmd);
 101 }
 102
 103 static inline void kvm_clean_pte(pte_t *pte)
 104 {
 105         clean_pte_table(pte);
 106 }
 107
 108 static inline void kvm_set_s2pte_writable(pte_t *pte)
 109 {
 110         pte_val(*pte) |= L_PTE_S2_RDWR;
 111 }
 112
 113 static inline void kvm_set_s2pmd_writable(pmd_t *pmd)
 114 {
 115         pmd_val(*pmd) |= L_PMD_S2_RDWR;
 116 }
 117
 118 /* Open coded p*d_addr_end that can deal with 64bit addresses */
 119 #define kvm_pgd_addr_end(addr, end)                                     \
 120 ({      u64 __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK;            \
 121         (__boundary - 1 < (end) - 1)? __boundary: (end);                \
 122 })
 123
 124 #define kvm_pud_addr_end(addr,end)              (end)
 125
 126 #define kvm_pmd_addr_end(addr, end)                                     \
 127 ({      u64 __boundary = ((addr) + PMD_SIZE) & PMD_MASK;                \
 128         (__boundary - 1 < (end) - 1)? __boundary: (end);                \
 129 })
 130
 131 static inline bool kvm_page_empty(void *ptr)
 132 {
 133         struct page *ptr_page = virt_to_page(ptr);
 134         return page_count(ptr_page) == 1;
 135 }
 136
 137
 138 #define kvm_pte_table_empty(kvm, ptep) kvm_page_empty(ptep)
 139 #define kvm_pmd_table_empty(kvm, pmdp) kvm_page_empty(pmdp)
 140 #define kvm_pud_table_empty(kvm, pudp) (0)
 141
 142 #define KVM_PREALLOC_LEVEL      0
 143
 144 static inline int kvm_prealloc_hwpgd(struct kvm *kvm, pgd_t *pgd)
 145 {
 146         return 0;
 147 }
 148
 149 static inline void kvm_free_hwpgd(struct kvm *kvm) { }
 150
 151 static inline void *kvm_get_hwpgd(struct kvm *kvm)
 152 {
 153         return kvm->arch.pgd;
 154 }
 155
 156 struct kvm;
 157
 158 #define kvm_flush_dcache_to_poc(a,l)    __cpuc_flush_dcache_area((a), (l))
 159
 160 static inline bool vcpu_has_cache_enabled(struct kvm_vcpu *vcpu)
 161 {
 162         return (vcpu->arch.cp15[c1_SCTLR] & 0b101) == 0b101;
 163 }
 164
 165 static inline void __coherent_cache_guest_page(struct kvm_vcpu *vcpu, pfn_t pfn,
 166                                                unsigned long size,
 167                                                bool ipa_uncached)
 168 {
 169         /*
 170          * If we are going to insert an instruction page and the icache is
 171          * either VIPT or PIPT, there is a potential problem where the host
 172          * (or another VM) may have used the same page as this guest, and we
 173          * read incorrect data from the icache.  If we're using a PIPT cache,
 174          * we can invalidate just that page, but if we are using a VIPT cache
 175          * we need to invalidate the entire icache - damn shame - as written
 176          * in the ARM ARM (DDI 0406C.b - Page B3-1393).
 177          *
 178          * VIVT caches are tagged using both the ASID and the VMID and doesn't
 179          * need any kind of flushing (DDI 0406C.b - Page B3-1392).
 180          *
 181          * We need to do this through a kernel mapping (using the
 182          * user-space mapping has proved to be the wrong
 183          * solution). For that, we need to kmap one page at a time,
 184          * and iterate over the range.
 185          */
 186
 187         bool need_flush = !vcpu_has_cache_enabled(vcpu) || ipa_uncached;
 188
 189         VM_BUG_ON(size & PAGE_MASK);
 190
 191         if (!need_flush && !icache_is_pipt())
 192                 goto vipt_cache;
 193
 194         while (size) {
 195                 void *va = kmap_atomic_pfn(pfn);
 196
 197                 if (need_flush)
 198                         kvm_flush_dcache_to_poc(va, PAGE_SIZE);
 199
 200                 if (icache_is_pipt())
 201                         __cpuc_coherent_user_range((unsigned long)va,
 202                                                    (unsigned long)va + PAGE_SIZE);
 203
 204                 size -= PAGE_SIZE;
 205                 pfn++;
 206
 207                 kunmap_atomic(va);
 208         }
 209
 210 vipt_cache:
 211         if (!icache_is_pipt() && !icache_is_vivt_asid_tagged()) {
 212                 /* any kind of VIPT cache */
 213                 __flush_icache_all();
 214         }
 215 }
 216
 217 static inline void __kvm_flush_dcache_pte(pte_t pte)
 218 {
 219         void *va = kmap_atomic(pte_page(pte));
 220
 221         kvm_flush_dcache_to_poc(va, PAGE_SIZE);
 222
 223         kunmap_atomic(va);
 224 }
 225
 226 static inline void __kvm_flush_dcache_pmd(pmd_t pmd)
 227 {
 228         unsigned long size = PMD_SIZE;
 229         pfn_t pfn = pmd_pfn(pmd);
 230
 231         while (size) {
 232                 void *va = kmap_atomic_pfn(pfn);
 233
 234                 kvm_flush_dcache_to_poc(va, PAGE_SIZE);
 235
 236                 pfn++;
 237                 size -= PAGE_SIZE;
 238
 239                 kunmap_atomic(va);
 240         }
 241 }
 242
 243 static inline void __kvm_flush_dcache_pud(pud_t pud)
 244 {
 245 }
 246
 247 #define kvm_virt_to_phys(x)             virt_to_idmap((unsigned long)(x))
 248
 249 void kvm_set_way_flush(struct kvm_vcpu *vcpu);
 250 void kvm_toggle_cache(struct kvm_vcpu *vcpu, bool was_enabled);
 251
 252 #endif  /* !__ASSEMBLY__ */
 253
 254 #endif /* __ARM_KVM_MMU_H__ */