ARM: redo TTBR setup code for LPAE
[deliverable/linux.git] / arch / arm / include / asm / smp.h
1 /*
2 * arch/arm/include/asm/smp.h
3 *
4 * Copyright (C) 2004-2005 ARM Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10 #ifndef __ASM_ARM_SMP_H
11 #define __ASM_ARM_SMP_H
12
13 #include <linux/threads.h>
14 #include <linux/cpumask.h>
15 #include <linux/thread_info.h>
16
17 #ifndef CONFIG_SMP
18 # error "<asm/smp.h> included in non-SMP build"
19 #endif
20
21 #define raw_smp_processor_id() (current_thread_info()->cpu)
22
23 struct seq_file;
24
25 /*
26 * generate IPI list text
27 */
28 extern void show_ipi_list(struct seq_file *, int);
29
30 /*
31 * Called from assembly code, this handles an IPI.
32 */
33 asmlinkage void do_IPI(int ipinr, struct pt_regs *regs);
34
35 /*
36 * Called from C code, this handles an IPI.
37 */
38 void handle_IPI(int ipinr, struct pt_regs *regs);
39
40 /*
41 * Setup the set of possible CPUs (via set_cpu_possible)
42 */
43 extern void smp_init_cpus(void);
44
45
46 /*
47 * Provide a function to raise an IPI cross call on CPUs in callmap.
48 */
49 extern void set_smp_cross_call(void (*)(const struct cpumask *, unsigned int));
50
51 /*
52 * Called from platform specific assembly code, this is the
53 * secondary CPU entry point.
54 */
55 asmlinkage void secondary_start_kernel(void);
56
57
58 /*
59 * Initial data for bringing up a secondary CPU.
60 */
61 struct secondary_data {
62 union {
63 unsigned long mpu_rgn_szr;
64 u64 pgdir;
65 };
66 unsigned long swapper_pg_dir;
67 void *stack;
68 };
69 extern struct secondary_data secondary_data;
70 extern volatile int pen_release;
71 extern void secondary_startup(void);
72
73 extern int __cpu_disable(void);
74
75 extern void __cpu_die(unsigned int cpu);
76 extern void cpu_die(void);
77
78 extern void arch_send_call_function_single_ipi(int cpu);
79 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
80 extern void arch_send_wakeup_ipi_mask(const struct cpumask *mask);
81
82 extern int register_ipi_completion(struct completion *completion, int cpu);
83
84 struct smp_operations {
85 #ifdef CONFIG_SMP
86 /*
87 * Setup the set of possible CPUs (via set_cpu_possible)
88 */
89 void (*smp_init_cpus)(void);
90 /*
91 * Initialize cpu_possible map, and enable coherency
92 */
93 void (*smp_prepare_cpus)(unsigned int max_cpus);
94
95 /*
96 * Perform platform specific initialisation of the specified CPU.
97 */
98 void (*smp_secondary_init)(unsigned int cpu);
99 /*
100 * Boot a secondary CPU, and assign it the specified idle task.
101 * This also gives us the initial stack to use for this CPU.
102 */
103 int (*smp_boot_secondary)(unsigned int cpu, struct task_struct *idle);
104 #ifdef CONFIG_HOTPLUG_CPU
105 int (*cpu_kill)(unsigned int cpu);
106 void (*cpu_die)(unsigned int cpu);
107 int (*cpu_disable)(unsigned int cpu);
108 #endif
109 #endif
110 };
111
112 struct of_cpu_method {
113 const char *method;
114 struct smp_operations *ops;
115 };
116
117 #define CPU_METHOD_OF_DECLARE(name, _method, _ops) \
118 static const struct of_cpu_method __cpu_method_of_table_##name \
119 __used __section(__cpu_method_of_table) \
120 = { .method = _method, .ops = _ops }
121 /*
122 * set platform specific SMP operations
123 */
124 extern void smp_set_ops(struct smp_operations *);
125
126 #endif /* ifndef __ASM_ARM_SMP_H */
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