ARM: OMAP2+: Add back the define for AM33XX_RST_GLOBAL_WARM_SW_MASK
[deliverable/linux.git] / arch / arm / kernel / smp.c
1 /*
2 * linux/arch/arm/kernel/smp.c
3 *
4 * Copyright (C) 2002 ARM Limited, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10 #include <linux/module.h>
11 #include <linux/delay.h>
12 #include <linux/init.h>
13 #include <linux/spinlock.h>
14 #include <linux/sched.h>
15 #include <linux/interrupt.h>
16 #include <linux/cache.h>
17 #include <linux/profile.h>
18 #include <linux/errno.h>
19 #include <linux/mm.h>
20 #include <linux/err.h>
21 #include <linux/cpu.h>
22 #include <linux/seq_file.h>
23 #include <linux/irq.h>
24 #include <linux/percpu.h>
25 #include <linux/clockchips.h>
26 #include <linux/completion.h>
27 #include <linux/cpufreq.h>
28
29 #include <linux/atomic.h>
30 #include <asm/smp.h>
31 #include <asm/cacheflush.h>
32 #include <asm/cpu.h>
33 #include <asm/cputype.h>
34 #include <asm/exception.h>
35 #include <asm/idmap.h>
36 #include <asm/topology.h>
37 #include <asm/mmu_context.h>
38 #include <asm/pgtable.h>
39 #include <asm/pgalloc.h>
40 #include <asm/processor.h>
41 #include <asm/sections.h>
42 #include <asm/tlbflush.h>
43 #include <asm/ptrace.h>
44 #include <asm/smp_plat.h>
45 #include <asm/virt.h>
46 #include <asm/mach/arch.h>
47 #include <asm/mpu.h>
48
49 /*
50 * as from 2.5, kernels no longer have an init_tasks structure
51 * so we need some other way of telling a new secondary core
52 * where to place its SVC stack
53 */
54 struct secondary_data secondary_data;
55
56 /*
57 * control for which core is the next to come out of the secondary
58 * boot "holding pen"
59 */
60 volatile int pen_release = -1;
61
62 enum ipi_msg_type {
63 IPI_WAKEUP,
64 IPI_TIMER,
65 IPI_RESCHEDULE,
66 IPI_CALL_FUNC,
67 IPI_CALL_FUNC_SINGLE,
68 IPI_CPU_STOP,
69 };
70
71 static DECLARE_COMPLETION(cpu_running);
72
73 static struct smp_operations smp_ops;
74
75 void __init smp_set_ops(struct smp_operations *ops)
76 {
77 if (ops)
78 smp_ops = *ops;
79 };
80
81 static unsigned long get_arch_pgd(pgd_t *pgd)
82 {
83 phys_addr_t pgdir = virt_to_phys(pgd);
84 BUG_ON(pgdir & ARCH_PGD_MASK);
85 return pgdir >> ARCH_PGD_SHIFT;
86 }
87
88 int __cpu_up(unsigned int cpu, struct task_struct *idle)
89 {
90 int ret;
91
92 /*
93 * We need to tell the secondary core where to find
94 * its stack and the page tables.
95 */
96 secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
97 #ifdef CONFIG_ARM_MPU
98 secondary_data.mpu_rgn_szr = mpu_rgn_info.rgns[MPU_RAM_REGION].drsr;
99 #endif
100
101 #ifdef CONFIG_MMU
102 secondary_data.pgdir = get_arch_pgd(idmap_pgd);
103 secondary_data.swapper_pg_dir = get_arch_pgd(swapper_pg_dir);
104 #endif
105 __cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data));
106 outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1));
107
108 /*
109 * Now bring the CPU into our world.
110 */
111 ret = boot_secondary(cpu, idle);
112 if (ret == 0) {
113 /*
114 * CPU was successfully started, wait for it
115 * to come online or time out.
116 */
117 wait_for_completion_timeout(&cpu_running,
118 msecs_to_jiffies(1000));
119
120 if (!cpu_online(cpu)) {
121 pr_crit("CPU%u: failed to come online\n", cpu);
122 ret = -EIO;
123 }
124 } else {
125 pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
126 }
127
128
129 memset(&secondary_data, 0, sizeof(secondary_data));
130 return ret;
131 }
132
133 /* platform specific SMP operations */
134 void __init smp_init_cpus(void)
135 {
136 if (smp_ops.smp_init_cpus)
137 smp_ops.smp_init_cpus();
138 }
139
140 int boot_secondary(unsigned int cpu, struct task_struct *idle)
141 {
142 if (smp_ops.smp_boot_secondary)
143 return smp_ops.smp_boot_secondary(cpu, idle);
144 return -ENOSYS;
145 }
146
147 #ifdef CONFIG_HOTPLUG_CPU
148 static int platform_cpu_kill(unsigned int cpu)
149 {
150 if (smp_ops.cpu_kill)
151 return smp_ops.cpu_kill(cpu);
152 return 1;
153 }
154
155 static int platform_cpu_disable(unsigned int cpu)
156 {
157 if (smp_ops.cpu_disable)
158 return smp_ops.cpu_disable(cpu);
159
160 /*
161 * By default, allow disabling all CPUs except the first one,
162 * since this is special on a lot of platforms, e.g. because
163 * of clock tick interrupts.
164 */
165 return cpu == 0 ? -EPERM : 0;
166 }
167 /*
168 * __cpu_disable runs on the processor to be shutdown.
169 */
170 int __cpu_disable(void)
171 {
172 unsigned int cpu = smp_processor_id();
173 int ret;
174
175 ret = platform_cpu_disable(cpu);
176 if (ret)
177 return ret;
178
179 /*
180 * Take this CPU offline. Once we clear this, we can't return,
181 * and we must not schedule until we're ready to give up the cpu.
182 */
183 set_cpu_online(cpu, false);
184
185 /*
186 * OK - migrate IRQs away from this CPU
187 */
188 migrate_irqs();
189
190 /*
191 * Flush user cache and TLB mappings, and then remove this CPU
192 * from the vm mask set of all processes.
193 *
194 * Caches are flushed to the Level of Unification Inner Shareable
195 * to write-back dirty lines to unified caches shared by all CPUs.
196 */
197 flush_cache_louis();
198 local_flush_tlb_all();
199
200 clear_tasks_mm_cpumask(cpu);
201
202 return 0;
203 }
204
205 static DECLARE_COMPLETION(cpu_died);
206
207 /*
208 * called on the thread which is asking for a CPU to be shutdown -
209 * waits until shutdown has completed, or it is timed out.
210 */
211 void __cpu_die(unsigned int cpu)
212 {
213 if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
214 pr_err("CPU%u: cpu didn't die\n", cpu);
215 return;
216 }
217 printk(KERN_NOTICE "CPU%u: shutdown\n", cpu);
218
219 /*
220 * platform_cpu_kill() is generally expected to do the powering off
221 * and/or cutting of clocks to the dying CPU. Optionally, this may
222 * be done by the CPU which is dying in preference to supporting
223 * this call, but that means there is _no_ synchronisation between
224 * the requesting CPU and the dying CPU actually losing power.
225 */
226 if (!platform_cpu_kill(cpu))
227 printk("CPU%u: unable to kill\n", cpu);
228 }
229
230 /*
231 * Called from the idle thread for the CPU which has been shutdown.
232 *
233 * Note that we disable IRQs here, but do not re-enable them
234 * before returning to the caller. This is also the behaviour
235 * of the other hotplug-cpu capable cores, so presumably coming
236 * out of idle fixes this.
237 */
238 void __ref cpu_die(void)
239 {
240 unsigned int cpu = smp_processor_id();
241
242 idle_task_exit();
243
244 local_irq_disable();
245
246 /*
247 * Flush the data out of the L1 cache for this CPU. This must be
248 * before the completion to ensure that data is safely written out
249 * before platform_cpu_kill() gets called - which may disable
250 * *this* CPU and power down its cache.
251 */
252 flush_cache_louis();
253
254 /*
255 * Tell __cpu_die() that this CPU is now safe to dispose of. Once
256 * this returns, power and/or clocks can be removed at any point
257 * from this CPU and its cache by platform_cpu_kill().
258 */
259 complete(&cpu_died);
260
261 /*
262 * Ensure that the cache lines associated with that completion are
263 * written out. This covers the case where _this_ CPU is doing the
264 * powering down, to ensure that the completion is visible to the
265 * CPU waiting for this one.
266 */
267 flush_cache_louis();
268
269 /*
270 * The actual CPU shutdown procedure is at least platform (if not
271 * CPU) specific. This may remove power, or it may simply spin.
272 *
273 * Platforms are generally expected *NOT* to return from this call,
274 * although there are some which do because they have no way to
275 * power down the CPU. These platforms are the _only_ reason we
276 * have a return path which uses the fragment of assembly below.
277 *
278 * The return path should not be used for platforms which can
279 * power off the CPU.
280 */
281 if (smp_ops.cpu_die)
282 smp_ops.cpu_die(cpu);
283
284 /*
285 * Do not return to the idle loop - jump back to the secondary
286 * cpu initialisation. There's some initialisation which needs
287 * to be repeated to undo the effects of taking the CPU offline.
288 */
289 __asm__("mov sp, %0\n"
290 " mov fp, #0\n"
291 " b secondary_start_kernel"
292 :
293 : "r" (task_stack_page(current) + THREAD_SIZE - 8));
294 }
295 #endif /* CONFIG_HOTPLUG_CPU */
296
297 /*
298 * Called by both boot and secondaries to move global data into
299 * per-processor storage.
300 */
301 static void smp_store_cpu_info(unsigned int cpuid)
302 {
303 struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
304
305 cpu_info->loops_per_jiffy = loops_per_jiffy;
306 cpu_info->cpuid = read_cpuid_id();
307
308 store_cpu_topology(cpuid);
309 }
310
311 /*
312 * This is the secondary CPU boot entry. We're using this CPUs
313 * idle thread stack, but a set of temporary page tables.
314 */
315 asmlinkage void secondary_start_kernel(void)
316 {
317 struct mm_struct *mm = &init_mm;
318 unsigned int cpu;
319
320 /*
321 * The identity mapping is uncached (strongly ordered), so
322 * switch away from it before attempting any exclusive accesses.
323 */
324 cpu_switch_mm(mm->pgd, mm);
325 local_flush_bp_all();
326 enter_lazy_tlb(mm, current);
327 local_flush_tlb_all();
328
329 /*
330 * All kernel threads share the same mm context; grab a
331 * reference and switch to it.
332 */
333 cpu = smp_processor_id();
334 atomic_inc(&mm->mm_count);
335 current->active_mm = mm;
336 cpumask_set_cpu(cpu, mm_cpumask(mm));
337
338 cpu_init();
339
340 printk("CPU%u: Booted secondary processor\n", cpu);
341
342 preempt_disable();
343 trace_hardirqs_off();
344
345 /*
346 * Give the platform a chance to do its own initialisation.
347 */
348 if (smp_ops.smp_secondary_init)
349 smp_ops.smp_secondary_init(cpu);
350
351 notify_cpu_starting(cpu);
352
353 calibrate_delay();
354
355 smp_store_cpu_info(cpu);
356
357 /*
358 * OK, now it's safe to let the boot CPU continue. Wait for
359 * the CPU migration code to notice that the CPU is online
360 * before we continue - which happens after __cpu_up returns.
361 */
362 set_cpu_online(cpu, true);
363 complete(&cpu_running);
364
365 local_irq_enable();
366 local_fiq_enable();
367
368 /*
369 * OK, it's off to the idle thread for us
370 */
371 cpu_startup_entry(CPUHP_ONLINE);
372 }
373
374 void __init smp_cpus_done(unsigned int max_cpus)
375 {
376 int cpu;
377 unsigned long bogosum = 0;
378
379 for_each_online_cpu(cpu)
380 bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy;
381
382 printk(KERN_INFO "SMP: Total of %d processors activated "
383 "(%lu.%02lu BogoMIPS).\n",
384 num_online_cpus(),
385 bogosum / (500000/HZ),
386 (bogosum / (5000/HZ)) % 100);
387
388 hyp_mode_check();
389 }
390
391 void __init smp_prepare_boot_cpu(void)
392 {
393 set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
394 }
395
396 void __init smp_prepare_cpus(unsigned int max_cpus)
397 {
398 unsigned int ncores = num_possible_cpus();
399
400 init_cpu_topology();
401
402 smp_store_cpu_info(smp_processor_id());
403
404 /*
405 * are we trying to boot more cores than exist?
406 */
407 if (max_cpus > ncores)
408 max_cpus = ncores;
409 if (ncores > 1 && max_cpus) {
410 /*
411 * Initialise the present map, which describes the set of CPUs
412 * actually populated at the present time. A platform should
413 * re-initialize the map in the platforms smp_prepare_cpus()
414 * if present != possible (e.g. physical hotplug).
415 */
416 init_cpu_present(cpu_possible_mask);
417
418 /*
419 * Initialise the SCU if there are more than one CPU
420 * and let them know where to start.
421 */
422 if (smp_ops.smp_prepare_cpus)
423 smp_ops.smp_prepare_cpus(max_cpus);
424 }
425 }
426
427 static void (*smp_cross_call)(const struct cpumask *, unsigned int);
428
429 void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
430 {
431 if (!smp_cross_call)
432 smp_cross_call = fn;
433 }
434
435 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
436 {
437 smp_cross_call(mask, IPI_CALL_FUNC);
438 }
439
440 void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
441 {
442 smp_cross_call(mask, IPI_WAKEUP);
443 }
444
445 void arch_send_call_function_single_ipi(int cpu)
446 {
447 smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
448 }
449
450 static const char *ipi_types[NR_IPI] = {
451 #define S(x,s) [x] = s
452 S(IPI_WAKEUP, "CPU wakeup interrupts"),
453 S(IPI_TIMER, "Timer broadcast interrupts"),
454 S(IPI_RESCHEDULE, "Rescheduling interrupts"),
455 S(IPI_CALL_FUNC, "Function call interrupts"),
456 S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"),
457 S(IPI_CPU_STOP, "CPU stop interrupts"),
458 };
459
460 void show_ipi_list(struct seq_file *p, int prec)
461 {
462 unsigned int cpu, i;
463
464 for (i = 0; i < NR_IPI; i++) {
465 seq_printf(p, "%*s%u: ", prec - 1, "IPI", i);
466
467 for_each_online_cpu(cpu)
468 seq_printf(p, "%10u ",
469 __get_irq_stat(cpu, ipi_irqs[i]));
470
471 seq_printf(p, " %s\n", ipi_types[i]);
472 }
473 }
474
475 u64 smp_irq_stat_cpu(unsigned int cpu)
476 {
477 u64 sum = 0;
478 int i;
479
480 for (i = 0; i < NR_IPI; i++)
481 sum += __get_irq_stat(cpu, ipi_irqs[i]);
482
483 return sum;
484 }
485
486 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
487 void tick_broadcast(const struct cpumask *mask)
488 {
489 smp_cross_call(mask, IPI_TIMER);
490 }
491 #endif
492
493 static DEFINE_RAW_SPINLOCK(stop_lock);
494
495 /*
496 * ipi_cpu_stop - handle IPI from smp_send_stop()
497 */
498 static void ipi_cpu_stop(unsigned int cpu)
499 {
500 if (system_state == SYSTEM_BOOTING ||
501 system_state == SYSTEM_RUNNING) {
502 raw_spin_lock(&stop_lock);
503 printk(KERN_CRIT "CPU%u: stopping\n", cpu);
504 dump_stack();
505 raw_spin_unlock(&stop_lock);
506 }
507
508 set_cpu_online(cpu, false);
509
510 local_fiq_disable();
511 local_irq_disable();
512
513 while (1)
514 cpu_relax();
515 }
516
517 /*
518 * Main handler for inter-processor interrupts
519 */
520 asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs)
521 {
522 handle_IPI(ipinr, regs);
523 }
524
525 void handle_IPI(int ipinr, struct pt_regs *regs)
526 {
527 unsigned int cpu = smp_processor_id();
528 struct pt_regs *old_regs = set_irq_regs(regs);
529
530 if (ipinr < NR_IPI)
531 __inc_irq_stat(cpu, ipi_irqs[ipinr]);
532
533 switch (ipinr) {
534 case IPI_WAKEUP:
535 break;
536
537 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
538 case IPI_TIMER:
539 irq_enter();
540 tick_receive_broadcast();
541 irq_exit();
542 break;
543 #endif
544
545 case IPI_RESCHEDULE:
546 scheduler_ipi();
547 break;
548
549 case IPI_CALL_FUNC:
550 irq_enter();
551 generic_smp_call_function_interrupt();
552 irq_exit();
553 break;
554
555 case IPI_CALL_FUNC_SINGLE:
556 irq_enter();
557 generic_smp_call_function_single_interrupt();
558 irq_exit();
559 break;
560
561 case IPI_CPU_STOP:
562 irq_enter();
563 ipi_cpu_stop(cpu);
564 irq_exit();
565 break;
566
567 default:
568 printk(KERN_CRIT "CPU%u: Unknown IPI message 0x%x\n",
569 cpu, ipinr);
570 break;
571 }
572 set_irq_regs(old_regs);
573 }
574
575 void smp_send_reschedule(int cpu)
576 {
577 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
578 }
579
580 void smp_send_stop(void)
581 {
582 unsigned long timeout;
583 struct cpumask mask;
584
585 cpumask_copy(&mask, cpu_online_mask);
586 cpumask_clear_cpu(smp_processor_id(), &mask);
587 if (!cpumask_empty(&mask))
588 smp_cross_call(&mask, IPI_CPU_STOP);
589
590 /* Wait up to one second for other CPUs to stop */
591 timeout = USEC_PER_SEC;
592 while (num_online_cpus() > 1 && timeout--)
593 udelay(1);
594
595 if (num_online_cpus() > 1)
596 pr_warning("SMP: failed to stop secondary CPUs\n");
597 }
598
599 /*
600 * not supported here
601 */
602 int setup_profiling_timer(unsigned int multiplier)
603 {
604 return -EINVAL;
605 }
606
607 #ifdef CONFIG_CPU_FREQ
608
609 static DEFINE_PER_CPU(unsigned long, l_p_j_ref);
610 static DEFINE_PER_CPU(unsigned long, l_p_j_ref_freq);
611 static unsigned long global_l_p_j_ref;
612 static unsigned long global_l_p_j_ref_freq;
613
614 static int cpufreq_callback(struct notifier_block *nb,
615 unsigned long val, void *data)
616 {
617 struct cpufreq_freqs *freq = data;
618 int cpu = freq->cpu;
619
620 if (freq->flags & CPUFREQ_CONST_LOOPS)
621 return NOTIFY_OK;
622
623 if (!per_cpu(l_p_j_ref, cpu)) {
624 per_cpu(l_p_j_ref, cpu) =
625 per_cpu(cpu_data, cpu).loops_per_jiffy;
626 per_cpu(l_p_j_ref_freq, cpu) = freq->old;
627 if (!global_l_p_j_ref) {
628 global_l_p_j_ref = loops_per_jiffy;
629 global_l_p_j_ref_freq = freq->old;
630 }
631 }
632
633 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
634 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
635 (val == CPUFREQ_RESUMECHANGE || val == CPUFREQ_SUSPENDCHANGE)) {
636 loops_per_jiffy = cpufreq_scale(global_l_p_j_ref,
637 global_l_p_j_ref_freq,
638 freq->new);
639 per_cpu(cpu_data, cpu).loops_per_jiffy =
640 cpufreq_scale(per_cpu(l_p_j_ref, cpu),
641 per_cpu(l_p_j_ref_freq, cpu),
642 freq->new);
643 }
644 return NOTIFY_OK;
645 }
646
647 static struct notifier_block cpufreq_notifier = {
648 .notifier_call = cpufreq_callback,
649 };
650
651 static int __init register_cpufreq_notifier(void)
652 {
653 return cpufreq_register_notifier(&cpufreq_notifier,
654 CPUFREQ_TRANSITION_NOTIFIER);
655 }
656 core_initcall(register_cpufreq_notifier);
657
658 #endif
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