2 * arch/arm/mach-at91/at91cap9_devices.c
4 * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
5 * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
6 * Copyright (C) 2007 Atmel Corporation.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <asm/mach/arch.h>
15 #include <asm/mach/map.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/platform_device.h>
19 #include <linux/mtd/physmap.h>
21 #include <video/atmel_lcdc.h>
23 #include <asm/arch/board.h>
24 #include <asm/arch/gpio.h>
25 #include <asm/arch/at91cap9.h>
26 #include <asm/arch/at91cap9_matrix.h>
27 #include <asm/arch/at91sam9_smc.h>
32 /* --------------------------------------------------------------------
34 * -------------------------------------------------------------------- */
36 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
37 static u64 ohci_dmamask
= DMA_BIT_MASK(32);
38 static struct at91_usbh_data usbh_data
;
40 static struct resource usbh_resources
[] = {
42 .start
= AT91CAP9_UHP_BASE
,
43 .end
= AT91CAP9_UHP_BASE
+ SZ_1M
- 1,
44 .flags
= IORESOURCE_MEM
,
47 .start
= AT91CAP9_ID_UHP
,
48 .end
= AT91CAP9_ID_UHP
,
49 .flags
= IORESOURCE_IRQ
,
53 static struct platform_device at91_usbh_device
= {
57 .dma_mask
= &ohci_dmamask
,
58 .coherent_dma_mask
= DMA_BIT_MASK(32),
59 .platform_data
= &usbh_data
,
61 .resource
= usbh_resources
,
62 .num_resources
= ARRAY_SIZE(usbh_resources
),
65 void __init
at91_add_device_usbh(struct at91_usbh_data
*data
)
72 /* Enable VBus control for UHP ports */
73 for (i
= 0; i
< data
->ports
; i
++) {
74 if (data
->vbus_pin
[i
])
75 at91_set_gpio_output(data
->vbus_pin
[i
], 0);
79 platform_device_register(&at91_usbh_device
);
82 void __init
at91_add_device_usbh(struct at91_usbh_data
*data
) {}
86 /* --------------------------------------------------------------------
88 * -------------------------------------------------------------------- */
90 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
91 static u64 eth_dmamask
= DMA_BIT_MASK(32);
92 static struct at91_eth_data eth_data
;
94 static struct resource eth_resources
[] = {
96 .start
= AT91CAP9_BASE_EMAC
,
97 .end
= AT91CAP9_BASE_EMAC
+ SZ_16K
- 1,
98 .flags
= IORESOURCE_MEM
,
101 .start
= AT91CAP9_ID_EMAC
,
102 .end
= AT91CAP9_ID_EMAC
,
103 .flags
= IORESOURCE_IRQ
,
107 static struct platform_device at91cap9_eth_device
= {
111 .dma_mask
= ð_dmamask
,
112 .coherent_dma_mask
= DMA_BIT_MASK(32),
113 .platform_data
= ð_data
,
115 .resource
= eth_resources
,
116 .num_resources
= ARRAY_SIZE(eth_resources
),
119 void __init
at91_add_device_eth(struct at91_eth_data
*data
)
124 if (data
->phy_irq_pin
) {
125 at91_set_gpio_input(data
->phy_irq_pin
, 0);
126 at91_set_deglitch(data
->phy_irq_pin
, 1);
129 /* Pins used for MII and RMII */
130 at91_set_A_periph(AT91_PIN_PB21
, 0); /* ETXCK_EREFCK */
131 at91_set_A_periph(AT91_PIN_PB22
, 0); /* ERXDV */
132 at91_set_A_periph(AT91_PIN_PB25
, 0); /* ERX0 */
133 at91_set_A_periph(AT91_PIN_PB26
, 0); /* ERX1 */
134 at91_set_A_periph(AT91_PIN_PB27
, 0); /* ERXER */
135 at91_set_A_periph(AT91_PIN_PB28
, 0); /* ETXEN */
136 at91_set_A_periph(AT91_PIN_PB23
, 0); /* ETX0 */
137 at91_set_A_periph(AT91_PIN_PB24
, 0); /* ETX1 */
138 at91_set_A_periph(AT91_PIN_PB30
, 0); /* EMDIO */
139 at91_set_A_periph(AT91_PIN_PB29
, 0); /* EMDC */
141 if (!data
->is_rmii
) {
142 at91_set_B_periph(AT91_PIN_PC25
, 0); /* ECRS */
143 at91_set_B_periph(AT91_PIN_PC26
, 0); /* ECOL */
144 at91_set_B_periph(AT91_PIN_PC22
, 0); /* ERX2 */
145 at91_set_B_periph(AT91_PIN_PC23
, 0); /* ERX3 */
146 at91_set_B_periph(AT91_PIN_PC27
, 0); /* ERXCK */
147 at91_set_B_periph(AT91_PIN_PC20
, 0); /* ETX2 */
148 at91_set_B_periph(AT91_PIN_PC21
, 0); /* ETX3 */
149 at91_set_B_periph(AT91_PIN_PC24
, 0); /* ETXER */
153 platform_device_register(&at91cap9_eth_device
);
156 void __init
at91_add_device_eth(struct at91_eth_data
*data
) {}
160 /* --------------------------------------------------------------------
162 * -------------------------------------------------------------------- */
164 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
165 static u64 mmc_dmamask
= DMA_BIT_MASK(32);
166 static struct at91_mmc_data mmc0_data
, mmc1_data
;
168 static struct resource mmc0_resources
[] = {
170 .start
= AT91CAP9_BASE_MCI0
,
171 .end
= AT91CAP9_BASE_MCI0
+ SZ_16K
- 1,
172 .flags
= IORESOURCE_MEM
,
175 .start
= AT91CAP9_ID_MCI0
,
176 .end
= AT91CAP9_ID_MCI0
,
177 .flags
= IORESOURCE_IRQ
,
181 static struct platform_device at91cap9_mmc0_device
= {
185 .dma_mask
= &mmc_dmamask
,
186 .coherent_dma_mask
= DMA_BIT_MASK(32),
187 .platform_data
= &mmc0_data
,
189 .resource
= mmc0_resources
,
190 .num_resources
= ARRAY_SIZE(mmc0_resources
),
193 static struct resource mmc1_resources
[] = {
195 .start
= AT91CAP9_BASE_MCI1
,
196 .end
= AT91CAP9_BASE_MCI1
+ SZ_16K
- 1,
197 .flags
= IORESOURCE_MEM
,
200 .start
= AT91CAP9_ID_MCI1
,
201 .end
= AT91CAP9_ID_MCI1
,
202 .flags
= IORESOURCE_IRQ
,
206 static struct platform_device at91cap9_mmc1_device
= {
210 .dma_mask
= &mmc_dmamask
,
211 .coherent_dma_mask
= DMA_BIT_MASK(32),
212 .platform_data
= &mmc1_data
,
214 .resource
= mmc1_resources
,
215 .num_resources
= ARRAY_SIZE(mmc1_resources
),
218 void __init
at91_add_device_mmc(short mmc_id
, struct at91_mmc_data
*data
)
225 at91_set_gpio_input(data
->det_pin
, 1);
226 at91_set_deglitch(data
->det_pin
, 1);
229 at91_set_gpio_input(data
->wp_pin
, 1);
231 at91_set_gpio_output(data
->vcc_pin
, 0);
233 if (mmc_id
== 0) { /* MCI0 */
235 at91_set_A_periph(AT91_PIN_PA2
, 0);
238 at91_set_A_periph(AT91_PIN_PA1
, 1);
240 /* DAT0, maybe DAT1..DAT3 */
241 at91_set_A_periph(AT91_PIN_PA0
, 1);
243 at91_set_A_periph(AT91_PIN_PA3
, 1);
244 at91_set_A_periph(AT91_PIN_PA4
, 1);
245 at91_set_A_periph(AT91_PIN_PA5
, 1);
249 at91_clock_associate("mci0_clk", &at91cap9_mmc1_device
.dev
, "mci_clk");
250 platform_device_register(&at91cap9_mmc0_device
);
253 at91_set_A_periph(AT91_PIN_PA16
, 0);
256 at91_set_A_periph(AT91_PIN_PA17
, 1);
258 /* DAT0, maybe DAT1..DAT3 */
259 at91_set_A_periph(AT91_PIN_PA18
, 1);
261 at91_set_A_periph(AT91_PIN_PA19
, 1);
262 at91_set_A_periph(AT91_PIN_PA20
, 1);
263 at91_set_A_periph(AT91_PIN_PA21
, 1);
267 at91_clock_associate("mci1_clk", &at91cap9_mmc1_device
.dev
, "mci_clk");
268 platform_device_register(&at91cap9_mmc1_device
);
272 void __init
at91_add_device_mmc(short mmc_id
, struct at91_mmc_data
*data
) {}
276 /* --------------------------------------------------------------------
278 * -------------------------------------------------------------------- */
280 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
281 static struct at91_nand_data nand_data
;
283 #define NAND_BASE AT91_CHIPSELECT_3
285 static struct resource nand_resources
[] = {
288 .end
= NAND_BASE
+ SZ_256M
- 1,
289 .flags
= IORESOURCE_MEM
,
292 .start
= AT91_BASE_SYS
+ AT91_ECC
,
293 .end
= AT91_BASE_SYS
+ AT91_ECC
+ SZ_512
- 1,
294 .flags
= IORESOURCE_MEM
,
298 static struct platform_device at91cap9_nand_device
= {
302 .platform_data
= &nand_data
,
304 .resource
= nand_resources
,
305 .num_resources
= ARRAY_SIZE(nand_resources
),
308 void __init
at91_add_device_nand(struct at91_nand_data
*data
)
310 unsigned long csa
, mode
;
315 csa
= at91_sys_read(AT91_MATRIX_EBICSA
);
316 at91_sys_write(AT91_MATRIX_EBICSA
, csa
| AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA
| AT91_MATRIX_EBI_VDDIOMSEL_3_3V
);
318 /* set the bus interface characteristics */
319 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(1)
320 | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(1));
322 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(6)
323 | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(6));
325 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(8) | AT91_SMC_NRDCYCLE_(8));
327 if (data
->bus_width_16
)
328 mode
= AT91_SMC_DBW_16
;
330 mode
= AT91_SMC_DBW_8
;
331 at91_sys_write(AT91_SMC_MODE(3), mode
| AT91_SMC_READMODE
| AT91_SMC_WRITEMODE
| AT91_SMC_EXNWMODE_DISABLE
| AT91_SMC_TDF_(1));
334 if (data
->enable_pin
)
335 at91_set_gpio_output(data
->enable_pin
, 1);
339 at91_set_gpio_input(data
->rdy_pin
, 1);
341 /* card detect pin */
343 at91_set_gpio_input(data
->det_pin
, 1);
346 platform_device_register(&at91cap9_nand_device
);
349 void __init
at91_add_device_nand(struct at91_nand_data
*data
) {}
352 /* --------------------------------------------------------------------
354 * -------------------------------------------------------------------- */
357 * Prefer the GPIO code since the TWI controller isn't robust
358 * (gets overruns and underruns under load) and can only issue
359 * repeated STARTs in one scenario (the driver doesn't yet handle them).
361 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
363 static struct i2c_gpio_platform_data pdata
= {
364 .sda_pin
= AT91_PIN_PB4
,
365 .sda_is_open_drain
= 1,
366 .scl_pin
= AT91_PIN_PB5
,
367 .scl_is_open_drain
= 1,
368 .udelay
= 2, /* ~100 kHz */
371 static struct platform_device at91cap9_twi_device
= {
374 .dev
.platform_data
= &pdata
,
377 void __init
at91_add_device_i2c(struct i2c_board_info
*devices
, int nr_devices
)
379 at91_set_GPIO_periph(AT91_PIN_PB4
, 1); /* TWD (SDA) */
380 at91_set_multi_drive(AT91_PIN_PB4
, 1);
382 at91_set_GPIO_periph(AT91_PIN_PB5
, 1); /* TWCK (SCL) */
383 at91_set_multi_drive(AT91_PIN_PB5
, 1);
385 i2c_register_board_info(0, devices
, nr_devices
);
386 platform_device_register(&at91cap9_twi_device
);
389 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
391 static struct resource twi_resources
[] = {
393 .start
= AT91CAP9_BASE_TWI
,
394 .end
= AT91CAP9_BASE_TWI
+ SZ_16K
- 1,
395 .flags
= IORESOURCE_MEM
,
398 .start
= AT91CAP9_ID_TWI
,
399 .end
= AT91CAP9_ID_TWI
,
400 .flags
= IORESOURCE_IRQ
,
404 static struct platform_device at91cap9_twi_device
= {
407 .resource
= twi_resources
,
408 .num_resources
= ARRAY_SIZE(twi_resources
),
411 void __init
at91_add_device_i2c(struct i2c_board_info
*devices
, int nr_devices
)
413 /* pins used for TWI interface */
414 at91_set_B_periph(AT91_PIN_PB4
, 0); /* TWD */
415 at91_set_multi_drive(AT91_PIN_PB4
, 1);
417 at91_set_B_periph(AT91_PIN_PB5
, 0); /* TWCK */
418 at91_set_multi_drive(AT91_PIN_PB5
, 1);
420 i2c_register_board_info(0, devices
, nr_devices
);
421 platform_device_register(&at91cap9_twi_device
);
424 void __init
at91_add_device_i2c(struct i2c_board_info
*devices
, int nr_devices
) {}
427 /* --------------------------------------------------------------------
429 * -------------------------------------------------------------------- */
431 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
432 static u64 spi_dmamask
= DMA_BIT_MASK(32);
434 static struct resource spi0_resources
[] = {
436 .start
= AT91CAP9_BASE_SPI0
,
437 .end
= AT91CAP9_BASE_SPI0
+ SZ_16K
- 1,
438 .flags
= IORESOURCE_MEM
,
441 .start
= AT91CAP9_ID_SPI0
,
442 .end
= AT91CAP9_ID_SPI0
,
443 .flags
= IORESOURCE_IRQ
,
447 static struct platform_device at91cap9_spi0_device
= {
451 .dma_mask
= &spi_dmamask
,
452 .coherent_dma_mask
= DMA_BIT_MASK(32),
454 .resource
= spi0_resources
,
455 .num_resources
= ARRAY_SIZE(spi0_resources
),
458 static const unsigned spi0_standard_cs
[4] = { AT91_PIN_PA5
, AT91_PIN_PA3
, AT91_PIN_PD0
, AT91_PIN_PD1
};
460 static struct resource spi1_resources
[] = {
462 .start
= AT91CAP9_BASE_SPI1
,
463 .end
= AT91CAP9_BASE_SPI1
+ SZ_16K
- 1,
464 .flags
= IORESOURCE_MEM
,
467 .start
= AT91CAP9_ID_SPI1
,
468 .end
= AT91CAP9_ID_SPI1
,
469 .flags
= IORESOURCE_IRQ
,
473 static struct platform_device at91cap9_spi1_device
= {
477 .dma_mask
= &spi_dmamask
,
478 .coherent_dma_mask
= DMA_BIT_MASK(32),
480 .resource
= spi1_resources
,
481 .num_resources
= ARRAY_SIZE(spi1_resources
),
484 static const unsigned spi1_standard_cs
[4] = { AT91_PIN_PB15
, AT91_PIN_PB16
, AT91_PIN_PB17
, AT91_PIN_PB18
};
486 void __init
at91_add_device_spi(struct spi_board_info
*devices
, int nr_devices
)
489 unsigned long cs_pin
;
490 short enable_spi0
= 0;
491 short enable_spi1
= 0;
493 /* Choose SPI chip-selects */
494 for (i
= 0; i
< nr_devices
; i
++) {
495 if (devices
[i
].controller_data
)
496 cs_pin
= (unsigned long) devices
[i
].controller_data
;
497 else if (devices
[i
].bus_num
== 0)
498 cs_pin
= spi0_standard_cs
[devices
[i
].chip_select
];
500 cs_pin
= spi1_standard_cs
[devices
[i
].chip_select
];
502 if (devices
[i
].bus_num
== 0)
507 /* enable chip-select pin */
508 at91_set_gpio_output(cs_pin
, 1);
510 /* pass chip-select pin to driver */
511 devices
[i
].controller_data
= (void *) cs_pin
;
514 spi_register_board_info(devices
, nr_devices
);
516 /* Configure SPI bus(es) */
518 at91_set_B_periph(AT91_PIN_PA0
, 0); /* SPI0_MISO */
519 at91_set_B_periph(AT91_PIN_PA1
, 0); /* SPI0_MOSI */
520 at91_set_B_periph(AT91_PIN_PA2
, 0); /* SPI0_SPCK */
522 at91_clock_associate("spi0_clk", &at91cap9_spi0_device
.dev
, "spi_clk");
523 platform_device_register(&at91cap9_spi0_device
);
526 at91_set_A_periph(AT91_PIN_PB12
, 0); /* SPI1_MISO */
527 at91_set_A_periph(AT91_PIN_PB13
, 0); /* SPI1_MOSI */
528 at91_set_A_periph(AT91_PIN_PB14
, 0); /* SPI1_SPCK */
530 at91_clock_associate("spi1_clk", &at91cap9_spi1_device
.dev
, "spi_clk");
531 platform_device_register(&at91cap9_spi1_device
);
535 void __init
at91_add_device_spi(struct spi_board_info
*devices
, int nr_devices
) {}
539 /* --------------------------------------------------------------------
541 * -------------------------------------------------------------------- */
543 static struct platform_device at91cap9_rtt_device
= {
549 static void __init
at91_add_device_rtt(void)
551 platform_device_register(&at91cap9_rtt_device
);
555 /* --------------------------------------------------------------------
557 * -------------------------------------------------------------------- */
559 #if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE)
560 static struct platform_device at91cap9_wdt_device
= {
566 static void __init
at91_add_device_watchdog(void)
568 platform_device_register(&at91cap9_wdt_device
);
571 static void __init
at91_add_device_watchdog(void) {}
575 /* --------------------------------------------------------------------
577 * -------------------------------------------------------------------- */
579 #if defined(CONFIG_SND_AT91_AC97) || defined(CONFIG_SND_AT91_AC97_MODULE)
580 static u64 ac97_dmamask
= DMA_BIT_MASK(32);
581 static struct atmel_ac97_data ac97_data
;
583 static struct resource ac97_resources
[] = {
585 .start
= AT91CAP9_BASE_AC97C
,
586 .end
= AT91CAP9_BASE_AC97C
+ SZ_16K
- 1,
587 .flags
= IORESOURCE_MEM
,
590 .start
= AT91CAP9_ID_AC97C
,
591 .end
= AT91CAP9_ID_AC97C
,
592 .flags
= IORESOURCE_IRQ
,
596 static struct platform_device at91cap9_ac97_device
= {
600 .dma_mask
= &ac97_dmamask
,
601 .coherent_dma_mask
= DMA_BIT_MASK(32),
602 .platform_data
= &ac97_data
,
604 .resource
= ac97_resources
,
605 .num_resources
= ARRAY_SIZE(ac97_resources
),
608 void __init
at91_add_device_ac97(struct atmel_ac97_data
*data
)
613 at91_set_A_periph(AT91_PIN_PA6
, 0); /* AC97FS */
614 at91_set_A_periph(AT91_PIN_PA7
, 0); /* AC97CK */
615 at91_set_A_periph(AT91_PIN_PA8
, 0); /* AC97TX */
616 at91_set_A_periph(AT91_PIN_PA9
, 0); /* AC97RX */
620 at91_set_gpio_output(data
->reset_pin
, 0);
623 platform_device_register(&at91cap9_ac97_device
);
626 void __init
at91_add_device_ac97(struct atmel_ac97_data
*data
) {}
630 /* --------------------------------------------------------------------
632 * -------------------------------------------------------------------- */
634 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
635 static u64 lcdc_dmamask
= DMA_BIT_MASK(32);
636 static struct atmel_lcdfb_info lcdc_data
;
638 static struct resource lcdc_resources
[] = {
640 .start
= AT91CAP9_LCDC_BASE
,
641 .end
= AT91CAP9_LCDC_BASE
+ SZ_4K
- 1,
642 .flags
= IORESOURCE_MEM
,
645 .start
= AT91CAP9_ID_LCDC
,
646 .end
= AT91CAP9_ID_LCDC
,
647 .flags
= IORESOURCE_IRQ
,
651 static struct platform_device at91_lcdc_device
= {
652 .name
= "atmel_lcdfb",
655 .dma_mask
= &lcdc_dmamask
,
656 .coherent_dma_mask
= DMA_BIT_MASK(32),
657 .platform_data
= &lcdc_data
,
659 .resource
= lcdc_resources
,
660 .num_resources
= ARRAY_SIZE(lcdc_resources
),
663 void __init
at91_add_device_lcdc(struct atmel_lcdfb_info
*data
)
668 at91_set_A_periph(AT91_PIN_PC1
, 0); /* LCDHSYNC */
669 at91_set_A_periph(AT91_PIN_PC2
, 0); /* LCDDOTCK */
670 at91_set_A_periph(AT91_PIN_PC3
, 0); /* LCDDEN */
671 at91_set_B_periph(AT91_PIN_PB9
, 0); /* LCDCC */
672 at91_set_A_periph(AT91_PIN_PC6
, 0); /* LCDD2 */
673 at91_set_A_periph(AT91_PIN_PC7
, 0); /* LCDD3 */
674 at91_set_A_periph(AT91_PIN_PC8
, 0); /* LCDD4 */
675 at91_set_A_periph(AT91_PIN_PC9
, 0); /* LCDD5 */
676 at91_set_A_periph(AT91_PIN_PC10
, 0); /* LCDD6 */
677 at91_set_A_periph(AT91_PIN_PC11
, 0); /* LCDD7 */
678 at91_set_A_periph(AT91_PIN_PC14
, 0); /* LCDD10 */
679 at91_set_A_periph(AT91_PIN_PC15
, 0); /* LCDD11 */
680 at91_set_A_periph(AT91_PIN_PC16
, 0); /* LCDD12 */
681 at91_set_A_periph(AT91_PIN_PC17
, 0); /* LCDD13 */
682 at91_set_A_periph(AT91_PIN_PC18
, 0); /* LCDD14 */
683 at91_set_A_periph(AT91_PIN_PC19
, 0); /* LCDD15 */
684 at91_set_A_periph(AT91_PIN_PC22
, 0); /* LCDD18 */
685 at91_set_A_periph(AT91_PIN_PC23
, 0); /* LCDD19 */
686 at91_set_A_periph(AT91_PIN_PC24
, 0); /* LCDD20 */
687 at91_set_A_periph(AT91_PIN_PC25
, 0); /* LCDD21 */
688 at91_set_A_periph(AT91_PIN_PC26
, 0); /* LCDD22 */
689 at91_set_A_periph(AT91_PIN_PC27
, 0); /* LCDD23 */
692 platform_device_register(&at91_lcdc_device
);
695 void __init
at91_add_device_lcdc(struct atmel_lcdfb_info
*data
) {}
699 /* --------------------------------------------------------------------
700 * SSC -- Synchronous Serial Controller
701 * -------------------------------------------------------------------- */
703 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
704 static u64 ssc0_dmamask
= DMA_BIT_MASK(32);
706 static struct resource ssc0_resources
[] = {
708 .start
= AT91CAP9_BASE_SSC0
,
709 .end
= AT91CAP9_BASE_SSC0
+ SZ_16K
- 1,
710 .flags
= IORESOURCE_MEM
,
713 .start
= AT91CAP9_ID_SSC0
,
714 .end
= AT91CAP9_ID_SSC0
,
715 .flags
= IORESOURCE_IRQ
,
719 static struct platform_device at91cap9_ssc0_device
= {
723 .dma_mask
= &ssc0_dmamask
,
724 .coherent_dma_mask
= DMA_BIT_MASK(32),
726 .resource
= ssc0_resources
,
727 .num_resources
= ARRAY_SIZE(ssc0_resources
),
730 static inline void configure_ssc0_pins(unsigned pins
)
732 if (pins
& ATMEL_SSC_TF
)
733 at91_set_A_periph(AT91_PIN_PB0
, 1);
734 if (pins
& ATMEL_SSC_TK
)
735 at91_set_A_periph(AT91_PIN_PB1
, 1);
736 if (pins
& ATMEL_SSC_TD
)
737 at91_set_A_periph(AT91_PIN_PB2
, 1);
738 if (pins
& ATMEL_SSC_RD
)
739 at91_set_A_periph(AT91_PIN_PB3
, 1);
740 if (pins
& ATMEL_SSC_RK
)
741 at91_set_A_periph(AT91_PIN_PB4
, 1);
742 if (pins
& ATMEL_SSC_RF
)
743 at91_set_A_periph(AT91_PIN_PB5
, 1);
746 static u64 ssc1_dmamask
= DMA_BIT_MASK(32);
748 static struct resource ssc1_resources
[] = {
750 .start
= AT91CAP9_BASE_SSC1
,
751 .end
= AT91CAP9_BASE_SSC1
+ SZ_16K
- 1,
752 .flags
= IORESOURCE_MEM
,
755 .start
= AT91CAP9_ID_SSC1
,
756 .end
= AT91CAP9_ID_SSC1
,
757 .flags
= IORESOURCE_IRQ
,
761 static struct platform_device at91cap9_ssc1_device
= {
765 .dma_mask
= &ssc1_dmamask
,
766 .coherent_dma_mask
= DMA_BIT_MASK(32),
768 .resource
= ssc1_resources
,
769 .num_resources
= ARRAY_SIZE(ssc1_resources
),
772 static inline void configure_ssc1_pins(unsigned pins
)
774 if (pins
& ATMEL_SSC_TF
)
775 at91_set_A_periph(AT91_PIN_PB6
, 1);
776 if (pins
& ATMEL_SSC_TK
)
777 at91_set_A_periph(AT91_PIN_PB7
, 1);
778 if (pins
& ATMEL_SSC_TD
)
779 at91_set_A_periph(AT91_PIN_PB8
, 1);
780 if (pins
& ATMEL_SSC_RD
)
781 at91_set_A_periph(AT91_PIN_PB9
, 1);
782 if (pins
& ATMEL_SSC_RK
)
783 at91_set_A_periph(AT91_PIN_PB10
, 1);
784 if (pins
& ATMEL_SSC_RF
)
785 at91_set_A_periph(AT91_PIN_PB11
, 1);
789 * SSC controllers are accessed through library code, instead of any
790 * kind of all-singing/all-dancing driver. For example one could be
791 * used by a particular I2S audio codec's driver, while another one
792 * on the same system might be used by a custom data capture driver.
794 void __init
at91_add_device_ssc(unsigned id
, unsigned pins
)
796 struct platform_device
*pdev
;
799 * NOTE: caller is responsible for passing information matching
800 * "pins" to whatever will be using each particular controller.
803 case AT91CAP9_ID_SSC0
:
804 pdev
= &at91cap9_ssc0_device
;
805 configure_ssc0_pins(pins
);
806 at91_clock_associate("ssc0_clk", &pdev
->dev
, "ssc");
808 case AT91CAP9_ID_SSC1
:
809 pdev
= &at91cap9_ssc1_device
;
810 configure_ssc1_pins(pins
);
811 at91_clock_associate("ssc1_clk", &pdev
->dev
, "ssc");
817 platform_device_register(pdev
);
821 void __init
at91_add_device_ssc(unsigned id
, unsigned pins
) {}
825 /* --------------------------------------------------------------------
827 * -------------------------------------------------------------------- */
829 #if defined(CONFIG_SERIAL_ATMEL)
830 static struct resource dbgu_resources
[] = {
832 .start
= AT91_VA_BASE_SYS
+ AT91_DBGU
,
833 .end
= AT91_VA_BASE_SYS
+ AT91_DBGU
+ SZ_512
- 1,
834 .flags
= IORESOURCE_MEM
,
837 .start
= AT91_ID_SYS
,
839 .flags
= IORESOURCE_IRQ
,
843 static struct atmel_uart_data dbgu_data
= {
845 .use_dma_rx
= 0, /* DBGU not capable of receive DMA */
846 .regs
= (void __iomem
*)(AT91_VA_BASE_SYS
+ AT91_DBGU
),
849 static u64 dbgu_dmamask
= DMA_BIT_MASK(32);
851 static struct platform_device at91cap9_dbgu_device
= {
852 .name
= "atmel_usart",
855 .dma_mask
= &dbgu_dmamask
,
856 .coherent_dma_mask
= DMA_BIT_MASK(32),
857 .platform_data
= &dbgu_data
,
859 .resource
= dbgu_resources
,
860 .num_resources
= ARRAY_SIZE(dbgu_resources
),
863 static inline void configure_dbgu_pins(void)
865 at91_set_A_periph(AT91_PIN_PC30
, 0); /* DRXD */
866 at91_set_A_periph(AT91_PIN_PC31
, 1); /* DTXD */
869 static struct resource uart0_resources
[] = {
871 .start
= AT91CAP9_BASE_US0
,
872 .end
= AT91CAP9_BASE_US0
+ SZ_16K
- 1,
873 .flags
= IORESOURCE_MEM
,
876 .start
= AT91CAP9_ID_US0
,
877 .end
= AT91CAP9_ID_US0
,
878 .flags
= IORESOURCE_IRQ
,
882 static struct atmel_uart_data uart0_data
= {
887 static u64 uart0_dmamask
= DMA_BIT_MASK(32);
889 static struct platform_device at91cap9_uart0_device
= {
890 .name
= "atmel_usart",
893 .dma_mask
= &uart0_dmamask
,
894 .coherent_dma_mask
= DMA_BIT_MASK(32),
895 .platform_data
= &uart0_data
,
897 .resource
= uart0_resources
,
898 .num_resources
= ARRAY_SIZE(uart0_resources
),
901 static inline void configure_usart0_pins(unsigned pins
)
903 at91_set_A_periph(AT91_PIN_PA22
, 1); /* TXD0 */
904 at91_set_A_periph(AT91_PIN_PA23
, 0); /* RXD0 */
906 if (pins
& ATMEL_UART_RTS
)
907 at91_set_A_periph(AT91_PIN_PA24
, 0); /* RTS0 */
908 if (pins
& ATMEL_UART_CTS
)
909 at91_set_A_periph(AT91_PIN_PA25
, 0); /* CTS0 */
912 static struct resource uart1_resources
[] = {
914 .start
= AT91CAP9_BASE_US1
,
915 .end
= AT91CAP9_BASE_US1
+ SZ_16K
- 1,
916 .flags
= IORESOURCE_MEM
,
919 .start
= AT91CAP9_ID_US1
,
920 .end
= AT91CAP9_ID_US1
,
921 .flags
= IORESOURCE_IRQ
,
925 static struct atmel_uart_data uart1_data
= {
930 static u64 uart1_dmamask
= DMA_BIT_MASK(32);
932 static struct platform_device at91cap9_uart1_device
= {
933 .name
= "atmel_usart",
936 .dma_mask
= &uart1_dmamask
,
937 .coherent_dma_mask
= DMA_BIT_MASK(32),
938 .platform_data
= &uart1_data
,
940 .resource
= uart1_resources
,
941 .num_resources
= ARRAY_SIZE(uart1_resources
),
944 static inline void configure_usart1_pins(unsigned pins
)
946 at91_set_A_periph(AT91_PIN_PD0
, 1); /* TXD1 */
947 at91_set_A_periph(AT91_PIN_PD1
, 0); /* RXD1 */
949 if (pins
& ATMEL_UART_RTS
)
950 at91_set_B_periph(AT91_PIN_PD7
, 0); /* RTS1 */
951 if (pins
& ATMEL_UART_CTS
)
952 at91_set_B_periph(AT91_PIN_PD8
, 0); /* CTS1 */
955 static struct resource uart2_resources
[] = {
957 .start
= AT91CAP9_BASE_US2
,
958 .end
= AT91CAP9_BASE_US2
+ SZ_16K
- 1,
959 .flags
= IORESOURCE_MEM
,
962 .start
= AT91CAP9_ID_US2
,
963 .end
= AT91CAP9_ID_US2
,
964 .flags
= IORESOURCE_IRQ
,
968 static struct atmel_uart_data uart2_data
= {
973 static u64 uart2_dmamask
= DMA_BIT_MASK(32);
975 static struct platform_device at91cap9_uart2_device
= {
976 .name
= "atmel_usart",
979 .dma_mask
= &uart2_dmamask
,
980 .coherent_dma_mask
= DMA_BIT_MASK(32),
981 .platform_data
= &uart2_data
,
983 .resource
= uart2_resources
,
984 .num_resources
= ARRAY_SIZE(uart2_resources
),
987 static inline void configure_usart2_pins(unsigned pins
)
989 at91_set_A_periph(AT91_PIN_PD2
, 1); /* TXD2 */
990 at91_set_A_periph(AT91_PIN_PD3
, 0); /* RXD2 */
992 if (pins
& ATMEL_UART_RTS
)
993 at91_set_B_periph(AT91_PIN_PD5
, 0); /* RTS2 */
994 if (pins
& ATMEL_UART_CTS
)
995 at91_set_B_periph(AT91_PIN_PD6
, 0); /* CTS2 */
998 static struct platform_device
*at91_uarts
[ATMEL_MAX_UART
]; /* the UARTs to use */
999 struct platform_device
*atmel_default_console_device
; /* the serial console device */
1001 void __init
at91_register_uart(unsigned id
, unsigned portnr
, unsigned pins
)
1003 struct platform_device
*pdev
;
1007 pdev
= &at91cap9_dbgu_device
;
1008 configure_dbgu_pins();
1009 at91_clock_associate("mck", &pdev
->dev
, "usart");
1011 case AT91CAP9_ID_US0
:
1012 pdev
= &at91cap9_uart0_device
;
1013 configure_usart0_pins(pins
);
1014 at91_clock_associate("usart0_clk", &pdev
->dev
, "usart");
1016 case AT91CAP9_ID_US1
:
1017 pdev
= &at91cap9_uart1_device
;
1018 configure_usart1_pins(pins
);
1019 at91_clock_associate("usart1_clk", &pdev
->dev
, "usart");
1021 case AT91CAP9_ID_US2
:
1022 pdev
= &at91cap9_uart2_device
;
1023 configure_usart2_pins(pins
);
1024 at91_clock_associate("usart2_clk", &pdev
->dev
, "usart");
1029 pdev
->id
= portnr
; /* update to mapped ID */
1031 if (portnr
< ATMEL_MAX_UART
)
1032 at91_uarts
[portnr
] = pdev
;
1035 void __init
at91_set_serial_console(unsigned portnr
)
1037 if (portnr
< ATMEL_MAX_UART
)
1038 atmel_default_console_device
= at91_uarts
[portnr
];
1039 if (!atmel_default_console_device
)
1040 printk(KERN_INFO
"AT91: No default serial console defined.\n");
1043 void __init
at91_add_device_serial(void)
1047 for (i
= 0; i
< ATMEL_MAX_UART
; i
++) {
1049 platform_device_register(at91_uarts
[i
]);
1053 void __init
at91_register_uart(unsigned id
, unsigned portnr
, unsigned pins
) {}
1054 void __init
at91_set_serial_console(unsigned portnr
) {}
1055 void __init
at91_add_device_serial(void) {}
1059 /* -------------------------------------------------------------------- */
1061 * These devices are always present and don't need any board-specific
1064 static int __init
at91_add_standard_devices(void)
1066 at91_add_device_rtt();
1067 at91_add_device_watchdog();
1071 arch_initcall(at91_add_standard_devices
);