2 * arch/arm/mach-at91/at91sam9263_devices.c
4 * Copyright (C) 2007 Atmel Corporation.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/platform_device.h>
17 #include <linux/i2c-gpio.h>
20 #include <video/atmel_lcdc.h>
22 #include <asm/arch/board.h>
23 #include <asm/arch/gpio.h>
24 #include <asm/arch/at91sam9263.h>
25 #include <asm/arch/at91sam9263_matrix.h>
26 #include <asm/arch/at91sam9_smc.h>
31 /* --------------------------------------------------------------------
33 * -------------------------------------------------------------------- */
35 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
36 static u64 ohci_dmamask
= DMA_BIT_MASK(32);
37 static struct at91_usbh_data usbh_data
;
39 static struct resource usbh_resources
[] = {
41 .start
= AT91SAM9263_UHP_BASE
,
42 .end
= AT91SAM9263_UHP_BASE
+ SZ_1M
- 1,
43 .flags
= IORESOURCE_MEM
,
46 .start
= AT91SAM9263_ID_UHP
,
47 .end
= AT91SAM9263_ID_UHP
,
48 .flags
= IORESOURCE_IRQ
,
52 static struct platform_device at91_usbh_device
= {
56 .dma_mask
= &ohci_dmamask
,
57 .coherent_dma_mask
= DMA_BIT_MASK(32),
58 .platform_data
= &usbh_data
,
60 .resource
= usbh_resources
,
61 .num_resources
= ARRAY_SIZE(usbh_resources
),
64 void __init
at91_add_device_usbh(struct at91_usbh_data
*data
)
71 /* Enable VBus control for UHP ports */
72 for (i
= 0; i
< data
->ports
; i
++) {
73 if (data
->vbus_pin
[i
])
74 at91_set_gpio_output(data
->vbus_pin
[i
], 0);
78 platform_device_register(&at91_usbh_device
);
81 void __init
at91_add_device_usbh(struct at91_usbh_data
*data
) {}
85 /* --------------------------------------------------------------------
87 * -------------------------------------------------------------------- */
89 #ifdef CONFIG_USB_GADGET_AT91
90 static struct at91_udc_data udc_data
;
92 static struct resource udc_resources
[] = {
94 .start
= AT91SAM9263_BASE_UDP
,
95 .end
= AT91SAM9263_BASE_UDP
+ SZ_16K
- 1,
96 .flags
= IORESOURCE_MEM
,
99 .start
= AT91SAM9263_ID_UDP
,
100 .end
= AT91SAM9263_ID_UDP
,
101 .flags
= IORESOURCE_IRQ
,
105 static struct platform_device at91_udc_device
= {
109 .platform_data
= &udc_data
,
111 .resource
= udc_resources
,
112 .num_resources
= ARRAY_SIZE(udc_resources
),
115 void __init
at91_add_device_udc(struct at91_udc_data
*data
)
120 if (data
->vbus_pin
) {
121 at91_set_gpio_input(data
->vbus_pin
, 0);
122 at91_set_deglitch(data
->vbus_pin
, 1);
125 /* Pullup pin is handled internally by USB device peripheral */
128 platform_device_register(&at91_udc_device
);
131 void __init
at91_add_device_udc(struct at91_udc_data
*data
) {}
135 /* --------------------------------------------------------------------
137 * -------------------------------------------------------------------- */
139 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
140 static u64 eth_dmamask
= DMA_BIT_MASK(32);
141 static struct at91_eth_data eth_data
;
143 static struct resource eth_resources
[] = {
145 .start
= AT91SAM9263_BASE_EMAC
,
146 .end
= AT91SAM9263_BASE_EMAC
+ SZ_16K
- 1,
147 .flags
= IORESOURCE_MEM
,
150 .start
= AT91SAM9263_ID_EMAC
,
151 .end
= AT91SAM9263_ID_EMAC
,
152 .flags
= IORESOURCE_IRQ
,
156 static struct platform_device at91sam9263_eth_device
= {
160 .dma_mask
= ð_dmamask
,
161 .coherent_dma_mask
= DMA_BIT_MASK(32),
162 .platform_data
= ð_data
,
164 .resource
= eth_resources
,
165 .num_resources
= ARRAY_SIZE(eth_resources
),
168 void __init
at91_add_device_eth(struct at91_eth_data
*data
)
173 if (data
->phy_irq_pin
) {
174 at91_set_gpio_input(data
->phy_irq_pin
, 0);
175 at91_set_deglitch(data
->phy_irq_pin
, 1);
178 /* Pins used for MII and RMII */
179 at91_set_A_periph(AT91_PIN_PE21
, 0); /* ETXCK_EREFCK */
180 at91_set_B_periph(AT91_PIN_PC25
, 0); /* ERXDV */
181 at91_set_A_periph(AT91_PIN_PE25
, 0); /* ERX0 */
182 at91_set_A_periph(AT91_PIN_PE26
, 0); /* ERX1 */
183 at91_set_A_periph(AT91_PIN_PE27
, 0); /* ERXER */
184 at91_set_A_periph(AT91_PIN_PE28
, 0); /* ETXEN */
185 at91_set_A_periph(AT91_PIN_PE23
, 0); /* ETX0 */
186 at91_set_A_periph(AT91_PIN_PE24
, 0); /* ETX1 */
187 at91_set_A_periph(AT91_PIN_PE30
, 0); /* EMDIO */
188 at91_set_A_periph(AT91_PIN_PE29
, 0); /* EMDC */
190 if (!data
->is_rmii
) {
191 at91_set_A_periph(AT91_PIN_PE22
, 0); /* ECRS */
192 at91_set_B_periph(AT91_PIN_PC26
, 0); /* ECOL */
193 at91_set_B_periph(AT91_PIN_PC22
, 0); /* ERX2 */
194 at91_set_B_periph(AT91_PIN_PC23
, 0); /* ERX3 */
195 at91_set_B_periph(AT91_PIN_PC27
, 0); /* ERXCK */
196 at91_set_B_periph(AT91_PIN_PC20
, 0); /* ETX2 */
197 at91_set_B_periph(AT91_PIN_PC21
, 0); /* ETX3 */
198 at91_set_B_periph(AT91_PIN_PC24
, 0); /* ETXER */
202 platform_device_register(&at91sam9263_eth_device
);
205 void __init
at91_add_device_eth(struct at91_eth_data
*data
) {}
209 /* --------------------------------------------------------------------
211 * -------------------------------------------------------------------- */
213 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
214 static u64 mmc_dmamask
= DMA_BIT_MASK(32);
215 static struct at91_mmc_data mmc0_data
, mmc1_data
;
217 static struct resource mmc0_resources
[] = {
219 .start
= AT91SAM9263_BASE_MCI0
,
220 .end
= AT91SAM9263_BASE_MCI0
+ SZ_16K
- 1,
221 .flags
= IORESOURCE_MEM
,
224 .start
= AT91SAM9263_ID_MCI0
,
225 .end
= AT91SAM9263_ID_MCI0
,
226 .flags
= IORESOURCE_IRQ
,
230 static struct platform_device at91sam9263_mmc0_device
= {
234 .dma_mask
= &mmc_dmamask
,
235 .coherent_dma_mask
= DMA_BIT_MASK(32),
236 .platform_data
= &mmc0_data
,
238 .resource
= mmc0_resources
,
239 .num_resources
= ARRAY_SIZE(mmc0_resources
),
242 static struct resource mmc1_resources
[] = {
244 .start
= AT91SAM9263_BASE_MCI1
,
245 .end
= AT91SAM9263_BASE_MCI1
+ SZ_16K
- 1,
246 .flags
= IORESOURCE_MEM
,
249 .start
= AT91SAM9263_ID_MCI1
,
250 .end
= AT91SAM9263_ID_MCI1
,
251 .flags
= IORESOURCE_IRQ
,
255 static struct platform_device at91sam9263_mmc1_device
= {
259 .dma_mask
= &mmc_dmamask
,
260 .coherent_dma_mask
= DMA_BIT_MASK(32),
261 .platform_data
= &mmc1_data
,
263 .resource
= mmc1_resources
,
264 .num_resources
= ARRAY_SIZE(mmc1_resources
),
267 void __init
at91_add_device_mmc(short mmc_id
, struct at91_mmc_data
*data
)
274 at91_set_gpio_input(data
->det_pin
, 1);
275 at91_set_deglitch(data
->det_pin
, 1);
278 at91_set_gpio_input(data
->wp_pin
, 1);
280 at91_set_gpio_output(data
->vcc_pin
, 0);
282 if (mmc_id
== 0) { /* MCI0 */
284 at91_set_A_periph(AT91_PIN_PA12
, 0);
288 at91_set_A_periph(AT91_PIN_PA16
, 1);
290 /* DAT0, maybe DAT1..DAT3 */
291 at91_set_A_periph(AT91_PIN_PA17
, 1);
293 at91_set_A_periph(AT91_PIN_PA18
, 1);
294 at91_set_A_periph(AT91_PIN_PA19
, 1);
295 at91_set_A_periph(AT91_PIN_PA20
, 1);
299 at91_set_A_periph(AT91_PIN_PA1
, 1);
301 /* DAT0, maybe DAT1..DAT3 */
302 at91_set_A_periph(AT91_PIN_PA0
, 1);
304 at91_set_A_periph(AT91_PIN_PA3
, 1);
305 at91_set_A_periph(AT91_PIN_PA4
, 1);
306 at91_set_A_periph(AT91_PIN_PA5
, 1);
311 at91_clock_associate("mci0_clk", &at91sam9263_mmc1_device
.dev
, "mci_clk");
312 platform_device_register(&at91sam9263_mmc0_device
);
315 at91_set_A_periph(AT91_PIN_PA6
, 0);
319 at91_set_A_periph(AT91_PIN_PA21
, 1);
321 /* DAT0, maybe DAT1..DAT3 */
322 at91_set_A_periph(AT91_PIN_PA22
, 1);
324 at91_set_A_periph(AT91_PIN_PA23
, 1);
325 at91_set_A_periph(AT91_PIN_PA24
, 1);
326 at91_set_A_periph(AT91_PIN_PA25
, 1);
330 at91_set_A_periph(AT91_PIN_PA7
, 1);
332 /* DAT0, maybe DAT1..DAT3 */
333 at91_set_A_periph(AT91_PIN_PA8
, 1);
335 at91_set_A_periph(AT91_PIN_PA9
, 1);
336 at91_set_A_periph(AT91_PIN_PA10
, 1);
337 at91_set_A_periph(AT91_PIN_PA11
, 1);
342 at91_clock_associate("mci1_clk", &at91sam9263_mmc1_device
.dev
, "mci_clk");
343 platform_device_register(&at91sam9263_mmc1_device
);
347 void __init
at91_add_device_mmc(short mmc_id
, struct at91_mmc_data
*data
) {}
351 /* --------------------------------------------------------------------
353 * -------------------------------------------------------------------- */
355 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
356 static struct at91_nand_data nand_data
;
358 #define NAND_BASE AT91_CHIPSELECT_3
360 static struct resource nand_resources
[] = {
363 .end
= NAND_BASE
+ SZ_256M
- 1,
364 .flags
= IORESOURCE_MEM
,
367 .start
= AT91_BASE_SYS
+ AT91_ECC0
,
368 .end
= AT91_BASE_SYS
+ AT91_ECC0
+ SZ_512
- 1,
369 .flags
= IORESOURCE_MEM
,
373 static struct platform_device at91sam9263_nand_device
= {
377 .platform_data
= &nand_data
,
379 .resource
= nand_resources
,
380 .num_resources
= ARRAY_SIZE(nand_resources
),
383 void __init
at91_add_device_nand(struct at91_nand_data
*data
)
385 unsigned long csa
, mode
;
390 csa
= at91_sys_read(AT91_MATRIX_EBI0CSA
);
391 at91_sys_write(AT91_MATRIX_EBI0CSA
, csa
| AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA
);
393 /* set the bus interface characteristics */
394 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
395 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
397 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
398 | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
400 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
402 if (data
->bus_width_16
)
403 mode
= AT91_SMC_DBW_16
;
405 mode
= AT91_SMC_DBW_8
;
406 at91_sys_write(AT91_SMC_MODE(3), mode
| AT91_SMC_READMODE
| AT91_SMC_WRITEMODE
| AT91_SMC_EXNWMODE_DISABLE
| AT91_SMC_TDF_(2));
409 if (data
->enable_pin
)
410 at91_set_gpio_output(data
->enable_pin
, 1);
414 at91_set_gpio_input(data
->rdy_pin
, 1);
416 /* card detect pin */
418 at91_set_gpio_input(data
->det_pin
, 1);
421 platform_device_register(&at91sam9263_nand_device
);
424 void __init
at91_add_device_nand(struct at91_nand_data
*data
) {}
428 /* --------------------------------------------------------------------
430 * -------------------------------------------------------------------- */
433 * Prefer the GPIO code since the TWI controller isn't robust
434 * (gets overruns and underruns under load) and can only issue
435 * repeated STARTs in one scenario (the driver doesn't yet handle them).
437 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
439 static struct i2c_gpio_platform_data pdata
= {
440 .sda_pin
= AT91_PIN_PB4
,
441 .sda_is_open_drain
= 1,
442 .scl_pin
= AT91_PIN_PB5
,
443 .scl_is_open_drain
= 1,
444 .udelay
= 2, /* ~100 kHz */
447 static struct platform_device at91sam9263_twi_device
= {
450 .dev
.platform_data
= &pdata
,
453 void __init
at91_add_device_i2c(struct i2c_board_info
*devices
, int nr_devices
)
455 at91_set_GPIO_periph(AT91_PIN_PB4
, 1); /* TWD (SDA) */
456 at91_set_multi_drive(AT91_PIN_PB4
, 1);
458 at91_set_GPIO_periph(AT91_PIN_PB5
, 1); /* TWCK (SCL) */
459 at91_set_multi_drive(AT91_PIN_PB5
, 1);
461 i2c_register_board_info(0, devices
, nr_devices
);
462 platform_device_register(&at91sam9263_twi_device
);
465 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
467 static struct resource twi_resources
[] = {
469 .start
= AT91SAM9263_BASE_TWI
,
470 .end
= AT91SAM9263_BASE_TWI
+ SZ_16K
- 1,
471 .flags
= IORESOURCE_MEM
,
474 .start
= AT91SAM9263_ID_TWI
,
475 .end
= AT91SAM9263_ID_TWI
,
476 .flags
= IORESOURCE_IRQ
,
480 static struct platform_device at91sam9263_twi_device
= {
483 .resource
= twi_resources
,
484 .num_resources
= ARRAY_SIZE(twi_resources
),
487 void __init
at91_add_device_i2c(struct i2c_board_info
*devices
, int nr_devices
)
489 /* pins used for TWI interface */
490 at91_set_A_periph(AT91_PIN_PB4
, 0); /* TWD */
491 at91_set_multi_drive(AT91_PIN_PB4
, 1);
493 at91_set_A_periph(AT91_PIN_PB5
, 0); /* TWCK */
494 at91_set_multi_drive(AT91_PIN_PB5
, 1);
496 i2c_register_board_info(0, devices
, nr_devices
);
497 platform_device_register(&at91sam9263_twi_device
);
500 void __init
at91_add_device_i2c(struct i2c_board_info
*devices
, int nr_devices
) {}
504 /* --------------------------------------------------------------------
506 * -------------------------------------------------------------------- */
508 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
509 static u64 spi_dmamask
= DMA_BIT_MASK(32);
511 static struct resource spi0_resources
[] = {
513 .start
= AT91SAM9263_BASE_SPI0
,
514 .end
= AT91SAM9263_BASE_SPI0
+ SZ_16K
- 1,
515 .flags
= IORESOURCE_MEM
,
518 .start
= AT91SAM9263_ID_SPI0
,
519 .end
= AT91SAM9263_ID_SPI0
,
520 .flags
= IORESOURCE_IRQ
,
524 static struct platform_device at91sam9263_spi0_device
= {
528 .dma_mask
= &spi_dmamask
,
529 .coherent_dma_mask
= DMA_BIT_MASK(32),
531 .resource
= spi0_resources
,
532 .num_resources
= ARRAY_SIZE(spi0_resources
),
535 static const unsigned spi0_standard_cs
[4] = { AT91_PIN_PA5
, AT91_PIN_PA3
, AT91_PIN_PA4
, AT91_PIN_PB11
};
537 static struct resource spi1_resources
[] = {
539 .start
= AT91SAM9263_BASE_SPI1
,
540 .end
= AT91SAM9263_BASE_SPI1
+ SZ_16K
- 1,
541 .flags
= IORESOURCE_MEM
,
544 .start
= AT91SAM9263_ID_SPI1
,
545 .end
= AT91SAM9263_ID_SPI1
,
546 .flags
= IORESOURCE_IRQ
,
550 static struct platform_device at91sam9263_spi1_device
= {
554 .dma_mask
= &spi_dmamask
,
555 .coherent_dma_mask
= DMA_BIT_MASK(32),
557 .resource
= spi1_resources
,
558 .num_resources
= ARRAY_SIZE(spi1_resources
),
561 static const unsigned spi1_standard_cs
[4] = { AT91_PIN_PB15
, AT91_PIN_PB16
, AT91_PIN_PB17
, AT91_PIN_PB18
};
563 void __init
at91_add_device_spi(struct spi_board_info
*devices
, int nr_devices
)
566 unsigned long cs_pin
;
567 short enable_spi0
= 0;
568 short enable_spi1
= 0;
570 /* Choose SPI chip-selects */
571 for (i
= 0; i
< nr_devices
; i
++) {
572 if (devices
[i
].controller_data
)
573 cs_pin
= (unsigned long) devices
[i
].controller_data
;
574 else if (devices
[i
].bus_num
== 0)
575 cs_pin
= spi0_standard_cs
[devices
[i
].chip_select
];
577 cs_pin
= spi1_standard_cs
[devices
[i
].chip_select
];
579 if (devices
[i
].bus_num
== 0)
584 /* enable chip-select pin */
585 at91_set_gpio_output(cs_pin
, 1);
587 /* pass chip-select pin to driver */
588 devices
[i
].controller_data
= (void *) cs_pin
;
591 spi_register_board_info(devices
, nr_devices
);
593 /* Configure SPI bus(es) */
595 at91_set_B_periph(AT91_PIN_PA0
, 0); /* SPI0_MISO */
596 at91_set_B_periph(AT91_PIN_PA1
, 0); /* SPI0_MOSI */
597 at91_set_B_periph(AT91_PIN_PA2
, 0); /* SPI0_SPCK */
599 at91_clock_associate("spi0_clk", &at91sam9263_spi0_device
.dev
, "spi_clk");
600 platform_device_register(&at91sam9263_spi0_device
);
603 at91_set_A_periph(AT91_PIN_PB12
, 0); /* SPI1_MISO */
604 at91_set_A_periph(AT91_PIN_PB13
, 0); /* SPI1_MOSI */
605 at91_set_A_periph(AT91_PIN_PB14
, 0); /* SPI1_SPCK */
607 at91_clock_associate("spi1_clk", &at91sam9263_spi1_device
.dev
, "spi_clk");
608 platform_device_register(&at91sam9263_spi1_device
);
612 void __init
at91_add_device_spi(struct spi_board_info
*devices
, int nr_devices
) {}
616 /* --------------------------------------------------------------------
618 * -------------------------------------------------------------------- */
620 #if defined(CONFIG_SND_AT91_AC97) || defined(CONFIG_SND_AT91_AC97_MODULE)
621 static u64 ac97_dmamask
= DMA_BIT_MASK(32);
622 static struct atmel_ac97_data ac97_data
;
624 static struct resource ac97_resources
[] = {
626 .start
= AT91SAM9263_BASE_AC97C
,
627 .end
= AT91SAM9263_BASE_AC97C
+ SZ_16K
- 1,
628 .flags
= IORESOURCE_MEM
,
631 .start
= AT91SAM9263_ID_AC97C
,
632 .end
= AT91SAM9263_ID_AC97C
,
633 .flags
= IORESOURCE_IRQ
,
637 static struct platform_device at91sam9263_ac97_device
= {
641 .dma_mask
= &ac97_dmamask
,
642 .coherent_dma_mask
= DMA_BIT_MASK(32),
643 .platform_data
= &ac97_data
,
645 .resource
= ac97_resources
,
646 .num_resources
= ARRAY_SIZE(ac97_resources
),
649 void __init
at91_add_device_ac97(struct atmel_ac97_data
*data
)
654 at91_set_A_periph(AT91_PIN_PB0
, 0); /* AC97FS */
655 at91_set_A_periph(AT91_PIN_PB1
, 0); /* AC97CK */
656 at91_set_A_periph(AT91_PIN_PB2
, 0); /* AC97TX */
657 at91_set_A_periph(AT91_PIN_PB3
, 0); /* AC97RX */
661 at91_set_gpio_output(data
->reset_pin
, 0);
663 ac97_data
= *ek_data
;
664 platform_device_register(&at91sam9263_ac97_device
);
667 void __init
at91_add_device_ac97(struct atmel_ac97_data
*data
) {}
671 /* --------------------------------------------------------------------
673 * -------------------------------------------------------------------- */
675 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
676 static u64 lcdc_dmamask
= DMA_BIT_MASK(32);
677 static struct atmel_lcdfb_info lcdc_data
;
679 static struct resource lcdc_resources
[] = {
681 .start
= AT91SAM9263_LCDC_BASE
,
682 .end
= AT91SAM9263_LCDC_BASE
+ SZ_4K
- 1,
683 .flags
= IORESOURCE_MEM
,
686 .start
= AT91SAM9263_ID_LCDC
,
687 .end
= AT91SAM9263_ID_LCDC
,
688 .flags
= IORESOURCE_IRQ
,
692 static struct platform_device at91_lcdc_device
= {
693 .name
= "atmel_lcdfb",
696 .dma_mask
= &lcdc_dmamask
,
697 .coherent_dma_mask
= DMA_BIT_MASK(32),
698 .platform_data
= &lcdc_data
,
700 .resource
= lcdc_resources
,
701 .num_resources
= ARRAY_SIZE(lcdc_resources
),
704 void __init
at91_add_device_lcdc(struct atmel_lcdfb_info
*data
)
709 at91_set_A_periph(AT91_PIN_PC1
, 0); /* LCDHSYNC */
710 at91_set_A_periph(AT91_PIN_PC2
, 0); /* LCDDOTCK */
711 at91_set_A_periph(AT91_PIN_PC3
, 0); /* LCDDEN */
712 at91_set_B_periph(AT91_PIN_PB9
, 0); /* LCDCC */
713 at91_set_A_periph(AT91_PIN_PC6
, 0); /* LCDD2 */
714 at91_set_A_periph(AT91_PIN_PC7
, 0); /* LCDD3 */
715 at91_set_A_periph(AT91_PIN_PC8
, 0); /* LCDD4 */
716 at91_set_A_periph(AT91_PIN_PC9
, 0); /* LCDD5 */
717 at91_set_A_periph(AT91_PIN_PC10
, 0); /* LCDD6 */
718 at91_set_A_periph(AT91_PIN_PC11
, 0); /* LCDD7 */
719 at91_set_A_periph(AT91_PIN_PC14
, 0); /* LCDD10 */
720 at91_set_A_periph(AT91_PIN_PC15
, 0); /* LCDD11 */
721 at91_set_A_periph(AT91_PIN_PC16
, 0); /* LCDD12 */
722 at91_set_B_periph(AT91_PIN_PC12
, 0); /* LCDD13 */
723 at91_set_A_periph(AT91_PIN_PC18
, 0); /* LCDD14 */
724 at91_set_A_periph(AT91_PIN_PC19
, 0); /* LCDD15 */
725 at91_set_A_periph(AT91_PIN_PC22
, 0); /* LCDD18 */
726 at91_set_A_periph(AT91_PIN_PC23
, 0); /* LCDD19 */
727 at91_set_A_periph(AT91_PIN_PC24
, 0); /* LCDD20 */
728 at91_set_B_periph(AT91_PIN_PC17
, 0); /* LCDD21 */
729 at91_set_A_periph(AT91_PIN_PC26
, 0); /* LCDD22 */
730 at91_set_A_periph(AT91_PIN_PC27
, 0); /* LCDD23 */
733 platform_device_register(&at91_lcdc_device
);
736 void __init
at91_add_device_lcdc(struct atmel_lcdfb_info
*data
) {}
740 /* --------------------------------------------------------------------
741 * Image Sensor Interface
742 * -------------------------------------------------------------------- */
744 #if defined(CONFIG_VIDEO_AT91_ISI) || defined(CONFIG_VIDEO_AT91_ISI_MODULE)
746 struct resource isi_resources
[] = {
748 .start
= AT91SAM9263_BASE_ISI
,
749 .end
= AT91SAM9263_BASE_ISI
+ SZ_16K
- 1,
750 .flags
= IORESOURCE_MEM
,
753 .start
= AT91SAM9263_ID_ISI
,
754 .end
= AT91SAM9263_ID_ISI
,
755 .flags
= IORESOURCE_IRQ
,
759 static struct platform_device at91sam9263_isi_device
= {
762 .resource
= isi_resources
,
763 .num_resources
= ARRAY_SIZE(isi_resources
),
766 void __init
at91_add_device_isi(void)
768 at91_set_A_periph(AT91_PIN_PE0
, 0); /* ISI_D0 */
769 at91_set_A_periph(AT91_PIN_PE1
, 0); /* ISI_D1 */
770 at91_set_A_periph(AT91_PIN_PE2
, 0); /* ISI_D2 */
771 at91_set_A_periph(AT91_PIN_PE3
, 0); /* ISI_D3 */
772 at91_set_A_periph(AT91_PIN_PE4
, 0); /* ISI_D4 */
773 at91_set_A_periph(AT91_PIN_PE5
, 0); /* ISI_D5 */
774 at91_set_A_periph(AT91_PIN_PE6
, 0); /* ISI_D6 */
775 at91_set_A_periph(AT91_PIN_PE7
, 0); /* ISI_D7 */
776 at91_set_A_periph(AT91_PIN_PE8
, 0); /* ISI_PCK */
777 at91_set_A_periph(AT91_PIN_PE9
, 0); /* ISI_HSYNC */
778 at91_set_A_periph(AT91_PIN_PE10
, 0); /* ISI_VSYNC */
779 at91_set_B_periph(AT91_PIN_PE11
, 0); /* ISI_MCK (PCK3) */
780 at91_set_B_periph(AT91_PIN_PE12
, 0); /* ISI_PD8 */
781 at91_set_B_periph(AT91_PIN_PE13
, 0); /* ISI_PD9 */
782 at91_set_B_periph(AT91_PIN_PE14
, 0); /* ISI_PD10 */
783 at91_set_B_periph(AT91_PIN_PE15
, 0); /* ISI_PD11 */
786 void __init
at91_add_device_isi(void) {}
790 /* --------------------------------------------------------------------
792 * -------------------------------------------------------------------- */
794 static struct resource rtt0_resources
[] = {
796 .start
= AT91_BASE_SYS
+ AT91_RTT0
,
797 .end
= AT91_BASE_SYS
+ AT91_RTT0
+ SZ_16
- 1,
798 .flags
= IORESOURCE_MEM
,
802 static struct platform_device at91sam9263_rtt0_device
= {
805 .resource
= rtt0_resources
,
806 .num_resources
= ARRAY_SIZE(rtt0_resources
),
809 static struct resource rtt1_resources
[] = {
811 .start
= AT91_BASE_SYS
+ AT91_RTT1
,
812 .end
= AT91_BASE_SYS
+ AT91_RTT1
+ SZ_16
- 1,
813 .flags
= IORESOURCE_MEM
,
817 static struct platform_device at91sam9263_rtt1_device
= {
820 .resource
= rtt1_resources
,
821 .num_resources
= ARRAY_SIZE(rtt1_resources
),
824 static void __init
at91_add_device_rtt(void)
826 platform_device_register(&at91sam9263_rtt0_device
);
827 platform_device_register(&at91sam9263_rtt1_device
);
831 /* --------------------------------------------------------------------
833 * -------------------------------------------------------------------- */
835 #if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE)
836 static struct platform_device at91sam9263_wdt_device
= {
842 static void __init
at91_add_device_watchdog(void)
844 platform_device_register(&at91sam9263_wdt_device
);
847 static void __init
at91_add_device_watchdog(void) {}
851 /* --------------------------------------------------------------------
852 * SSC -- Synchronous Serial Controller
853 * -------------------------------------------------------------------- */
855 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
856 static u64 ssc0_dmamask
= DMA_BIT_MASK(32);
858 static struct resource ssc0_resources
[] = {
860 .start
= AT91SAM9263_BASE_SSC0
,
861 .end
= AT91SAM9263_BASE_SSC0
+ SZ_16K
- 1,
862 .flags
= IORESOURCE_MEM
,
865 .start
= AT91SAM9263_ID_SSC0
,
866 .end
= AT91SAM9263_ID_SSC0
,
867 .flags
= IORESOURCE_IRQ
,
871 static struct platform_device at91sam9263_ssc0_device
= {
875 .dma_mask
= &ssc0_dmamask
,
876 .coherent_dma_mask
= DMA_BIT_MASK(32),
878 .resource
= ssc0_resources
,
879 .num_resources
= ARRAY_SIZE(ssc0_resources
),
882 static inline void configure_ssc0_pins(unsigned pins
)
884 if (pins
& ATMEL_SSC_TF
)
885 at91_set_B_periph(AT91_PIN_PB0
, 1);
886 if (pins
& ATMEL_SSC_TK
)
887 at91_set_B_periph(AT91_PIN_PB1
, 1);
888 if (pins
& ATMEL_SSC_TD
)
889 at91_set_B_periph(AT91_PIN_PB2
, 1);
890 if (pins
& ATMEL_SSC_RD
)
891 at91_set_B_periph(AT91_PIN_PB3
, 1);
892 if (pins
& ATMEL_SSC_RK
)
893 at91_set_B_periph(AT91_PIN_PB4
, 1);
894 if (pins
& ATMEL_SSC_RF
)
895 at91_set_B_periph(AT91_PIN_PB5
, 1);
898 static u64 ssc1_dmamask
= DMA_BIT_MASK(32);
900 static struct resource ssc1_resources
[] = {
902 .start
= AT91SAM9263_BASE_SSC1
,
903 .end
= AT91SAM9263_BASE_SSC1
+ SZ_16K
- 1,
904 .flags
= IORESOURCE_MEM
,
907 .start
= AT91SAM9263_ID_SSC1
,
908 .end
= AT91SAM9263_ID_SSC1
,
909 .flags
= IORESOURCE_IRQ
,
913 static struct platform_device at91sam9263_ssc1_device
= {
917 .dma_mask
= &ssc1_dmamask
,
918 .coherent_dma_mask
= DMA_BIT_MASK(32),
920 .resource
= ssc1_resources
,
921 .num_resources
= ARRAY_SIZE(ssc1_resources
),
924 static inline void configure_ssc1_pins(unsigned pins
)
926 if (pins
& ATMEL_SSC_TF
)
927 at91_set_A_periph(AT91_PIN_PB6
, 1);
928 if (pins
& ATMEL_SSC_TK
)
929 at91_set_A_periph(AT91_PIN_PB7
, 1);
930 if (pins
& ATMEL_SSC_TD
)
931 at91_set_A_periph(AT91_PIN_PB8
, 1);
932 if (pins
& ATMEL_SSC_RD
)
933 at91_set_A_periph(AT91_PIN_PB9
, 1);
934 if (pins
& ATMEL_SSC_RK
)
935 at91_set_A_periph(AT91_PIN_PB10
, 1);
936 if (pins
& ATMEL_SSC_RF
)
937 at91_set_A_periph(AT91_PIN_PB11
, 1);
941 * Return the device node so that board init code can use it as the
942 * parent for the device node reflecting how it's used on this board.
944 * SSC controllers are accessed through library code, instead of any
945 * kind of all-singing/all-dancing driver. For example one could be
946 * used by a particular I2S audio codec's driver, while another one
947 * on the same system might be used by a custom data capture driver.
949 void __init
at91_add_device_ssc(unsigned id
, unsigned pins
)
951 struct platform_device
*pdev
;
954 * NOTE: caller is responsible for passing information matching
955 * "pins" to whatever will be using each particular controller.
958 case AT91SAM9263_ID_SSC0
:
959 pdev
= &at91sam9263_ssc0_device
;
960 configure_ssc0_pins(pins
);
961 at91_clock_associate("ssc0_clk", &pdev
->dev
, "pclk");
963 case AT91SAM9263_ID_SSC1
:
964 pdev
= &at91sam9263_ssc1_device
;
965 configure_ssc1_pins(pins
);
966 at91_clock_associate("ssc1_clk", &pdev
->dev
, "pclk");
972 platform_device_register(pdev
);
976 void __init
at91_add_device_ssc(unsigned id
, unsigned pins
) {}
980 /* --------------------------------------------------------------------
982 * -------------------------------------------------------------------- */
984 #if defined(CONFIG_SERIAL_ATMEL)
986 static struct resource dbgu_resources
[] = {
988 .start
= AT91_VA_BASE_SYS
+ AT91_DBGU
,
989 .end
= AT91_VA_BASE_SYS
+ AT91_DBGU
+ SZ_512
- 1,
990 .flags
= IORESOURCE_MEM
,
993 .start
= AT91_ID_SYS
,
995 .flags
= IORESOURCE_IRQ
,
999 static struct atmel_uart_data dbgu_data
= {
1001 .use_dma_rx
= 0, /* DBGU not capable of receive DMA */
1002 .regs
= (void __iomem
*)(AT91_VA_BASE_SYS
+ AT91_DBGU
),
1005 static u64 dbgu_dmamask
= DMA_BIT_MASK(32);
1007 static struct platform_device at91sam9263_dbgu_device
= {
1008 .name
= "atmel_usart",
1011 .dma_mask
= &dbgu_dmamask
,
1012 .coherent_dma_mask
= DMA_BIT_MASK(32),
1013 .platform_data
= &dbgu_data
,
1015 .resource
= dbgu_resources
,
1016 .num_resources
= ARRAY_SIZE(dbgu_resources
),
1019 static inline void configure_dbgu_pins(void)
1021 at91_set_A_periph(AT91_PIN_PC30
, 0); /* DRXD */
1022 at91_set_A_periph(AT91_PIN_PC31
, 1); /* DTXD */
1025 static struct resource uart0_resources
[] = {
1027 .start
= AT91SAM9263_BASE_US0
,
1028 .end
= AT91SAM9263_BASE_US0
+ SZ_16K
- 1,
1029 .flags
= IORESOURCE_MEM
,
1032 .start
= AT91SAM9263_ID_US0
,
1033 .end
= AT91SAM9263_ID_US0
,
1034 .flags
= IORESOURCE_IRQ
,
1038 static struct atmel_uart_data uart0_data
= {
1043 static u64 uart0_dmamask
= DMA_BIT_MASK(32);
1045 static struct platform_device at91sam9263_uart0_device
= {
1046 .name
= "atmel_usart",
1049 .dma_mask
= &uart0_dmamask
,
1050 .coherent_dma_mask
= DMA_BIT_MASK(32),
1051 .platform_data
= &uart0_data
,
1053 .resource
= uart0_resources
,
1054 .num_resources
= ARRAY_SIZE(uart0_resources
),
1057 static inline void configure_usart0_pins(unsigned pins
)
1059 at91_set_A_periph(AT91_PIN_PA26
, 1); /* TXD0 */
1060 at91_set_A_periph(AT91_PIN_PA27
, 0); /* RXD0 */
1062 if (pins
& ATMEL_UART_RTS
)
1063 at91_set_A_periph(AT91_PIN_PA28
, 0); /* RTS0 */
1064 if (pins
& ATMEL_UART_CTS
)
1065 at91_set_A_periph(AT91_PIN_PA29
, 0); /* CTS0 */
1068 static struct resource uart1_resources
[] = {
1070 .start
= AT91SAM9263_BASE_US1
,
1071 .end
= AT91SAM9263_BASE_US1
+ SZ_16K
- 1,
1072 .flags
= IORESOURCE_MEM
,
1075 .start
= AT91SAM9263_ID_US1
,
1076 .end
= AT91SAM9263_ID_US1
,
1077 .flags
= IORESOURCE_IRQ
,
1081 static struct atmel_uart_data uart1_data
= {
1086 static u64 uart1_dmamask
= DMA_BIT_MASK(32);
1088 static struct platform_device at91sam9263_uart1_device
= {
1089 .name
= "atmel_usart",
1092 .dma_mask
= &uart1_dmamask
,
1093 .coherent_dma_mask
= DMA_BIT_MASK(32),
1094 .platform_data
= &uart1_data
,
1096 .resource
= uart1_resources
,
1097 .num_resources
= ARRAY_SIZE(uart1_resources
),
1100 static inline void configure_usart1_pins(unsigned pins
)
1102 at91_set_A_periph(AT91_PIN_PD0
, 1); /* TXD1 */
1103 at91_set_A_periph(AT91_PIN_PD1
, 0); /* RXD1 */
1105 if (pins
& ATMEL_UART_RTS
)
1106 at91_set_B_periph(AT91_PIN_PD7
, 0); /* RTS1 */
1107 if (pins
& ATMEL_UART_CTS
)
1108 at91_set_B_periph(AT91_PIN_PD8
, 0); /* CTS1 */
1111 static struct resource uart2_resources
[] = {
1113 .start
= AT91SAM9263_BASE_US2
,
1114 .end
= AT91SAM9263_BASE_US2
+ SZ_16K
- 1,
1115 .flags
= IORESOURCE_MEM
,
1118 .start
= AT91SAM9263_ID_US2
,
1119 .end
= AT91SAM9263_ID_US2
,
1120 .flags
= IORESOURCE_IRQ
,
1124 static struct atmel_uart_data uart2_data
= {
1129 static u64 uart2_dmamask
= DMA_BIT_MASK(32);
1131 static struct platform_device at91sam9263_uart2_device
= {
1132 .name
= "atmel_usart",
1135 .dma_mask
= &uart2_dmamask
,
1136 .coherent_dma_mask
= DMA_BIT_MASK(32),
1137 .platform_data
= &uart2_data
,
1139 .resource
= uart2_resources
,
1140 .num_resources
= ARRAY_SIZE(uart2_resources
),
1143 static inline void configure_usart2_pins(unsigned pins
)
1145 at91_set_A_periph(AT91_PIN_PD2
, 1); /* TXD2 */
1146 at91_set_A_periph(AT91_PIN_PD3
, 0); /* RXD2 */
1148 if (pins
& ATMEL_UART_RTS
)
1149 at91_set_B_periph(AT91_PIN_PD5
, 0); /* RTS2 */
1150 if (pins
& ATMEL_UART_CTS
)
1151 at91_set_B_periph(AT91_PIN_PD6
, 0); /* CTS2 */
1154 static struct platform_device
*at91_uarts
[ATMEL_MAX_UART
]; /* the UARTs to use */
1155 struct platform_device
*atmel_default_console_device
; /* the serial console device */
1157 void __init __deprecated
at91_init_serial(struct at91_uart_config
*config
)
1161 /* Fill in list of supported UARTs */
1162 for (i
= 0; i
< config
->nr_tty
; i
++) {
1163 switch (config
->tty_map
[i
]) {
1165 configure_usart0_pins(ATMEL_UART_CTS
| ATMEL_UART_RTS
);
1166 at91_uarts
[i
] = &at91sam9263_uart0_device
;
1167 at91_clock_associate("usart0_clk", &at91sam9263_uart0_device
.dev
, "usart");
1170 configure_usart1_pins(ATMEL_UART_CTS
| ATMEL_UART_RTS
);
1171 at91_uarts
[i
] = &at91sam9263_uart1_device
;
1172 at91_clock_associate("usart1_clk", &at91sam9263_uart1_device
.dev
, "usart");
1175 configure_usart2_pins(ATMEL_UART_CTS
| ATMEL_UART_RTS
);
1176 at91_uarts
[i
] = &at91sam9263_uart2_device
;
1177 at91_clock_associate("usart2_clk", &at91sam9263_uart2_device
.dev
, "usart");
1180 configure_dbgu_pins();
1181 at91_uarts
[i
] = &at91sam9263_dbgu_device
;
1182 at91_clock_associate("mck", &at91sam9263_dbgu_device
.dev
, "usart");
1187 at91_uarts
[i
]->id
= i
; /* update ID number to mapped ID */
1190 /* Set serial console device */
1191 if (config
->console_tty
< ATMEL_MAX_UART
)
1192 atmel_default_console_device
= at91_uarts
[config
->console_tty
];
1193 if (!atmel_default_console_device
)
1194 printk(KERN_INFO
"AT91: No default serial console defined.\n");
1197 void __init
at91_register_uart(unsigned id
, unsigned portnr
, unsigned pins
)
1199 struct platform_device
*pdev
;
1203 pdev
= &at91sam9263_dbgu_device
;
1204 configure_dbgu_pins();
1205 at91_clock_associate("mck", &pdev
->dev
, "usart");
1207 case AT91SAM9263_ID_US0
:
1208 pdev
= &at91sam9263_uart0_device
;
1209 configure_usart0_pins(pins
);
1210 at91_clock_associate("usart0_clk", &pdev
->dev
, "usart");
1212 case AT91SAM9263_ID_US1
:
1213 pdev
= &at91sam9263_uart1_device
;
1214 configure_usart1_pins(pins
);
1215 at91_clock_associate("usart1_clk", &pdev
->dev
, "usart");
1217 case AT91SAM9263_ID_US2
:
1218 pdev
= &at91sam9263_uart2_device
;
1219 configure_usart2_pins(pins
);
1220 at91_clock_associate("usart2_clk", &pdev
->dev
, "usart");
1225 pdev
->id
= portnr
; /* update to mapped ID */
1227 if (portnr
< ATMEL_MAX_UART
)
1228 at91_uarts
[portnr
] = pdev
;
1231 void __init
at91_set_serial_console(unsigned portnr
)
1233 if (portnr
< ATMEL_MAX_UART
)
1234 atmel_default_console_device
= at91_uarts
[portnr
];
1235 if (!atmel_default_console_device
)
1236 printk(KERN_INFO
"AT91: No default serial console defined.\n");
1239 void __init
at91_add_device_serial(void)
1243 for (i
= 0; i
< ATMEL_MAX_UART
; i
++) {
1245 platform_device_register(at91_uarts
[i
]);
1249 void __init
at91_init_serial(struct at91_uart_config
*config
) {}
1250 void __init
at91_register_uart(unsigned id
, unsigned portnr
, unsigned pins
) {}
1251 void __init
at91_set_serial_console(unsigned portnr
) {}
1252 void __init
at91_add_device_serial(void) {}
1256 /* -------------------------------------------------------------------- */
1258 * These devices are always present and don't need any board-specific
1261 static int __init
at91_add_standard_devices(void)
1263 at91_add_device_rtt();
1264 at91_add_device_watchdog();
1268 arch_initcall(at91_add_standard_devices
);