arch/arm/mach-highbank/highbank.c

   1 /*
   2  * Copyright 2010-2011 Calxeda, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program.  If not, see <http://www.gnu.org/licenses/>.
  15  */
  16 #include <linux/clk.h>
  17 #include <linux/clkdev.h>
  18 #include <linux/clocksource.h>
  19 #include <linux/dma-mapping.h>
  20 #include <linux/io.h>
  21 #include <linux/irqchip.h>
  22 #include <linux/of.h>
  23 #include <linux/of_irq.h>
  24 #include <linux/of_platform.h>
  25 #include <linux/of_address.h>
  26 #include <linux/amba/bus.h>
  27 #include <linux/platform_device.h>
  28
  29 #include <asm/psci.h>
  30 #include <asm/hardware/cache-l2x0.h>
  31 #include <asm/mach/arch.h>
  32 #include <asm/mach/map.h>
  33
  34 #include "core.h"
  35 #include "sysregs.h"
  36
  37 void __iomem *sregs_base;
  38 void __iomem *scu_base_addr;
  39
  40 static void __init highbank_scu_map_io(void)
  41 {
  42         unsigned long base;
  43
  44         /* Get SCU base */
  45         asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
  46
  47         scu_base_addr = ioremap(base, SZ_4K);
  48 }
  49
  50
  51 static void highbank_l2x0_disable(void)
  52 {
  53         /* Disable PL310 L2 Cache controller */
  54         highbank_smc1(0x102, 0x0);
  55 }
  56
  57 static void __init highbank_init_irq(void)
  58 {
  59         irqchip_init();
  60
  61         if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
  62                 highbank_scu_map_io();
  63
  64         /* Enable PL310 L2 Cache controller */
  65         if (IS_ENABLED(CONFIG_CACHE_L2X0) &&
  66             of_find_compatible_node(NULL, NULL, "arm,pl310-cache")) {
  67                 highbank_smc1(0x102, 0x1);
  68                 l2x0_of_init(0, ~0UL);
  69                 outer_cache.disable = highbank_l2x0_disable;
  70         }
  71 }
  72
  73 static void highbank_power_off(void)
  74 {
  75         highbank_set_pwr_shutdown();
  76
  77         while (1)
  78                 cpu_do_idle();
  79 }
  80
  81 static int highbank_platform_notifier(struct notifier_block *nb,
  82                                   unsigned long event, void *__dev)
  83 {
  84         struct resource *res;
  85         int reg = -1;
  86         u32 val;
  87         struct device *dev = __dev;
  88
  89         if (event != BUS_NOTIFY_ADD_DEVICE)
  90                 return NOTIFY_DONE;
  91
  92         if (of_device_is_compatible(dev->of_node, "calxeda,hb-ahci"))
  93                 reg = 0xc;
  94         else if (of_device_is_compatible(dev->of_node, "calxeda,hb-sdhci"))
  95                 reg = 0x18;
  96         else if (of_device_is_compatible(dev->of_node, "arm,pl330"))
  97                 reg = 0x20;
  98         else if (of_device_is_compatible(dev->of_node, "calxeda,hb-xgmac")) {
  99                 res = platform_get_resource(to_platform_device(dev),
 100                                             IORESOURCE_MEM, 0);
 101                 if (res) {
 102                         if (res->start == 0xfff50000)
 103                                 reg = 0;
 104                         else if (res->start == 0xfff51000)
 105                                 reg = 4;
 106                 }
 107         }
 108
 109         if (reg < 0)
 110                 return NOTIFY_DONE;
 111
 112         if (of_property_read_bool(dev->of_node, "dma-coherent")) {
 113                 val = readl(sregs_base + reg);
 114                 writel(val | 0xff01, sregs_base + reg);
 115                 set_dma_ops(dev, &arm_coherent_dma_ops);
 116         }
 117
 118         return NOTIFY_OK;
 119 }
 120
 121 static struct notifier_block highbank_amba_nb = {
 122         .notifier_call = highbank_platform_notifier,
 123 };
 124
 125 static struct notifier_block highbank_platform_nb = {
 126         .notifier_call = highbank_platform_notifier,
 127 };
 128
 129 static struct platform_device highbank_cpuidle_device = {
 130         .name = "cpuidle-calxeda",
 131 };
 132
 133 static void __init highbank_init(void)
 134 {
 135         struct device_node *np;
 136
 137         /* Map system registers */
 138         np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs");
 139         sregs_base = of_iomap(np, 0);
 140         WARN_ON(!sregs_base);
 141
 142         pm_power_off = highbank_power_off;
 143         highbank_pm_init();
 144
 145         bus_register_notifier(&platform_bus_type, &highbank_platform_nb);
 146         bus_register_notifier(&amba_bustype, &highbank_amba_nb);
 147
 148         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 149
 150         if (psci_ops.cpu_suspend)
 151                 platform_device_register(&highbank_cpuidle_device);
 152 }
 153
 154 static const char *highbank_match[] __initconst = {
 155         "calxeda,highbank",
 156         "calxeda,ecx-2000",
 157         NULL,
 158 };
 159
 160 DT_MACHINE_START(HIGHBANK, "Highbank")
 161 #if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
 162         .dma_zone_size  = (4ULL * SZ_1G),
 163 #endif
 164         .init_irq       = highbank_init_irq,
 165         .init_machine   = highbank_init,
 166         .dt_compat      = highbank_match,
 167         .restart        = highbank_restart,
 168 MACHINE_END