arch/arm/mach-imx/clk.h

   1 #ifndef __MACH_IMX_CLK_H
   2 #define __MACH_IMX_CLK_H
   3
   4 #include <linux/spinlock.h>
   5 #include <linux/clk-provider.h>
   6
   7 extern spinlock_t imx_ccm_lock;
   8
   9 /*
  10  * This is a stop-gap solution for clock drivers like imx1/imx21 which call
  11  * mxc_timer_init() to initialize timer for non-DT boot.  It can be removed
  12  * when these legacy non-DT support is converted or dropped.
  13  */
  14 void mxc_timer_init(unsigned long pbase, int irq);
  15
  16 void imx_check_clocks(struct clk *clks[], unsigned int count);
  17
  18 extern void imx_cscmr1_fixup(u32 *val);
  19
  20 enum imx_pllv1_type {
  21         IMX_PLLV1_IMX1,
  22         IMX_PLLV1_IMX21,
  23         IMX_PLLV1_IMX25,
  24         IMX_PLLV1_IMX27,
  25         IMX_PLLV1_IMX31,
  26         IMX_PLLV1_IMX35,
  27 };
  28
  29 struct clk *imx_clk_pllv1(enum imx_pllv1_type type, const char *name,
  30                 const char *parent, void __iomem *base);
  31
  32 struct clk *imx_clk_pllv2(const char *name, const char *parent,
  33                 void __iomem *base);
  34
  35 enum imx_pllv3_type {
  36         IMX_PLLV3_GENERIC,
  37         IMX_PLLV3_SYS,
  38         IMX_PLLV3_USB,
  39         IMX_PLLV3_USB_VF610,
  40         IMX_PLLV3_AV,
  41         IMX_PLLV3_ENET,
  42 };
  43
  44 struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
  45                 const char *parent_name, void __iomem *base, u32 div_mask);
  46
  47 struct clk *clk_register_gate2(struct device *dev, const char *name,
  48                 const char *parent_name, unsigned long flags,
  49                 void __iomem *reg, u8 bit_idx,
  50                 u8 clk_gate_flags, spinlock_t *lock,
  51                 unsigned int *share_count);
  52
  53 struct clk * imx_obtain_fixed_clock(
  54                         const char *name, unsigned long rate);
  55
  56 struct clk *imx_clk_gate_exclusive(const char *name, const char *parent,
  57          void __iomem *reg, u8 shift, u32 exclusive_mask);
  58
  59 static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
  60                 void __iomem *reg, u8 shift)
  61 {
  62         return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
  63                         shift, 0, &imx_ccm_lock, NULL);
  64 }
  65
  66 static inline struct clk *imx_clk_gate2_shared(const char *name,
  67                 const char *parent, void __iomem *reg, u8 shift,
  68                 unsigned int *share_count)
  69 {
  70         return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
  71                         shift, 0, &imx_ccm_lock, share_count);
  72 }
  73
  74 struct clk *imx_clk_pfd(const char *name, const char *parent_name,
  75                 void __iomem *reg, u8 idx);
  76
  77 struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
  78                                  void __iomem *reg, u8 shift, u8 width,
  79                                  void __iomem *busy_reg, u8 busy_shift);
  80
  81 struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
  82                              u8 width, void __iomem *busy_reg, u8 busy_shift,
  83                              const char **parent_names, int num_parents);
  84
  85 struct clk *imx_clk_fixup_divider(const char *name, const char *parent,
  86                                   void __iomem *reg, u8 shift, u8 width,
  87                                   void (*fixup)(u32 *val));
  88
  89 struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,
  90                               u8 shift, u8 width, const char **parents,
  91                               int num_parents, void (*fixup)(u32 *val));
  92
  93 static inline struct clk *imx_clk_fixed(const char *name, int rate)
  94 {
  95         return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
  96 }
  97
  98 static inline struct clk *imx_clk_divider(const char *name, const char *parent,
  99                 void __iomem *reg, u8 shift, u8 width)
 100 {
 101         return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
 102                         reg, shift, width, 0, &imx_ccm_lock);
 103 }
 104
 105 static inline struct clk *imx_clk_divider_flags(const char *name,
 106                 const char *parent, void __iomem *reg, u8 shift, u8 width,
 107                 unsigned long flags)
 108 {
 109         return clk_register_divider(NULL, name, parent, flags,
 110                         reg, shift, width, 0, &imx_ccm_lock);
 111 }
 112
 113 static inline struct clk *imx_clk_gate(const char *name, const char *parent,
 114                 void __iomem *reg, u8 shift)
 115 {
 116         return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
 117                         shift, 0, &imx_ccm_lock);
 118 }
 119
 120 static inline struct clk *imx_clk_gate_dis(const char *name, const char *parent,
 121                 void __iomem *reg, u8 shift)
 122 {
 123         return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
 124                         shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock);
 125 }
 126
 127 static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
 128                 u8 shift, u8 width, const char **parents, int num_parents)
 129 {
 130         return clk_register_mux(NULL, name, parents, num_parents,
 131                         CLK_SET_RATE_NO_REPARENT, reg, shift,
 132                         width, 0, &imx_ccm_lock);
 133 }
 134
 135 static inline struct clk *imx_clk_mux_flags(const char *name,
 136                 void __iomem *reg, u8 shift, u8 width, const char **parents,
 137                 int num_parents, unsigned long flags)
 138 {
 139         return clk_register_mux(NULL, name, parents, num_parents,
 140                         flags | CLK_SET_RATE_NO_REPARENT, reg, shift, width, 0,
 141                         &imx_ccm_lock);
 142 }
 143
 144 static inline struct clk *imx_clk_fixed_factor(const char *name,
 145                 const char *parent, unsigned int mult, unsigned int div)
 146 {
 147         return clk_register_fixed_factor(NULL, name, parent,
 148                         CLK_SET_RATE_PARENT, mult, div);
 149 }
 150
 151 struct clk *imx_clk_cpu(const char *name, const char *parent_name,
 152                 struct clk *div, struct clk *mux, struct clk *pll,
 153                 struct clk *step);
 154
 155 #endif