arch/arm/mach-imx/common.h

   1 /*
   2  * Copyright 2004-2013 Freescale Semiconductor, Inc. All Rights Reserved.
   3  */
   4
   5 /*
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #ifndef __ASM_ARCH_MXC_COMMON_H__
  12 #define __ASM_ARCH_MXC_COMMON_H__
  13
  14 #include <linux/reboot.h>
  15
  16 struct platform_device;
  17 struct pt_regs;
  18 struct clk;
  19 enum mxc_cpu_pwr_mode;
  20
  21 void mx1_map_io(void);
  22 void mx21_map_io(void);
  23 void mx25_map_io(void);
  24 void mx27_map_io(void);
  25 void mx31_map_io(void);
  26 void mx35_map_io(void);
  27 void mx51_map_io(void);
  28 void mx53_map_io(void);
  29 void imx1_init_early(void);
  30 void imx21_init_early(void);
  31 void imx25_init_early(void);
  32 void imx27_init_early(void);
  33 void imx31_init_early(void);
  34 void imx35_init_early(void);
  35 void imx51_init_early(void);
  36 void imx53_init_early(void);
  37 void mxc_init_irq(void __iomem *);
  38 void tzic_init_irq(void __iomem *);
  39 void mx1_init_irq(void);
  40 void mx21_init_irq(void);
  41 void mx25_init_irq(void);
  42 void mx27_init_irq(void);
  43 void mx31_init_irq(void);
  44 void mx35_init_irq(void);
  45 void mx51_init_irq(void);
  46 void mx53_init_irq(void);
  47 void imx1_soc_init(void);
  48 void imx21_soc_init(void);
  49 void imx25_soc_init(void);
  50 void imx27_soc_init(void);
  51 void imx31_soc_init(void);
  52 void imx35_soc_init(void);
  53 void imx51_soc_init(void);
  54 void imx51_init_late(void);
  55 void imx53_init_late(void);
  56 void epit_timer_init(void __iomem *base, int irq);
  57 void mxc_timer_init(void __iomem *, int);
  58 int mx1_clocks_init(unsigned long fref);
  59 int mx21_clocks_init(unsigned long lref, unsigned long fref);
  60 int mx25_clocks_init(void);
  61 int mx27_clocks_init(unsigned long fref);
  62 int mx31_clocks_init(unsigned long fref);
  63 int mx35_clocks_init(void);
  64 int mx51_clocks_init(unsigned long ckil, unsigned long osc,
  65                         unsigned long ckih1, unsigned long ckih2);
  66 int mx25_clocks_init_dt(void);
  67 int mx27_clocks_init_dt(void);
  68 int mx31_clocks_init_dt(void);
  69 struct platform_device *mxc_register_gpio(char *name, int id,
  70         resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
  71 void mxc_set_cpu_type(unsigned int type);
  72 void mxc_restart(enum reboot_mode, const char *);
  73 void mxc_arch_reset_init(void __iomem *);
  74 void mxc_arch_reset_init_dt(void);
  75 int mx53_revision(void);
  76 void imx_set_aips(void __iomem *);
  77 int mxc_device_init(void);
  78 void imx_set_soc_revision(unsigned int rev);
  79 unsigned int imx_get_soc_revision(void);
  80 void imx_init_revision_from_anatop(void);
  81 struct device *imx_soc_device_init(void);
  82
  83 enum mxc_cpu_pwr_mode {
  84         WAIT_CLOCKED,           /* wfi only */
  85         WAIT_UNCLOCKED,         /* WAIT */
  86         WAIT_UNCLOCKED_POWER_OFF,       /* WAIT + SRPG */
  87         STOP_POWER_ON,          /* just STOP */
  88         STOP_POWER_OFF,         /* STOP + SRPG */
  89 };
  90
  91 enum mx3_cpu_pwr_mode {
  92         MX3_RUN,
  93         MX3_WAIT,
  94         MX3_DOZE,
  95         MX3_SLEEP,
  96 };
  97
  98 void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode);
  99 void imx_print_silicon_rev(const char *cpu, int srev);
 100
 101 void avic_handle_irq(struct pt_regs *);
 102 void tzic_handle_irq(struct pt_regs *);
 103
 104 #define imx1_handle_irq avic_handle_irq
 105 #define imx21_handle_irq avic_handle_irq
 106 #define imx25_handle_irq avic_handle_irq
 107 #define imx27_handle_irq avic_handle_irq
 108 #define imx31_handle_irq avic_handle_irq
 109 #define imx35_handle_irq avic_handle_irq
 110 #define imx51_handle_irq tzic_handle_irq
 111 #define imx53_handle_irq tzic_handle_irq
 112
 113 void imx_enable_cpu(int cpu, bool enable);
 114 void imx_set_cpu_jump(int cpu, void *jump_addr);
 115 u32 imx_get_cpu_arg(int cpu);
 116 void imx_set_cpu_arg(int cpu, u32 arg);
 117 void v7_cpu_resume(void);
 118 #ifdef CONFIG_SMP
 119 void v7_secondary_startup(void);
 120 void imx_scu_map_io(void);
 121 void imx_smp_prepare(void);
 122 void imx_scu_standby_enable(void);
 123 #else
 124 static inline void imx_scu_map_io(void) {}
 125 static inline void imx_smp_prepare(void) {}
 126 static inline void imx_scu_standby_enable(void) {}
 127 #endif
 128 void imx_src_init(void);
 129 #ifdef CONFIG_HAVE_IMX_SRC
 130 void imx_src_prepare_restart(void);
 131 #else
 132 static inline void imx_src_prepare_restart(void) {}
 133 #endif
 134 void imx_gpc_init(void);
 135 void imx_gpc_pre_suspend(void);
 136 void imx_gpc_post_resume(void);
 137 void imx_gpc_mask_all(void);
 138 void imx_gpc_restore_all(void);
 139 void imx_anatop_init(void);
 140 void imx_anatop_pre_suspend(void);
 141 void imx_anatop_post_resume(void);
 142 int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
 143 void imx6q_set_chicken_bit(void);
 144
 145 void imx_cpu_die(unsigned int cpu);
 146 int imx_cpu_kill(unsigned int cpu);
 147
 148 #ifdef CONFIG_PM
 149 void imx6q_pm_init(void);
 150 void imx5_pm_init(void);
 151 #else
 152 static inline void imx6q_pm_init(void) {}
 153 static inline void imx5_pm_init(void) {}
 154 #endif
 155
 156 #ifdef CONFIG_NEON
 157 int mx51_neon_fixup(void);
 158 #else
 159 static inline int mx51_neon_fixup(void) { return 0; }
 160 #endif
 161
 162 #ifdef CONFIG_CACHE_L2X0
 163 void imx_init_l2cache(void);
 164 #else
 165 static inline void imx_init_l2cache(void) {}
 166 #endif
 167
 168 extern struct smp_operations imx_smp_ops;
 169
 170 #endif