Merge branch 'spear/pinctrl' into spear/clock
[deliverable/linux.git] / arch / arm / mach-imx / mach-mx31lite.c
1 /*
2 * Copyright (C) 2000 Deep Blue Solutions Ltd
3 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
4 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
5 * Copyright (C) 2009 Daniel Mack <daniel@caiaq.de>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
18 #include <linux/types.h>
19 #include <linux/init.h>
20 #include <linux/kernel.h>
21 #include <linux/memory.h>
22 #include <linux/platform_device.h>
23 #include <linux/gpio.h>
24 #include <linux/moduleparam.h>
25 #include <linux/smsc911x.h>
26 #include <linux/mfd/mc13783.h>
27 #include <linux/spi/spi.h>
28 #include <linux/usb/otg.h>
29 #include <linux/usb/ulpi.h>
30 #include <linux/mtd/physmap.h>
31 #include <linux/delay.h>
32 #include <linux/regulator/machine.h>
33 #include <linux/regulator/fixed.h>
34
35 #include <asm/mach-types.h>
36 #include <asm/mach/arch.h>
37 #include <asm/mach/time.h>
38 #include <asm/mach/map.h>
39 #include <asm/page.h>
40 #include <asm/setup.h>
41
42 #include <mach/hardware.h>
43 #include <mach/common.h>
44 #include <mach/board-mx31lite.h>
45 #include <mach/iomux-mx3.h>
46 #include <mach/irqs.h>
47 #include <mach/ulpi.h>
48
49 #include "devices-imx31.h"
50
51 /*
52 * This file contains the module-specific initialization routines.
53 */
54
55 static unsigned int mx31lite_pins[] = {
56 /* LAN9117 IRQ pin */
57 IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO),
58 /* SPI 1 */
59 MX31_PIN_CSPI2_SCLK__SCLK,
60 MX31_PIN_CSPI2_MOSI__MOSI,
61 MX31_PIN_CSPI2_MISO__MISO,
62 MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
63 MX31_PIN_CSPI2_SS0__SS0,
64 MX31_PIN_CSPI2_SS1__SS1,
65 MX31_PIN_CSPI2_SS2__SS2,
66 };
67
68 static const struct mxc_nand_platform_data
69 mx31lite_nand_board_info __initconst = {
70 .width = 1,
71 .hw_ecc = 1,
72 };
73
74 static struct smsc911x_platform_config smsc911x_config = {
75 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
76 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
77 .flags = SMSC911X_USE_16BIT,
78 };
79
80 static struct resource smsc911x_resources[] = {
81 {
82 .start = MX31_CS4_BASE_ADDR,
83 .end = MX31_CS4_BASE_ADDR + 0x100,
84 .flags = IORESOURCE_MEM,
85 }, {
86 .start = IOMUX_TO_IRQ(MX31_PIN_SFS6),
87 .end = IOMUX_TO_IRQ(MX31_PIN_SFS6),
88 .flags = IORESOURCE_IRQ,
89 },
90 };
91
92 static struct platform_device smsc911x_device = {
93 .name = "smsc911x",
94 .id = -1,
95 .num_resources = ARRAY_SIZE(smsc911x_resources),
96 .resource = smsc911x_resources,
97 .dev = {
98 .platform_data = &smsc911x_config,
99 },
100 };
101
102 /*
103 * SPI
104 *
105 * The MC13783 is the only hard-wired SPI device on the module.
106 */
107
108 static int spi_internal_chipselect[] = {
109 MXC_SPI_CS(0),
110 };
111
112 static const struct spi_imx_master spi1_pdata __initconst = {
113 .chipselect = spi_internal_chipselect,
114 .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
115 };
116
117 static struct mc13xxx_platform_data mc13783_pdata __initdata = {
118 .flags = MC13XXX_USE_RTC,
119 };
120
121 static struct spi_board_info mc13783_spi_dev __initdata = {
122 .modalias = "mc13783",
123 .max_speed_hz = 1000000,
124 .bus_num = 1,
125 .chip_select = 0,
126 .platform_data = &mc13783_pdata,
127 .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
128 };
129
130 /*
131 * USB
132 */
133
134 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
135 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
136
137 static int usbh2_init(struct platform_device *pdev)
138 {
139 int pins[] = {
140 MX31_PIN_USBH2_DATA0__USBH2_DATA0,
141 MX31_PIN_USBH2_DATA1__USBH2_DATA1,
142 MX31_PIN_USBH2_CLK__USBH2_CLK,
143 MX31_PIN_USBH2_DIR__USBH2_DIR,
144 MX31_PIN_USBH2_NXT__USBH2_NXT,
145 MX31_PIN_USBH2_STP__USBH2_STP,
146 };
147
148 mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");
149
150 mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
151 mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
152 mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
153 mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
154 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
155 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
156 mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
157 mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
158 mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
159 mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
160 mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
161 mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
162
163 mxc_iomux_set_gpr(MUX_PGP_UH2, true);
164
165 /* chip select */
166 mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),
167 "USBH2_CS");
168 gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");
169 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);
170
171 mdelay(10);
172
173 return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
174 }
175
176 static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
177 .init = usbh2_init,
178 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
179 };
180
181 /*
182 * NOR flash
183 */
184
185 static struct physmap_flash_data nor_flash_data = {
186 .width = 2,
187 };
188
189 static struct resource nor_flash_resource = {
190 .start = 0xa0000000,
191 .end = 0xa1ffffff,
192 .flags = IORESOURCE_MEM,
193 };
194
195 static struct platform_device physmap_flash_device = {
196 .name = "physmap-flash",
197 .id = 0,
198 .dev = {
199 .platform_data = &nor_flash_data,
200 },
201 .resource = &nor_flash_resource,
202 .num_resources = 1,
203 };
204
205
206
207 /*
208 * This structure defines the MX31 memory map.
209 */
210 static struct map_desc mx31lite_io_desc[] __initdata = {
211 {
212 .virtual = MX31_CS4_BASE_ADDR_VIRT,
213 .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
214 .length = MX31_CS4_SIZE,
215 .type = MT_DEVICE
216 }
217 };
218
219 /*
220 * Set up static virtual mappings.
221 */
222 void __init mx31lite_map_io(void)
223 {
224 mx31_map_io();
225 iotable_init(mx31lite_io_desc, ARRAY_SIZE(mx31lite_io_desc));
226 }
227
228 static int mx31lite_baseboard;
229 core_param(mx31lite_baseboard, mx31lite_baseboard, int, 0444);
230
231 static struct regulator_consumer_supply dummy_supplies[] = {
232 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
233 REGULATOR_SUPPLY("vddvario", "smsc911x"),
234 };
235
236 static void __init mx31lite_init(void)
237 {
238 int ret;
239
240 imx31_soc_init();
241
242 switch (mx31lite_baseboard) {
243 case MX31LITE_NOBOARD:
244 break;
245 case MX31LITE_DB:
246 mx31lite_db_init();
247 break;
248 default:
249 printk(KERN_ERR "Illegal mx31lite_baseboard type %d\n",
250 mx31lite_baseboard);
251 }
252
253 mxc_iomux_setup_multiple_pins(mx31lite_pins, ARRAY_SIZE(mx31lite_pins),
254 "mx31lite");
255
256 /* NOR and NAND flash */
257 platform_device_register(&physmap_flash_device);
258 imx31_add_mxc_nand(&mx31lite_nand_board_info);
259
260 imx31_add_spi_imx1(&spi1_pdata);
261 spi_register_board_info(&mc13783_spi_dev, 1);
262
263 /* USB */
264 usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
265 ULPI_OTG_DRVVBUS_EXT);
266 if (usbh2_pdata.otg)
267 imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
268
269 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
270
271 /* SMSC9117 IRQ pin */
272 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq");
273 if (ret)
274 pr_warning("could not get LAN irq gpio\n");
275 else {
276 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_SFS6));
277 platform_device_register(&smsc911x_device);
278 }
279 }
280
281 static void __init mx31lite_timer_init(void)
282 {
283 mx31_clocks_init(26000000);
284 }
285
286 struct sys_timer mx31lite_timer = {
287 .init = mx31lite_timer_init,
288 };
289
290 MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
291 /* Maintainer: Freescale Semiconductor, Inc. */
292 .atag_offset = 0x100,
293 .map_io = mx31lite_map_io,
294 .init_early = imx31_init_early,
295 .init_irq = mx31_init_irq,
296 .handle_irq = imx31_handle_irq,
297 .timer = &mx31lite_timer,
298 .init_machine = mx31lite_init,
299 .restart = mxc_restart,
300 MACHINE_END
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