Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile
[deliverable/linux.git] / arch / arm / mach-imx / mach-mx35_3ds.c
1 /*
2 * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright (C) 2009 Marc Kleine-Budde, Pengutronix
4 *
5 * Author: Fabio Estevam <fabio.estevam@freescale.com>
6 *
7 * Copyright (C) 2011 Meprolight, Ltd.
8 * Alex Gershgorin <alexg@meprolight.com>
9 *
10 * Modified from i.MX31 3-Stack Development System
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 */
22
23 /*
24 * This machine is known as:
25 * - i.MX35 3-Stack Development System
26 * - i.MX35 Platform Development Kit (i.MX35 PDK)
27 */
28
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/platform_device.h>
32 #include <linux/memory.h>
33 #include <linux/gpio.h>
34 #include <linux/usb/otg.h>
35
36 #include <linux/mtd/physmap.h>
37 #include <linux/mfd/mc13892.h>
38 #include <linux/regulator/machine.h>
39
40 #include <asm/mach-types.h>
41 #include <asm/mach/arch.h>
42 #include <asm/mach/time.h>
43 #include <asm/mach/map.h>
44 #include <asm/memblock.h>
45
46 #include <video/platform_lcd.h>
47
48 #include <media/soc_camera.h>
49
50 #include "3ds_debugboard.h"
51 #include "common.h"
52 #include "devices-imx35.h"
53 #include "hardware.h"
54 #include "iomux-mx35.h"
55
56 #define GPIO_MC9S08DZ60_GPS_ENABLE 0
57 #define GPIO_MC9S08DZ60_HDD_ENABLE 4
58 #define GPIO_MC9S08DZ60_WIFI_ENABLE 5
59 #define GPIO_MC9S08DZ60_LCD_ENABLE 6
60 #define GPIO_MC9S08DZ60_SPEAKER_ENABLE 8
61
62 static const struct fb_videomode fb_modedb[] = {
63 {
64 /* 800x480 @ 55 Hz */
65 .name = "Ceramate-CLAA070VC01",
66 .refresh = 55,
67 .xres = 800,
68 .yres = 480,
69 .pixclock = 40000,
70 .left_margin = 40,
71 .right_margin = 40,
72 .upper_margin = 5,
73 .lower_margin = 5,
74 .hsync_len = 20,
75 .vsync_len = 10,
76 .sync = FB_SYNC_OE_ACT_HIGH,
77 .vmode = FB_VMODE_NONINTERLACED,
78 .flag = 0,
79 },
80 };
81
82 static struct mx3fb_platform_data mx3fb_pdata __initdata = {
83 .name = "Ceramate-CLAA070VC01",
84 .mode = fb_modedb,
85 .num_modes = ARRAY_SIZE(fb_modedb),
86 };
87
88 static struct i2c_board_info __initdata i2c_devices_3ds[] = {
89 {
90 I2C_BOARD_INFO("mc9s08dz60", 0x69),
91 },
92 };
93
94 static int lcd_power_gpio = -ENXIO;
95
96 static int mc9s08dz60_gpiochip_match(struct gpio_chip *chip, void *data)
97 {
98 return !strcmp(chip->label, data);
99 }
100
101 static void mx35_3ds_lcd_set_power(
102 struct plat_lcd_data *pd, unsigned int power)
103 {
104 struct gpio_chip *chip;
105
106 if (!gpio_is_valid(lcd_power_gpio)) {
107 chip = gpiochip_find(
108 "mc9s08dz60", mc9s08dz60_gpiochip_match);
109 if (chip) {
110 lcd_power_gpio =
111 chip->base + GPIO_MC9S08DZ60_LCD_ENABLE;
112 if (gpio_request(lcd_power_gpio, "lcd_power") < 0) {
113 pr_err("error: gpio already requested!\n");
114 lcd_power_gpio = -ENXIO;
115 }
116 } else {
117 pr_err("error: didn't find mc9s08dz60 gpio chip\n");
118 }
119 }
120
121 if (gpio_is_valid(lcd_power_gpio))
122 gpio_set_value_cansleep(lcd_power_gpio, power);
123 }
124
125 static struct plat_lcd_data mx35_3ds_lcd_data = {
126 .set_power = mx35_3ds_lcd_set_power,
127 };
128
129 static struct platform_device mx35_3ds_lcd = {
130 .name = "platform-lcd",
131 .dev.platform_data = &mx35_3ds_lcd_data,
132 };
133
134 static const struct imxuart_platform_data uart_pdata __initconst = {
135 .flags = IMXUART_HAVE_RTSCTS,
136 };
137
138 static struct physmap_flash_data mx35pdk_flash_data = {
139 .width = 2,
140 };
141
142 static struct resource mx35pdk_flash_resource = {
143 .start = MX35_CS0_BASE_ADDR,
144 .end = MX35_CS0_BASE_ADDR + SZ_64M - 1,
145 .flags = IORESOURCE_MEM,
146 };
147
148 static struct platform_device mx35pdk_flash = {
149 .name = "physmap-flash",
150 .id = 0,
151 .dev = {
152 .platform_data = &mx35pdk_flash_data,
153 },
154 .resource = &mx35pdk_flash_resource,
155 .num_resources = 1,
156 };
157
158 static const struct mxc_nand_platform_data mx35pdk_nand_board_info __initconst = {
159 .width = 1,
160 .hw_ecc = 1,
161 .flash_bbt = 1,
162 };
163
164 static struct platform_device *devices[] __initdata = {
165 &mx35pdk_flash,
166 };
167
168 static iomux_v3_cfg_t mx35pdk_pads[] = {
169 /* UART1 */
170 MX35_PAD_CTS1__UART1_CTS,
171 MX35_PAD_RTS1__UART1_RTS,
172 MX35_PAD_TXD1__UART1_TXD_MUX,
173 MX35_PAD_RXD1__UART1_RXD_MUX,
174 /* FEC */
175 MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
176 MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
177 MX35_PAD_FEC_RX_DV__FEC_RX_DV,
178 MX35_PAD_FEC_COL__FEC_COL,
179 MX35_PAD_FEC_RDATA0__FEC_RDATA_0,
180 MX35_PAD_FEC_TDATA0__FEC_TDATA_0,
181 MX35_PAD_FEC_TX_EN__FEC_TX_EN,
182 MX35_PAD_FEC_MDC__FEC_MDC,
183 MX35_PAD_FEC_MDIO__FEC_MDIO,
184 MX35_PAD_FEC_TX_ERR__FEC_TX_ERR,
185 MX35_PAD_FEC_RX_ERR__FEC_RX_ERR,
186 MX35_PAD_FEC_CRS__FEC_CRS,
187 MX35_PAD_FEC_RDATA1__FEC_RDATA_1,
188 MX35_PAD_FEC_TDATA1__FEC_TDATA_1,
189 MX35_PAD_FEC_RDATA2__FEC_RDATA_2,
190 MX35_PAD_FEC_TDATA2__FEC_TDATA_2,
191 MX35_PAD_FEC_RDATA3__FEC_RDATA_3,
192 MX35_PAD_FEC_TDATA3__FEC_TDATA_3,
193 /* USBOTG */
194 MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR,
195 MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC,
196 /* USBH1 */
197 MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR,
198 MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC,
199 /* SDCARD */
200 MX35_PAD_SD1_CMD__ESDHC1_CMD,
201 MX35_PAD_SD1_CLK__ESDHC1_CLK,
202 MX35_PAD_SD1_DATA0__ESDHC1_DAT0,
203 MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
204 MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
205 MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
206 /* I2C1 */
207 MX35_PAD_I2C1_CLK__I2C1_SCL,
208 MX35_PAD_I2C1_DAT__I2C1_SDA,
209 /* Display */
210 MX35_PAD_LD0__IPU_DISPB_DAT_0,
211 MX35_PAD_LD1__IPU_DISPB_DAT_1,
212 MX35_PAD_LD2__IPU_DISPB_DAT_2,
213 MX35_PAD_LD3__IPU_DISPB_DAT_3,
214 MX35_PAD_LD4__IPU_DISPB_DAT_4,
215 MX35_PAD_LD5__IPU_DISPB_DAT_5,
216 MX35_PAD_LD6__IPU_DISPB_DAT_6,
217 MX35_PAD_LD7__IPU_DISPB_DAT_7,
218 MX35_PAD_LD8__IPU_DISPB_DAT_8,
219 MX35_PAD_LD9__IPU_DISPB_DAT_9,
220 MX35_PAD_LD10__IPU_DISPB_DAT_10,
221 MX35_PAD_LD11__IPU_DISPB_DAT_11,
222 MX35_PAD_LD12__IPU_DISPB_DAT_12,
223 MX35_PAD_LD13__IPU_DISPB_DAT_13,
224 MX35_PAD_LD14__IPU_DISPB_DAT_14,
225 MX35_PAD_LD15__IPU_DISPB_DAT_15,
226 MX35_PAD_LD16__IPU_DISPB_DAT_16,
227 MX35_PAD_LD17__IPU_DISPB_DAT_17,
228 MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,
229 MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
230 MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
231 MX35_PAD_CONTRAST__IPU_DISPB_CONTR,
232 MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
233 MX35_PAD_D3_REV__IPU_DISPB_D3_REV,
234 MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS,
235 /* CSI */
236 MX35_PAD_TX1__IPU_CSI_D_6,
237 MX35_PAD_TX0__IPU_CSI_D_7,
238 MX35_PAD_CSI_D8__IPU_CSI_D_8,
239 MX35_PAD_CSI_D9__IPU_CSI_D_9,
240 MX35_PAD_CSI_D10__IPU_CSI_D_10,
241 MX35_PAD_CSI_D11__IPU_CSI_D_11,
242 MX35_PAD_CSI_D12__IPU_CSI_D_12,
243 MX35_PAD_CSI_D13__IPU_CSI_D_13,
244 MX35_PAD_CSI_D14__IPU_CSI_D_14,
245 MX35_PAD_CSI_D15__IPU_CSI_D_15,
246 MX35_PAD_CSI_HSYNC__IPU_CSI_HSYNC,
247 MX35_PAD_CSI_MCLK__IPU_CSI_MCLK,
248 MX35_PAD_CSI_PIXCLK__IPU_CSI_PIXCLK,
249 MX35_PAD_CSI_VSYNC__IPU_CSI_VSYNC,
250 /*PMIC IRQ*/
251 MX35_PAD_GPIO2_0__GPIO2_0,
252 };
253
254 /*
255 * Camera support
256 */
257 static phys_addr_t mx3_camera_base __initdata;
258 #define MX35_3DS_CAMERA_BUF_SIZE SZ_8M
259
260 static const struct mx3_camera_pdata mx35_3ds_camera_pdata __initconst = {
261 .flags = MX3_CAMERA_DATAWIDTH_8,
262 .mclk_10khz = 2000,
263 };
264
265 static int __init imx35_3ds_init_camera(void)
266 {
267 int dma, ret = -ENOMEM;
268 struct platform_device *pdev =
269 imx35_alloc_mx3_camera(&mx35_3ds_camera_pdata);
270
271 if (IS_ERR(pdev))
272 return PTR_ERR(pdev);
273
274 if (!mx3_camera_base)
275 goto err;
276
277 dma = dma_declare_coherent_memory(&pdev->dev,
278 mx3_camera_base, mx3_camera_base,
279 MX35_3DS_CAMERA_BUF_SIZE,
280 DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
281
282 if (!(dma & DMA_MEMORY_MAP))
283 goto err;
284
285 ret = platform_device_add(pdev);
286 if (ret)
287 err:
288 platform_device_put(pdev);
289
290 return ret;
291 }
292
293 static struct i2c_board_info mx35_3ds_i2c_camera = {
294 I2C_BOARD_INFO("ov2640", 0x30),
295 };
296
297 static struct soc_camera_link iclink_ov2640 = {
298 .bus_id = 0,
299 .board_info = &mx35_3ds_i2c_camera,
300 .i2c_adapter_id = 0,
301 .power = NULL,
302 };
303
304 static struct platform_device mx35_3ds_ov2640 = {
305 .name = "soc-camera-pdrv",
306 .id = 0,
307 .dev = {
308 .platform_data = &iclink_ov2640,
309 },
310 };
311
312 static struct regulator_consumer_supply sw1_consumers[] = {
313 {
314 .supply = "cpu_vcc",
315 }
316 };
317
318 static struct regulator_consumer_supply vcam_consumers[] = {
319 /* sgtl5000 */
320 REGULATOR_SUPPLY("VDDA", "0-000a"),
321 };
322
323 static struct regulator_consumer_supply vaudio_consumers[] = {
324 REGULATOR_SUPPLY("cmos_vio", "soc-camera-pdrv.0"),
325 };
326
327 static struct regulator_init_data sw1_init = {
328 .constraints = {
329 .name = "SW1",
330 .min_uV = 600000,
331 .max_uV = 1375000,
332 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
333 .valid_modes_mask = 0,
334 .always_on = 1,
335 .boot_on = 1,
336 },
337 .num_consumer_supplies = ARRAY_SIZE(sw1_consumers),
338 .consumer_supplies = sw1_consumers,
339 };
340
341 static struct regulator_init_data sw2_init = {
342 .constraints = {
343 .name = "SW2",
344 .always_on = 1,
345 .boot_on = 1,
346 }
347 };
348
349 static struct regulator_init_data sw3_init = {
350 .constraints = {
351 .name = "SW3",
352 .always_on = 1,
353 .boot_on = 1,
354 }
355 };
356
357 static struct regulator_init_data sw4_init = {
358 .constraints = {
359 .name = "SW4",
360 .always_on = 1,
361 .boot_on = 1,
362 }
363 };
364
365 static struct regulator_init_data viohi_init = {
366 .constraints = {
367 .name = "VIOHI",
368 .boot_on = 1,
369 }
370 };
371
372 static struct regulator_init_data vusb_init = {
373 .constraints = {
374 .name = "VUSB",
375 .boot_on = 1,
376 }
377 };
378
379 static struct regulator_init_data vdig_init = {
380 .constraints = {
381 .name = "VDIG",
382 .boot_on = 1,
383 }
384 };
385
386 static struct regulator_init_data vpll_init = {
387 .constraints = {
388 .name = "VPLL",
389 .boot_on = 1,
390 }
391 };
392
393 static struct regulator_init_data vusb2_init = {
394 .constraints = {
395 .name = "VUSB2",
396 .boot_on = 1,
397 }
398 };
399
400 static struct regulator_init_data vvideo_init = {
401 .constraints = {
402 .name = "VVIDEO",
403 .boot_on = 1
404 }
405 };
406
407 static struct regulator_init_data vaudio_init = {
408 .constraints = {
409 .name = "VAUDIO",
410 .min_uV = 2300000,
411 .max_uV = 3000000,
412 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
413 .boot_on = 1
414 },
415 .num_consumer_supplies = ARRAY_SIZE(vaudio_consumers),
416 .consumer_supplies = vaudio_consumers,
417 };
418
419 static struct regulator_init_data vcam_init = {
420 .constraints = {
421 .name = "VCAM",
422 .min_uV = 2500000,
423 .max_uV = 3000000,
424 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
425 REGULATOR_CHANGE_MODE,
426 .valid_modes_mask = REGULATOR_MODE_FAST | REGULATOR_MODE_NORMAL,
427 .boot_on = 1
428 },
429 .num_consumer_supplies = ARRAY_SIZE(vcam_consumers),
430 .consumer_supplies = vcam_consumers,
431 };
432
433 static struct regulator_init_data vgen1_init = {
434 .constraints = {
435 .name = "VGEN1",
436 }
437 };
438
439 static struct regulator_init_data vgen2_init = {
440 .constraints = {
441 .name = "VGEN2",
442 .boot_on = 1,
443 }
444 };
445
446 static struct regulator_init_data vgen3_init = {
447 .constraints = {
448 .name = "VGEN3",
449 }
450 };
451
452 static struct mc13xxx_regulator_init_data mx35_3ds_regulators[] = {
453 { .id = MC13892_SW1, .init_data = &sw1_init },
454 { .id = MC13892_SW2, .init_data = &sw2_init },
455 { .id = MC13892_SW3, .init_data = &sw3_init },
456 { .id = MC13892_SW4, .init_data = &sw4_init },
457 { .id = MC13892_VIOHI, .init_data = &viohi_init },
458 { .id = MC13892_VPLL, .init_data = &vpll_init },
459 { .id = MC13892_VDIG, .init_data = &vdig_init },
460 { .id = MC13892_VUSB2, .init_data = &vusb2_init },
461 { .id = MC13892_VVIDEO, .init_data = &vvideo_init },
462 { .id = MC13892_VAUDIO, .init_data = &vaudio_init },
463 { .id = MC13892_VCAM, .init_data = &vcam_init },
464 { .id = MC13892_VGEN1, .init_data = &vgen1_init },
465 { .id = MC13892_VGEN2, .init_data = &vgen2_init },
466 { .id = MC13892_VGEN3, .init_data = &vgen3_init },
467 { .id = MC13892_VUSB, .init_data = &vusb_init },
468 };
469
470 static struct mc13xxx_platform_data mx35_3ds_mc13892_data = {
471 .flags = MC13XXX_USE_RTC | MC13XXX_USE_TOUCHSCREEN,
472 .regulators = {
473 .num_regulators = ARRAY_SIZE(mx35_3ds_regulators),
474 .regulators = mx35_3ds_regulators,
475 },
476 };
477
478 #define GPIO_PMIC_INT IMX_GPIO_NR(2, 0)
479
480 static struct i2c_board_info mx35_3ds_i2c_mc13892 = {
481
482 I2C_BOARD_INFO("mc13892", 0x08),
483 .platform_data = &mx35_3ds_mc13892_data,
484 /* irq number is run-time assigned */
485 };
486
487 static void __init imx35_3ds_init_mc13892(void)
488 {
489 int ret = gpio_request_one(GPIO_PMIC_INT, GPIOF_DIR_IN, "pmic irq");
490
491 if (ret) {
492 pr_err("failed to get pmic irq: %d\n", ret);
493 return;
494 }
495
496 mx35_3ds_i2c_mc13892.irq = gpio_to_irq(GPIO_PMIC_INT);
497 i2c_register_board_info(0, &mx35_3ds_i2c_mc13892, 1);
498 }
499
500 static int mx35_3ds_otg_init(struct platform_device *pdev)
501 {
502 return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERNAL_PHY);
503 }
504
505 /* OTG config */
506 static const struct fsl_usb2_platform_data usb_otg_pdata __initconst = {
507 .operating_mode = FSL_USB2_DR_DEVICE,
508 .phy_mode = FSL_USB2_PHY_UTMI_WIDE,
509 .workaround = FLS_USB2_WORKAROUND_ENGCM09152,
510 /*
511 * ENGCM09152 also requires a hardware change.
512 * Please check the MX35 Chip Errata document for details.
513 */
514 };
515
516 static struct mxc_usbh_platform_data otg_pdata __initdata = {
517 .init = mx35_3ds_otg_init,
518 .portsc = MXC_EHCI_MODE_UTMI,
519 };
520
521 static int mx35_3ds_usbh_init(struct platform_device *pdev)
522 {
523 return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_SINGLE_UNI |
524 MXC_EHCI_INTERNAL_PHY);
525 }
526
527 /* USB HOST config */
528 static const struct mxc_usbh_platform_data usb_host_pdata __initconst = {
529 .init = mx35_3ds_usbh_init,
530 .portsc = MXC_EHCI_MODE_SERIAL,
531 };
532
533 static bool otg_mode_host __initdata;
534
535 static int __init mx35_3ds_otg_mode(char *options)
536 {
537 if (!strcmp(options, "host"))
538 otg_mode_host = true;
539 else if (!strcmp(options, "device"))
540 otg_mode_host = false;
541 else
542 pr_info("otg_mode neither \"host\" nor \"device\". "
543 "Defaulting to device\n");
544 return 1;
545 }
546 __setup("otg_mode=", mx35_3ds_otg_mode);
547
548 static const struct imxi2c_platform_data mx35_3ds_i2c0_data __initconst = {
549 .bitrate = 100000,
550 };
551
552 /*
553 * Board specific initialization.
554 */
555 static void __init mx35_3ds_init(void)
556 {
557 struct platform_device *imx35_fb_pdev;
558
559 imx35_soc_init();
560
561 mxc_iomux_v3_setup_multiple_pads(mx35pdk_pads, ARRAY_SIZE(mx35pdk_pads));
562
563 imx35_add_fec(NULL);
564 imx35_add_imx2_wdt();
565 imx35_add_mxc_rtc();
566 platform_add_devices(devices, ARRAY_SIZE(devices));
567
568 imx35_add_imx_uart0(&uart_pdata);
569
570 if (otg_mode_host)
571 imx35_add_mxc_ehci_otg(&otg_pdata);
572
573 imx35_add_mxc_ehci_hs(&usb_host_pdata);
574
575 if (!otg_mode_host)
576 imx35_add_fsl_usb2_udc(&usb_otg_pdata);
577
578 imx35_add_mxc_nand(&mx35pdk_nand_board_info);
579 imx35_add_sdhci_esdhc_imx(0, NULL);
580
581 if (mxc_expio_init(MX35_CS5_BASE_ADDR, IMX_GPIO_NR(1, 1)))
582 pr_warn("Init of the debugboard failed, all "
583 "devices on the debugboard are unusable.\n");
584 imx35_add_imx_i2c0(&mx35_3ds_i2c0_data);
585
586 i2c_register_board_info(
587 0, i2c_devices_3ds, ARRAY_SIZE(i2c_devices_3ds));
588
589 imx35_add_ipu_core();
590 platform_device_register(&mx35_3ds_ov2640);
591 imx35_3ds_init_camera();
592
593 imx35_fb_pdev = imx35_add_mx3_sdc_fb(&mx3fb_pdata);
594 mx35_3ds_lcd.dev.parent = &imx35_fb_pdev->dev;
595 platform_device_register(&mx35_3ds_lcd);
596
597 imx35_3ds_init_mc13892();
598 }
599
600 static void __init mx35pdk_timer_init(void)
601 {
602 mx35_clocks_init();
603 }
604
605 static struct sys_timer mx35pdk_timer = {
606 .init = mx35pdk_timer_init,
607 };
608
609 static void __init mx35_3ds_reserve(void)
610 {
611 /* reserve MX35_3DS_CAMERA_BUF_SIZE bytes for mx3-camera */
612 mx3_camera_base = arm_memblock_steal(MX35_3DS_CAMERA_BUF_SIZE,
613 MX35_3DS_CAMERA_BUF_SIZE);
614 }
615
616 MACHINE_START(MX35_3DS, "Freescale MX35PDK")
617 /* Maintainer: Freescale Semiconductor, Inc */
618 .atag_offset = 0x100,
619 .map_io = mx35_map_io,
620 .init_early = imx35_init_early,
621 .init_irq = mx35_init_irq,
622 .handle_irq = imx35_handle_irq,
623 .timer = &mx35pdk_timer,
624 .init_machine = mx35_3ds_init,
625 .reserve = mx35_3ds_reserve,
626 .restart = mxc_restart,
627 MACHINE_END
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