arch/arm/mach-imx/mach-pcm043.c

   1 /*
   2  *  Copyright (C) 2009 Sascha Hauer, Pengutronix
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <linux/types.h>
  16 #include <linux/init.h>
  17
  18 #include <linux/platform_device.h>
  19 #include <linux/mtd/physmap.h>
  20 #include <linux/mtd/plat-ram.h>
  21 #include <linux/memory.h>
  22 #include <linux/gpio.h>
  23 #include <linux/smc911x.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/delay.h>
  26 #include <linux/i2c.h>
  27 #include <linux/i2c/at24.h>
  28 #include <linux/usb/otg.h>
  29 #include <linux/usb/ulpi.h>
  30
  31 #include <asm/mach-types.h>
  32 #include <asm/mach/arch.h>
  33 #include <asm/mach/time.h>
  34 #include <asm/mach/map.h>
  35
  36 #include <mach/hardware.h>
  37 #include <mach/common.h>
  38 #include <mach/iomux-mx35.h>
  39 #include <mach/ulpi.h>
  40
  41 #include "devices-imx35.h"
  42
  43 static const struct fb_videomode fb_modedb[] = {
  44         {
  45                 /* 240x320 @ 60 Hz */
  46                 .name           = "Sharp-LQ035Q7",
  47                 .refresh        = 60,
  48                 .xres           = 240,
  49                 .yres           = 320,
  50                 .pixclock       = 185925,
  51                 .left_margin    = 9,
  52                 .right_margin   = 16,
  53                 .upper_margin   = 7,
  54                 .lower_margin   = 9,
  55                 .hsync_len      = 1,
  56                 .vsync_len      = 1,
  57                 .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE | FB_SYNC_CLK_INVERT | FB_SYNC_CLK_IDLE_EN,
  58                 .vmode          = FB_VMODE_NONINTERLACED,
  59                 .flag           = 0,
  60         }, {
  61                 /* 240x320 @ 60 Hz */
  62                 .name           = "TX090",
  63                 .refresh        = 60,
  64                 .xres           = 240,
  65                 .yres           = 320,
  66                 .pixclock       = 38255,
  67                 .left_margin    = 144,
  68                 .right_margin   = 0,
  69                 .upper_margin   = 7,
  70                 .lower_margin   = 40,
  71                 .hsync_len      = 96,
  72                 .vsync_len      = 1,
  73                 .sync           = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
  74                 .vmode          = FB_VMODE_NONINTERLACED,
  75                 .flag           = 0,
  76         },
  77 };
  78
  79 static const struct ipu_platform_data mx3_ipu_data __initconst = {
  80         .irq_base = MXC_IPU_IRQ_START,
  81 };
  82
  83 static struct mx3fb_platform_data mx3fb_pdata __initdata = {
  84         .name           = "Sharp-LQ035Q7",
  85         .mode           = fb_modedb,
  86         .num_modes      = ARRAY_SIZE(fb_modedb),
  87 };
  88
  89 static struct physmap_flash_data pcm043_flash_data = {
  90         .width  = 2,
  91 };
  92
  93 static struct resource pcm043_flash_resource = {
  94         .start  = 0xa0000000,
  95         .end    = 0xa1ffffff,
  96         .flags  = IORESOURCE_MEM,
  97 };
  98
  99 static struct platform_device pcm043_flash = {
 100         .name   = "physmap-flash",
 101         .id     = 0,
 102         .dev    = {
 103                 .platform_data  = &pcm043_flash_data,
 104         },
 105         .resource = &pcm043_flash_resource,
 106         .num_resources = 1,
 107 };
 108
 109 static const struct imxuart_platform_data uart_pdata __initconst = {
 110         .flags = IMXUART_HAVE_RTSCTS,
 111 };
 112
 113 static const struct imxi2c_platform_data pcm043_i2c0_data __initconst = {
 114         .bitrate = 50000,
 115 };
 116
 117 static struct at24_platform_data board_eeprom = {
 118         .byte_len = 4096,
 119         .page_size = 32,
 120         .flags = AT24_FLAG_ADDR16,
 121 };
 122
 123 static struct i2c_board_info pcm043_i2c_devices[] = {
 124         {
 125                 I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
 126                 .platform_data = &board_eeprom,
 127         }, {
 128                 I2C_BOARD_INFO("pcf8563", 0x51),
 129         },
 130 };
 131
 132 static struct platform_device *devices[] __initdata = {
 133         &pcm043_flash,
 134 };
 135
 136 static iomux_v3_cfg_t pcm043_pads[] = {
 137         /* UART1 */
 138         MX35_PAD_CTS1__UART1_CTS,
 139         MX35_PAD_RTS1__UART1_RTS,
 140         MX35_PAD_TXD1__UART1_TXD_MUX,
 141         MX35_PAD_RXD1__UART1_RXD_MUX,
 142         /* UART2 */
 143         MX35_PAD_CTS2__UART2_CTS,
 144         MX35_PAD_RTS2__UART2_RTS,
 145         MX35_PAD_TXD2__UART2_TXD_MUX,
 146         MX35_PAD_RXD2__UART2_RXD_MUX,
 147         /* FEC */
 148         MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
 149         MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
 150         MX35_PAD_FEC_RX_DV__FEC_RX_DV,
 151         MX35_PAD_FEC_COL__FEC_COL,
 152         MX35_PAD_FEC_RDATA0__FEC_RDATA_0,
 153         MX35_PAD_FEC_TDATA0__FEC_TDATA_0,
 154         MX35_PAD_FEC_TX_EN__FEC_TX_EN,
 155         MX35_PAD_FEC_MDC__FEC_MDC,
 156         MX35_PAD_FEC_MDIO__FEC_MDIO,
 157         MX35_PAD_FEC_TX_ERR__FEC_TX_ERR,
 158         MX35_PAD_FEC_RX_ERR__FEC_RX_ERR,
 159         MX35_PAD_FEC_CRS__FEC_CRS,
 160         MX35_PAD_FEC_RDATA1__FEC_RDATA_1,
 161         MX35_PAD_FEC_TDATA1__FEC_TDATA_1,
 162         MX35_PAD_FEC_RDATA2__FEC_RDATA_2,
 163         MX35_PAD_FEC_TDATA2__FEC_TDATA_2,
 164         MX35_PAD_FEC_RDATA3__FEC_RDATA_3,
 165         MX35_PAD_FEC_TDATA3__FEC_TDATA_3,
 166         /* I2C1 */
 167         MX35_PAD_I2C1_CLK__I2C1_SCL,
 168         MX35_PAD_I2C1_DAT__I2C1_SDA,
 169         /* Display */
 170         MX35_PAD_LD0__IPU_DISPB_DAT_0,
 171         MX35_PAD_LD1__IPU_DISPB_DAT_1,
 172         MX35_PAD_LD2__IPU_DISPB_DAT_2,
 173         MX35_PAD_LD3__IPU_DISPB_DAT_3,
 174         MX35_PAD_LD4__IPU_DISPB_DAT_4,
 175         MX35_PAD_LD5__IPU_DISPB_DAT_5,
 176         MX35_PAD_LD6__IPU_DISPB_DAT_6,
 177         MX35_PAD_LD7__IPU_DISPB_DAT_7,
 178         MX35_PAD_LD8__IPU_DISPB_DAT_8,
 179         MX35_PAD_LD9__IPU_DISPB_DAT_9,
 180         MX35_PAD_LD10__IPU_DISPB_DAT_10,
 181         MX35_PAD_LD11__IPU_DISPB_DAT_11,
 182         MX35_PAD_LD12__IPU_DISPB_DAT_12,
 183         MX35_PAD_LD13__IPU_DISPB_DAT_13,
 184         MX35_PAD_LD14__IPU_DISPB_DAT_14,
 185         MX35_PAD_LD15__IPU_DISPB_DAT_15,
 186         MX35_PAD_LD16__IPU_DISPB_DAT_16,
 187         MX35_PAD_LD17__IPU_DISPB_DAT_17,
 188         MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,
 189         MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
 190         MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
 191         MX35_PAD_CONTRAST__IPU_DISPB_CONTR,
 192         MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
 193         MX35_PAD_D3_REV__IPU_DISPB_D3_REV,
 194         MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS,
 195         /* gpio */
 196         MX35_PAD_ATA_CS0__GPIO2_6,
 197         /* USB host */
 198         MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR,
 199         MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC,
 200         /* SSI */
 201         MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS,
 202         MX35_PAD_STXD4__AUDMUX_AUD4_TXD,
 203         MX35_PAD_SRXD4__AUDMUX_AUD4_RXD,
 204         MX35_PAD_SCK4__AUDMUX_AUD4_TXC,
 205         /* CAN2 */
 206         MX35_PAD_TX5_RX0__CAN2_TXCAN,
 207         MX35_PAD_TX4_RX1__CAN2_RXCAN,
 208         /* esdhc */
 209         MX35_PAD_SD1_CMD__ESDHC1_CMD,
 210         MX35_PAD_SD1_CLK__ESDHC1_CLK,
 211         MX35_PAD_SD1_DATA0__ESDHC1_DAT0,
 212         MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
 213         MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
 214         MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
 215         MX35_PAD_ATA_DATA10__GPIO2_23, /* WriteProtect */
 216         MX35_PAD_ATA_DATA11__GPIO2_24, /* CardDetect */
 217 };
 218
 219 #define AC97_GPIO_TXFS  IMX_GPIO_NR(2, 31)
 220 #define AC97_GPIO_TXD   IMX_GPIO_NR(2, 28)
 221 #define AC97_GPIO_RESET IMX_GPIO_NR(2, 0)
 222 #define SD1_GPIO_WP     IMX_GPIO_NR(2, 23)
 223 #define SD1_GPIO_CD     IMX_GPIO_NR(2, 24)
 224
 225 static void pcm043_ac97_warm_reset(struct snd_ac97 *ac97)
 226 {
 227         iomux_v3_cfg_t txfs_gpio = MX35_PAD_STXFS4__GPIO2_31;
 228         iomux_v3_cfg_t txfs = MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS;
 229         int ret;
 230
 231         ret = gpio_request(AC97_GPIO_TXFS, "SSI");
 232         if (ret) {
 233                 printk("failed to get GPIO_TXFS: %d\n", ret);
 234                 return;
 235         }
 236
 237         mxc_iomux_v3_setup_pad(txfs_gpio);
 238
 239         /* warm reset */
 240         gpio_direction_output(AC97_GPIO_TXFS, 1);
 241         udelay(2);
 242         gpio_set_value(AC97_GPIO_TXFS, 0);
 243
 244         gpio_free(AC97_GPIO_TXFS);
 245         mxc_iomux_v3_setup_pad(txfs);
 246 }
 247
 248 static void pcm043_ac97_cold_reset(struct snd_ac97 *ac97)
 249 {
 250         iomux_v3_cfg_t txfs_gpio = MX35_PAD_STXFS4__GPIO2_31;
 251         iomux_v3_cfg_t txfs = MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS;
 252         iomux_v3_cfg_t txd_gpio = MX35_PAD_STXD4__GPIO2_28;
 253         iomux_v3_cfg_t txd = MX35_PAD_STXD4__AUDMUX_AUD4_TXD;
 254         iomux_v3_cfg_t reset_gpio = MX35_PAD_SD2_CMD__GPIO2_0;
 255         int ret;
 256
 257         ret = gpio_request(AC97_GPIO_TXFS, "SSI");
 258         if (ret)
 259                 goto err1;
 260
 261         ret = gpio_request(AC97_GPIO_TXD, "SSI");
 262         if (ret)
 263                 goto err2;
 264
 265         ret = gpio_request(AC97_GPIO_RESET, "SSI");
 266         if (ret)
 267                 goto err3;
 268
 269         mxc_iomux_v3_setup_pad(txfs_gpio);
 270         mxc_iomux_v3_setup_pad(txd_gpio);
 271         mxc_iomux_v3_setup_pad(reset_gpio);
 272
 273         gpio_direction_output(AC97_GPIO_TXFS, 0);
 274         gpio_direction_output(AC97_GPIO_TXD, 0);
 275
 276         /* cold reset */
 277         gpio_direction_output(AC97_GPIO_RESET, 0);
 278         udelay(10);
 279         gpio_direction_output(AC97_GPIO_RESET, 1);
 280
 281         mxc_iomux_v3_setup_pad(txd);
 282         mxc_iomux_v3_setup_pad(txfs);
 283
 284         gpio_free(AC97_GPIO_RESET);
 285 err3:
 286         gpio_free(AC97_GPIO_TXD);
 287 err2:
 288         gpio_free(AC97_GPIO_TXFS);
 289 err1:
 290         if (ret)
 291                 printk("%s failed with %d\n", __func__, ret);
 292         mdelay(1);
 293 }
 294
 295 static const struct imx_ssi_platform_data pcm043_ssi_pdata __initconst = {
 296         .ac97_reset = pcm043_ac97_cold_reset,
 297         .ac97_warm_reset = pcm043_ac97_warm_reset,
 298         .flags = IMX_SSI_USE_AC97,
 299 };
 300
 301 static const struct mxc_nand_platform_data
 302 pcm037_nand_board_info __initconst = {
 303         .width = 1,
 304         .hw_ecc = 1,
 305 };
 306
 307 static int pcm043_otg_init(struct platform_device *pdev)
 308 {
 309         return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
 310 }
 311
 312 static struct mxc_usbh_platform_data otg_pdata __initdata = {
 313         .init   = pcm043_otg_init,
 314         .portsc = MXC_EHCI_MODE_UTMI,
 315 };
 316
 317 static int pcm043_usbh1_init(struct platform_device *pdev)
 318 {
 319         return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_SINGLE_UNI |
 320                         MXC_EHCI_INTERNAL_PHY | MXC_EHCI_IPPUE_DOWN);
 321 }
 322
 323 static const struct mxc_usbh_platform_data usbh1_pdata __initconst = {
 324         .init   = pcm043_usbh1_init,
 325         .portsc = MXC_EHCI_MODE_SERIAL,
 326 };
 327
 328 static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
 329         .operating_mode = FSL_USB2_DR_DEVICE,
 330         .phy_mode       = FSL_USB2_PHY_UTMI,
 331 };
 332
 333 static int otg_mode_host;
 334
 335 static int __init pcm043_otg_mode(char *options)
 336 {
 337         if (!strcmp(options, "host"))
 338                 otg_mode_host = 1;
 339         else if (!strcmp(options, "device"))
 340                 otg_mode_host = 0;
 341         else
 342                 pr_info("otg_mode neither \"host\" nor \"device\". "
 343                         "Defaulting to device\n");
 344         return 0;
 345 }
 346 __setup("otg_mode=", pcm043_otg_mode);
 347
 348 static struct esdhc_platform_data sd1_pdata = {
 349         .wp_gpio = SD1_GPIO_WP,
 350         .cd_gpio = SD1_GPIO_CD,
 351         .wp_type = ESDHC_WP_GPIO,
 352         .cd_type = ESDHC_CD_GPIO,
 353 };
 354
 355 /*
 356  * Board specific initialization.
 357  */
 358 static void __init pcm043_init(void)
 359 {
 360         imx35_soc_init();
 361
 362         mxc_iomux_v3_setup_multiple_pads(pcm043_pads, ARRAY_SIZE(pcm043_pads));
 363
 364         imx35_add_fec(NULL);
 365         platform_add_devices(devices, ARRAY_SIZE(devices));
 366         imx35_add_imx2_wdt(NULL);
 367
 368         imx35_add_imx_uart0(&uart_pdata);
 369         imx35_add_mxc_nand(&pcm037_nand_board_info);
 370         imx35_add_imx_ssi(0, &pcm043_ssi_pdata);
 371
 372         imx35_add_imx_uart1(&uart_pdata);
 373
 374         i2c_register_board_info(0, pcm043_i2c_devices,
 375                         ARRAY_SIZE(pcm043_i2c_devices));
 376
 377         imx35_add_imx_i2c0(&pcm043_i2c0_data);
 378
 379         imx35_add_ipu_core(&mx3_ipu_data);
 380         imx35_add_mx3_sdc_fb(&mx3fb_pdata);
 381
 382         if (otg_mode_host) {
 383                 otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
 384                                 ULPI_OTG_DRVVBUS_EXT);
 385                 if (otg_pdata.otg)
 386                         imx35_add_mxc_ehci_otg(&otg_pdata);
 387         }
 388         imx35_add_mxc_ehci_hs(&usbh1_pdata);
 389
 390         if (!otg_mode_host)
 391                 imx35_add_fsl_usb2_udc(&otg_device_pdata);
 392
 393         imx35_add_flexcan1(NULL);
 394         imx35_add_sdhci_esdhc_imx(0, &sd1_pdata);
 395 }
 396
 397 static void __init pcm043_timer_init(void)
 398 {
 399         mx35_clocks_init();
 400 }
 401
 402 struct sys_timer pcm043_timer = {
 403         .init   = pcm043_timer_init,
 404 };
 405
 406 MACHINE_START(PCM043, "Phytec Phycore pcm043")
 407         /* Maintainer: Pengutronix */
 408         .atag_offset = 0x100,
 409         .map_io = mx35_map_io,
 410         .init_early = imx35_init_early,
 411         .init_irq = mx35_init_irq,
 412         .handle_irq = imx35_handle_irq,
 413         .timer = &pcm043_timer,
 414         .init_machine = pcm043_init,
 415         .restart        = mxc_restart,
 416 MACHINE_END