arch/arm/mach-iop13xx/iq81340sc.c

   1 /*
   2  * iq81340sc board support
   3  * Copyright (c) 2005-2006, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
  16  * Place - Suite 330, Boston, MA 02111-1307 USA.
  17  *
  18  */
  19 #include <linux/pci.h>
  20
  21 #include <asm/hardware.h>
  22 #include <asm/irq.h>
  23 #include <asm/mach/pci.h>
  24 #include <asm/mach-types.h>
  25 #include <asm/mach/arch.h>
  26 #include <asm/arch/pci.h>
  27 #include <asm/mach/time.h>
  28
  29 extern int init_atu;
  30
  31 static int __init
  32 iq81340sc_atux_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
  33 {
  34         WARN_ON(idsel < 1 || idsel > 2);
  35
  36         switch (idsel) {
  37         case 1:
  38                 switch (pin) {
  39                 case 1: return ATUX_INTB;
  40                 case 2: return ATUX_INTC;
  41                 case 3: return ATUX_INTD;
  42                 case 4: return ATUX_INTA;
  43                 default: return -1;
  44                 }
  45         case 2:
  46                 switch (pin) {
  47                 case 1: return ATUX_INTC;
  48                 case 2: return ATUX_INTC;
  49                 case 3: return ATUX_INTC;
  50                 case 4: return ATUX_INTC;
  51                 default: return -1;
  52                 }
  53         default: return -1;
  54         }
  55 }
  56
  57 static struct hw_pci iq81340sc_pci __initdata = {
  58         .swizzle        = pci_std_swizzle,
  59         .nr_controllers = 0,
  60         .setup          = iop13xx_pci_setup,
  61         .scan           = iop13xx_scan_bus,
  62         .map_irq        = iq81340sc_atux_map_irq,
  63         .preinit        = iop13xx_pci_init
  64 };
  65
  66 static int __init iq81340sc_pci_init(void)
  67 {
  68         iop13xx_atu_select(&iq81340sc_pci);
  69         pci_common_init(&iq81340sc_pci);
  70         iop13xx_map_pci_memory();
  71
  72         return 0;
  73 }
  74
  75 static void __init iq81340sc_init(void)
  76 {
  77         iop13xx_platform_init();
  78         iq81340sc_pci_init();
  79 }
  80
  81 static void __init iq81340sc_timer_init(void)
  82 {
  83         iop13xx_init_time(400000000);
  84 }
  85
  86 static struct sys_timer iq81340sc_timer = {
  87        .init       = iq81340sc_timer_init,
  88        .offset     = iop13xx_gettimeoffset,
  89 };
  90
  91 MACHINE_START(IQ81340SC, "Intel IQ81340SC")
  92         /* Maintainer: Dan Williams <dan.j.williams@intel.com> */
  93         .phys_io        = IOP13XX_PMMR_PHYS_MEM_BASE,
  94         .io_pg_offst    = (IOP13XX_PMMR_VIRT_MEM_BASE >> 18) & 0xfffc,
  95         .boot_params    = 0x00000100,
  96         .map_io         = iop13xx_map_io,
  97         .init_irq       = iop13xx_init_irq,
  98         .timer          = &iq81340sc_timer,
  99         .init_machine   = iq81340sc_init,
 100 MACHINE_END