arch/arm/mach-mvebu/headsmp.S

   1 /*
   2  * SMP support: Entry point for secondary CPUs
   3  *
   4  * Copyright (C) 2012 Marvell
   5  *
   6  * Yehuda Yitschak <yehuday@marvell.com>
   7  * Gregory CLEMENT <gregory.clement@free-electrons.com>
   8  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   9  *
  10  * This file is licensed under the terms of the GNU General Public
  11  * License version 2.  This program is licensed "as is" without any
  12  * warranty of any kind, whether express or implied.
  13  *
  14  * This file implements the assembly entry point for secondary CPUs in
  15  * an SMP kernel. The only thing we need to do is to add the CPU to
  16  * the coherency fabric by writing to 2 registers. Currently the base
  17  * register addresses are hard coded due to the early initialisation
  18  * problems.
  19  */
  20
  21 #include <linux/linkage.h>
  22 #include <linux/init.h>
  23
  24         __CPUINIT
  25
  26 /*
  27  * Armada XP specific entry point for secondary CPUs.
  28  * We add the CPU to the coherency fabric and then jump to secondary
  29  * startup
  30  */
  31 ENTRY(armada_xp_secondary_startup)
  32         /* Get coherency fabric base physical address */
  33         adr     r0, 1f
  34         ldr     r1, [r0]
  35         ldr     r0, [r0, r1]
  36
  37         /* Read CPU id */
  38         mrc     p15, 0, r1, c0, c0, 5
  39         and     r1, r1, #0xF
  40
  41         /* Add CPU to coherency fabric */
  42         bl      ll_set_cpu_coherent
  43         b       secondary_startup
  44
  45 ENDPROC(armada_xp_secondary_startup)
  46
  47         .align 2
  48 1:
  49         .long   coherency_phys_base - .