efikamx: add spi nor support
[deliverable/linux.git] / arch / arm / mach-mx5 / board-mx51_efikamx.c
1 /*
2 * Copyright (C) 2010 Linaro Limited
3 *
4 * based on code from the following
5 * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
6 * Copyright 2009-2010 Pegatron Corporation. All Rights Reserved.
7 * Copyright 2009-2010 Genesi USA, Inc. All Rights Reserved.
8 *
9 * The code contained herein is licensed under the GNU General Public
10 * License. You may obtain a copy of the GNU General Public License
11 * Version 2 or later at the following locations:
12 *
13 * http://www.opensource.org/licenses/gpl-license.html
14 * http://www.gnu.org/copyleft/gpl.html
15 */
16
17 #include <linux/init.h>
18 #include <linux/platform_device.h>
19 #include <linux/i2c.h>
20 #include <linux/gpio.h>
21 #include <linux/leds.h>
22 #include <linux/input.h>
23 #include <linux/delay.h>
24 #include <linux/io.h>
25 #include <linux/fsl_devices.h>
26 #include <linux/spi/flash.h>
27 #include <linux/spi/spi.h>
28
29 #include <mach/common.h>
30 #include <mach/hardware.h>
31 #include <mach/iomux-mx51.h>
32 #include <mach/i2c.h>
33 #include <mach/mxc_ehci.h>
34
35 #include <asm/irq.h>
36 #include <asm/setup.h>
37 #include <asm/mach-types.h>
38 #include <asm/mach/arch.h>
39 #include <asm/mach/time.h>
40
41 #include "devices-imx51.h"
42 #include "devices.h"
43
44 #define MX51_USB_PLL_DIV_24_MHZ 0x01
45
46 #define EFIKAMX_PCBID0 (2*32 + 16)
47 #define EFIKAMX_PCBID1 (2*32 + 17)
48 #define EFIKAMX_PCBID2 (2*32 + 11)
49
50 #define EFIKAMX_BLUE_LED (2*32 + 13)
51 #define EFIKAMX_GREEN_LED (2*32 + 14)
52 #define EFIKAMX_RED_LED (2*32 + 15)
53
54 #define EFIKAMX_POWER_KEY (1*32 + 31)
55
56 #define EFIKAMX_SPI_CS0 (3*32 + 24)
57 #define EFIKAMX_SPI_CS1 (3*32 + 25)
58
59 /* the pci ids pin have pull up. they're driven low according to board id */
60 #define MX51_PAD_PCBID0 IOMUX_PAD(0x518, 0x130, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
61 #define MX51_PAD_PCBID1 IOMUX_PAD(0x51C, 0x134, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
62 #define MX51_PAD_PCBID2 IOMUX_PAD(0x504, 0x128, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
63 #define MX51_PAD_PWRKEY IOMUX_PAD(0x48c, 0x0f8, 1, 0x0, 0, PAD_CTL_PUS_100K_UP | PAD_CTL_PKE)
64
65 static iomux_v3_cfg_t mx51efikamx_pads[] = {
66 /* UART1 */
67 MX51_PAD_UART1_RXD__UART1_RXD,
68 MX51_PAD_UART1_TXD__UART1_TXD,
69 MX51_PAD_UART1_RTS__UART1_RTS,
70 MX51_PAD_UART1_CTS__UART1_CTS,
71 /* board id */
72 MX51_PAD_PCBID0,
73 MX51_PAD_PCBID1,
74 MX51_PAD_PCBID2,
75
76 /* SD 1 */
77 MX51_PAD_SD1_CMD__SD1_CMD,
78 MX51_PAD_SD1_CLK__SD1_CLK,
79 MX51_PAD_SD1_DATA0__SD1_DATA0,
80 MX51_PAD_SD1_DATA1__SD1_DATA1,
81 MX51_PAD_SD1_DATA2__SD1_DATA2,
82 MX51_PAD_SD1_DATA3__SD1_DATA3,
83
84 /* SD 2 */
85 MX51_PAD_SD2_CMD__SD2_CMD,
86 MX51_PAD_SD2_CLK__SD2_CLK,
87 MX51_PAD_SD2_DATA0__SD2_DATA0,
88 MX51_PAD_SD2_DATA1__SD2_DATA1,
89 MX51_PAD_SD2_DATA2__SD2_DATA2,
90 MX51_PAD_SD2_DATA3__SD2_DATA3,
91
92 /* SD/MMC WP/CD */
93 MX51_PAD_GPIO_1_0__ESDHC1_CD,
94 MX51_PAD_GPIO_1_1__ESDHC1_WP,
95 MX51_PAD_GPIO_1_7__ESDHC2_WP,
96 MX51_PAD_GPIO_1_8__ESDHC2_CD,
97
98 /* leds */
99 MX51_PAD_CSI1_D9__GPIO_3_13,
100 MX51_PAD_CSI1_VSYNC__GPIO_3_14,
101 MX51_PAD_CSI1_HSYNC__GPIO_3_15,
102
103 /* power key */
104 MX51_PAD_PWRKEY,
105
106 /* spi */
107 MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI,
108 MX51_PAD_CSPI1_MISO__ECSPI1_MISO,
109 MX51_PAD_CSPI1_SS0__GPIO_4_24,
110 MX51_PAD_CSPI1_SS1__GPIO_4_25,
111 MX51_PAD_CSPI1_RDY__ECSPI1_RDY,
112 MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
113 };
114
115 /* Serial ports */
116 #if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
117 static const struct imxuart_platform_data uart_pdata = {
118 .flags = IMXUART_HAVE_RTSCTS,
119 };
120
121 static inline void mxc_init_imx_uart(void)
122 {
123 imx51_add_imx_uart(0, &uart_pdata);
124 imx51_add_imx_uart(1, &uart_pdata);
125 imx51_add_imx_uart(2, &uart_pdata);
126 }
127 #else /* !SERIAL_IMX */
128 static inline void mxc_init_imx_uart(void)
129 {
130 }
131 #endif /* SERIAL_IMX */
132
133 /* This function is board specific as the bit mask for the plldiv will also
134 * be different for other Freescale SoCs, thus a common bitmask is not
135 * possible and cannot get place in /plat-mxc/ehci.c.
136 */
137 static int initialize_otg_port(struct platform_device *pdev)
138 {
139 u32 v;
140 void __iomem *usb_base;
141 void __iomem *usbother_base;
142 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
143 usbother_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET);
144
145 /* Set the PHY clock to 19.2MHz */
146 v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
147 v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
148 v |= MX51_USB_PLL_DIV_24_MHZ;
149 __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
150 iounmap(usb_base);
151 return 0;
152 }
153
154 static struct mxc_usbh_platform_data dr_utmi_config = {
155 .init = initialize_otg_port,
156 .portsc = MXC_EHCI_UTMI_16BIT,
157 .flags = MXC_EHCI_INTERNAL_PHY,
158 };
159
160 /* PCBID2 PCBID1 PCBID0 STATE
161 1 1 1 ER1:rev1.1
162 1 1 0 ER2:rev1.2
163 1 0 1 ER3:rev1.3
164 1 0 0 ER4:rev1.4
165 */
166 static void __init mx51_efikamx_board_id(void)
167 {
168 int id;
169
170 /* things are taking time to settle */
171 msleep(150);
172
173 gpio_request(EFIKAMX_PCBID0, "pcbid0");
174 gpio_direction_input(EFIKAMX_PCBID0);
175 gpio_request(EFIKAMX_PCBID1, "pcbid1");
176 gpio_direction_input(EFIKAMX_PCBID1);
177 gpio_request(EFIKAMX_PCBID2, "pcbid2");
178 gpio_direction_input(EFIKAMX_PCBID2);
179
180 id = gpio_get_value(EFIKAMX_PCBID0);
181 id |= gpio_get_value(EFIKAMX_PCBID1) << 1;
182 id |= gpio_get_value(EFIKAMX_PCBID2) << 2;
183
184 switch (id) {
185 case 7:
186 system_rev = 0x11;
187 break;
188 case 6:
189 system_rev = 0x12;
190 break;
191 case 5:
192 system_rev = 0x13;
193 break;
194 case 4:
195 system_rev = 0x14;
196 break;
197 default:
198 system_rev = 0x10;
199 break;
200 }
201
202 if ((system_rev == 0x10)
203 || (system_rev == 0x12)
204 || (system_rev == 0x14)) {
205 printk(KERN_WARNING
206 "EfikaMX: Unsupported board revision 1.%u!\n",
207 system_rev & 0xf);
208 }
209 }
210
211 static struct gpio_led mx51_efikamx_leds[] = {
212 {
213 .name = "efikamx:green",
214 .default_trigger = "default-on",
215 .gpio = EFIKAMX_GREEN_LED,
216 },
217 {
218 .name = "efikamx:red",
219 .default_trigger = "ide-disk",
220 .gpio = EFIKAMX_RED_LED,
221 },
222 {
223 .name = "efikamx:blue",
224 .default_trigger = "mmc0",
225 .gpio = EFIKAMX_BLUE_LED,
226 },
227 };
228
229 static struct gpio_led_platform_data mx51_efikamx_leds_data = {
230 .leds = mx51_efikamx_leds,
231 .num_leds = ARRAY_SIZE(mx51_efikamx_leds),
232 };
233
234 static struct platform_device mx51_efikamx_leds_device = {
235 .name = "leds-gpio",
236 .id = -1,
237 .dev = {
238 .platform_data = &mx51_efikamx_leds_data,
239 },
240 };
241
242 static struct gpio_keys_button mx51_efikamx_powerkey[] = {
243 {
244 .code = KEY_POWER,
245 .gpio = EFIKAMX_POWER_KEY,
246 .type = EV_PWR,
247 .desc = "Power Button (CM)",
248 .wakeup = 1,
249 .debounce_interval = 10, /* ms */
250 },
251 };
252
253 static const struct gpio_keys_platform_data mx51_efikamx_powerkey_data __initconst = {
254 .buttons = mx51_efikamx_powerkey,
255 .nbuttons = ARRAY_SIZE(mx51_efikamx_powerkey),
256 };
257
258 static struct mtd_partition mx51_efikamx_spi_nor_partitions[] = {
259 {
260 .name = "u-boot",
261 .offset = 0,
262 .size = SZ_256K,
263 },
264 {
265 .name = "config",
266 .offset = MTDPART_OFS_APPEND,
267 .size = SZ_64K,
268 },
269 };
270
271 static struct flash_platform_data mx51_efikamx_spi_flash_data = {
272 .name = "spi_flash",
273 .parts = mx51_efikamx_spi_nor_partitions,
274 .nr_parts = ARRAY_SIZE(mx51_efikamx_spi_nor_partitions),
275 .type = "sst25vf032b",
276 };
277
278 static struct spi_board_info mx51_efikamx_spi_board_info[] __initdata = {
279 {
280 .modalias = "m25p80",
281 .max_speed_hz = 25000000,
282 .bus_num = 0,
283 .chip_select = 1,
284 .platform_data = &mx51_efikamx_spi_flash_data,
285 .irq = -1,
286 },
287 };
288
289 static int mx51_efikamx_spi_cs[] = {
290 EFIKAMX_SPI_CS0,
291 EFIKAMX_SPI_CS1,
292 };
293
294 static const struct spi_imx_master mx51_efikamx_spi_pdata __initconst = {
295 .chipselect = mx51_efikamx_spi_cs,
296 .num_chipselect = ARRAY_SIZE(mx51_efikamx_spi_cs),
297 };
298
299 static void __init mxc_board_init(void)
300 {
301 mxc_iomux_v3_setup_multiple_pads(mx51efikamx_pads,
302 ARRAY_SIZE(mx51efikamx_pads));
303 mx51_efikamx_board_id();
304 mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config);
305 mxc_init_imx_uart();
306 imx51_add_esdhc(0, NULL);
307
308 /* on < 1.2 boards both SD controllers are used */
309 if (system_rev < 0x12) {
310 imx51_add_esdhc(1, NULL);
311 mx51_efikamx_leds[2].default_trigger = "mmc1";
312 }
313
314 platform_device_register(&mx51_efikamx_leds_device);
315 imx51_add_gpio_keys(&mx51_efikamx_powerkey_data);
316
317 spi_register_board_info(mx51_efikamx_spi_board_info,
318 ARRAY_SIZE(mx51_efikamx_spi_board_info));
319 imx51_add_ecspi(0, &mx51_efikamx_spi_pdata);
320 }
321
322 static void __init mx51_efikamx_timer_init(void)
323 {
324 mx51_clocks_init(32768, 24000000, 22579200, 24576000);
325 }
326
327 static struct sys_timer mxc_timer = {
328 .init = mx51_efikamx_timer_init,
329 };
330
331 MACHINE_START(MX51_EFIKAMX, "Genesi EfikaMX nettop")
332 /* Maintainer: Amit Kucheria <amit.kucheria@linaro.org> */
333 .boot_params = MX51_PHYS_OFFSET + 0x100,
334 .map_io = mx51_map_io,
335 .init_irq = mx51_init_irq,
336 .init_machine = mxc_board_init,
337 .timer = &mxc_timer,
338 MACHINE_END
This page took 0.212621 seconds and 5 git commands to generate.