2 * Copyright (C) 2010 Linaro Limited
4 * based on code from the following
5 * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
6 * Copyright 2009-2010 Pegatron Corporation. All Rights Reserved.
7 * Copyright 2009-2010 Genesi USA, Inc. All Rights Reserved.
9 * The code contained herein is licensed under the GNU General Public
10 * License. You may obtain a copy of the GNU General Public License
11 * Version 2 or later at the following locations:
13 * http://www.opensource.org/licenses/gpl-license.html
14 * http://www.gnu.org/copyleft/gpl.html
17 #include <linux/init.h>
18 #include <linux/platform_device.h>
19 #include <linux/i2c.h>
20 #include <linux/gpio.h>
21 #include <linux/leds.h>
22 #include <linux/input.h>
23 #include <linux/delay.h>
25 #include <linux/fsl_devices.h>
26 #include <linux/spi/flash.h>
27 #include <linux/spi/spi.h>
29 #include <mach/common.h>
30 #include <mach/hardware.h>
31 #include <mach/iomux-mx51.h>
33 #include <mach/mxc_ehci.h>
36 #include <asm/setup.h>
37 #include <asm/mach-types.h>
38 #include <asm/mach/arch.h>
39 #include <asm/mach/time.h>
41 #include "devices-imx51.h"
44 #define MX51_USB_PLL_DIV_24_MHZ 0x01
46 #define EFIKAMX_PCBID0 (2*32 + 16)
47 #define EFIKAMX_PCBID1 (2*32 + 17)
48 #define EFIKAMX_PCBID2 (2*32 + 11)
50 #define EFIKAMX_BLUE_LED (2*32 + 13)
51 #define EFIKAMX_GREEN_LED (2*32 + 14)
52 #define EFIKAMX_RED_LED (2*32 + 15)
54 #define EFIKAMX_POWER_KEY (1*32 + 31)
56 #define EFIKAMX_SPI_CS0 (3*32 + 24)
57 #define EFIKAMX_SPI_CS1 (3*32 + 25)
59 /* the pci ids pin have pull up. they're driven low according to board id */
60 #define MX51_PAD_PCBID0 IOMUX_PAD(0x518, 0x130, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
61 #define MX51_PAD_PCBID1 IOMUX_PAD(0x51C, 0x134, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
62 #define MX51_PAD_PCBID2 IOMUX_PAD(0x504, 0x128, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
63 #define MX51_PAD_PWRKEY IOMUX_PAD(0x48c, 0x0f8, 1, 0x0, 0, PAD_CTL_PUS_100K_UP | PAD_CTL_PKE)
65 static iomux_v3_cfg_t mx51efikamx_pads
[] = {
67 MX51_PAD_UART1_RXD__UART1_RXD
,
68 MX51_PAD_UART1_TXD__UART1_TXD
,
69 MX51_PAD_UART1_RTS__UART1_RTS
,
70 MX51_PAD_UART1_CTS__UART1_CTS
,
77 MX51_PAD_SD1_CMD__SD1_CMD
,
78 MX51_PAD_SD1_CLK__SD1_CLK
,
79 MX51_PAD_SD1_DATA0__SD1_DATA0
,
80 MX51_PAD_SD1_DATA1__SD1_DATA1
,
81 MX51_PAD_SD1_DATA2__SD1_DATA2
,
82 MX51_PAD_SD1_DATA3__SD1_DATA3
,
85 MX51_PAD_SD2_CMD__SD2_CMD
,
86 MX51_PAD_SD2_CLK__SD2_CLK
,
87 MX51_PAD_SD2_DATA0__SD2_DATA0
,
88 MX51_PAD_SD2_DATA1__SD2_DATA1
,
89 MX51_PAD_SD2_DATA2__SD2_DATA2
,
90 MX51_PAD_SD2_DATA3__SD2_DATA3
,
93 MX51_PAD_GPIO_1_0__ESDHC1_CD
,
94 MX51_PAD_GPIO_1_1__ESDHC1_WP
,
95 MX51_PAD_GPIO_1_7__ESDHC2_WP
,
96 MX51_PAD_GPIO_1_8__ESDHC2_CD
,
99 MX51_PAD_CSI1_D9__GPIO_3_13
,
100 MX51_PAD_CSI1_VSYNC__GPIO_3_14
,
101 MX51_PAD_CSI1_HSYNC__GPIO_3_15
,
107 MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI
,
108 MX51_PAD_CSPI1_MISO__ECSPI1_MISO
,
109 MX51_PAD_CSPI1_SS0__GPIO_4_24
,
110 MX51_PAD_CSPI1_SS1__GPIO_4_25
,
111 MX51_PAD_CSPI1_RDY__ECSPI1_RDY
,
112 MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK
,
116 #if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
117 static const struct imxuart_platform_data uart_pdata
= {
118 .flags
= IMXUART_HAVE_RTSCTS
,
121 static inline void mxc_init_imx_uart(void)
123 imx51_add_imx_uart(0, &uart_pdata
);
124 imx51_add_imx_uart(1, &uart_pdata
);
125 imx51_add_imx_uart(2, &uart_pdata
);
127 #else /* !SERIAL_IMX */
128 static inline void mxc_init_imx_uart(void)
131 #endif /* SERIAL_IMX */
133 /* This function is board specific as the bit mask for the plldiv will also
134 * be different for other Freescale SoCs, thus a common bitmask is not
135 * possible and cannot get place in /plat-mxc/ehci.c.
137 static int initialize_otg_port(struct platform_device
*pdev
)
140 void __iomem
*usb_base
;
141 void __iomem
*usbother_base
;
142 usb_base
= ioremap(MX51_OTG_BASE_ADDR
, SZ_4K
);
143 usbother_base
= (void __iomem
*)(usb_base
+ MX5_USBOTHER_REGS_OFFSET
);
145 /* Set the PHY clock to 19.2MHz */
146 v
= __raw_readl(usbother_base
+ MXC_USB_PHY_CTR_FUNC2_OFFSET
);
147 v
&= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK
;
148 v
|= MX51_USB_PLL_DIV_24_MHZ
;
149 __raw_writel(v
, usbother_base
+ MXC_USB_PHY_CTR_FUNC2_OFFSET
);
154 static struct mxc_usbh_platform_data dr_utmi_config
= {
155 .init
= initialize_otg_port
,
156 .portsc
= MXC_EHCI_UTMI_16BIT
,
157 .flags
= MXC_EHCI_INTERNAL_PHY
,
160 /* PCBID2 PCBID1 PCBID0 STATE
166 static void __init
mx51_efikamx_board_id(void)
170 /* things are taking time to settle */
173 gpio_request(EFIKAMX_PCBID0
, "pcbid0");
174 gpio_direction_input(EFIKAMX_PCBID0
);
175 gpio_request(EFIKAMX_PCBID1
, "pcbid1");
176 gpio_direction_input(EFIKAMX_PCBID1
);
177 gpio_request(EFIKAMX_PCBID2
, "pcbid2");
178 gpio_direction_input(EFIKAMX_PCBID2
);
180 id
= gpio_get_value(EFIKAMX_PCBID0
);
181 id
|= gpio_get_value(EFIKAMX_PCBID1
) << 1;
182 id
|= gpio_get_value(EFIKAMX_PCBID2
) << 2;
202 if ((system_rev
== 0x10)
203 || (system_rev
== 0x12)
204 || (system_rev
== 0x14)) {
206 "EfikaMX: Unsupported board revision 1.%u!\n",
211 static struct gpio_led mx51_efikamx_leds
[] = {
213 .name
= "efikamx:green",
214 .default_trigger
= "default-on",
215 .gpio
= EFIKAMX_GREEN_LED
,
218 .name
= "efikamx:red",
219 .default_trigger
= "ide-disk",
220 .gpio
= EFIKAMX_RED_LED
,
223 .name
= "efikamx:blue",
224 .default_trigger
= "mmc0",
225 .gpio
= EFIKAMX_BLUE_LED
,
229 static struct gpio_led_platform_data mx51_efikamx_leds_data
= {
230 .leds
= mx51_efikamx_leds
,
231 .num_leds
= ARRAY_SIZE(mx51_efikamx_leds
),
234 static struct platform_device mx51_efikamx_leds_device
= {
238 .platform_data
= &mx51_efikamx_leds_data
,
242 static struct gpio_keys_button mx51_efikamx_powerkey
[] = {
245 .gpio
= EFIKAMX_POWER_KEY
,
247 .desc
= "Power Button (CM)",
249 .debounce_interval
= 10, /* ms */
253 static const struct gpio_keys_platform_data mx51_efikamx_powerkey_data __initconst
= {
254 .buttons
= mx51_efikamx_powerkey
,
255 .nbuttons
= ARRAY_SIZE(mx51_efikamx_powerkey
),
258 static struct mtd_partition mx51_efikamx_spi_nor_partitions
[] = {
266 .offset
= MTDPART_OFS_APPEND
,
271 static struct flash_platform_data mx51_efikamx_spi_flash_data
= {
273 .parts
= mx51_efikamx_spi_nor_partitions
,
274 .nr_parts
= ARRAY_SIZE(mx51_efikamx_spi_nor_partitions
),
275 .type
= "sst25vf032b",
278 static struct spi_board_info mx51_efikamx_spi_board_info
[] __initdata
= {
280 .modalias
= "m25p80",
281 .max_speed_hz
= 25000000,
284 .platform_data
= &mx51_efikamx_spi_flash_data
,
289 static int mx51_efikamx_spi_cs
[] = {
294 static const struct spi_imx_master mx51_efikamx_spi_pdata __initconst
= {
295 .chipselect
= mx51_efikamx_spi_cs
,
296 .num_chipselect
= ARRAY_SIZE(mx51_efikamx_spi_cs
),
299 static void __init
mxc_board_init(void)
301 mxc_iomux_v3_setup_multiple_pads(mx51efikamx_pads
,
302 ARRAY_SIZE(mx51efikamx_pads
));
303 mx51_efikamx_board_id();
304 mxc_register_device(&mxc_usbdr_host_device
, &dr_utmi_config
);
306 imx51_add_esdhc(0, NULL
);
308 /* on < 1.2 boards both SD controllers are used */
309 if (system_rev
< 0x12) {
310 imx51_add_esdhc(1, NULL
);
311 mx51_efikamx_leds
[2].default_trigger
= "mmc1";
314 platform_device_register(&mx51_efikamx_leds_device
);
315 imx51_add_gpio_keys(&mx51_efikamx_powerkey_data
);
317 spi_register_board_info(mx51_efikamx_spi_board_info
,
318 ARRAY_SIZE(mx51_efikamx_spi_board_info
));
319 imx51_add_ecspi(0, &mx51_efikamx_spi_pdata
);
322 static void __init
mx51_efikamx_timer_init(void)
324 mx51_clocks_init(32768, 24000000, 22579200, 24576000);
327 static struct sys_timer mxc_timer
= {
328 .init
= mx51_efikamx_timer_init
,
331 MACHINE_START(MX51_EFIKAMX
, "Genesi EfikaMX nettop")
332 /* Maintainer: Amit Kucheria <amit.kucheria@linaro.org> */
333 .boot_params
= MX51_PHYS_OFFSET
+ 0x100,
334 .map_io
= mx51_map_io
,
335 .init_irq
= mx51_init_irq
,
336 .init_machine
= mxc_board_init
,