arm: remove machine_desc.io_pg_offst and .phys_io
[deliverable/linux.git] / arch / arm / mach-omap2 / board-cm-t35.c
1 /*
2 * board-cm-t35.c (CompuLab CM-T35 module)
3 *
4 * Copyright (C) 2009 CompuLab, Ltd.
5 * Author: Mike Rapoport <mike@compulab.co.il>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
19 * 02110-1301 USA
20 *
21 */
22
23 #include <linux/kernel.h>
24 #include <linux/init.h>
25 #include <linux/platform_device.h>
26 #include <linux/input.h>
27 #include <linux/input/matrix_keypad.h>
28 #include <linux/delay.h>
29 #include <linux/gpio.h>
30
31 #include <linux/i2c/at24.h>
32 #include <linux/i2c/twl.h>
33 #include <linux/regulator/machine.h>
34
35 #include <linux/spi/spi.h>
36 #include <linux/spi/tdo24m.h>
37
38 #include <asm/mach-types.h>
39 #include <asm/mach/arch.h>
40 #include <asm/mach/map.h>
41
42 #include <plat/board.h>
43 #include <plat/common.h>
44 #include <plat/nand.h>
45 #include <plat/gpmc.h>
46 #include <plat/usb.h>
47 #include <plat/display.h>
48 #include <plat/mcspi.h>
49
50 #include <mach/hardware.h>
51
52 #include "mux.h"
53 #include "sdram-micron-mt46h32m32lf-6.h"
54 #include "hsmmc.h"
55
56 #define CM_T35_GPIO_PENDOWN 57
57
58 #define CM_T35_SMSC911X_CS 5
59 #define CM_T35_SMSC911X_GPIO 163
60 #define SB_T35_SMSC911X_CS 4
61 #define SB_T35_SMSC911X_GPIO 65
62
63 #define NAND_BLOCK_SIZE SZ_128K
64
65 #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
66 #include <linux/smsc911x.h>
67
68 static struct smsc911x_platform_config cm_t35_smsc911x_config = {
69 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
70 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
71 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
72 .phy_interface = PHY_INTERFACE_MODE_MII,
73 };
74
75 static struct resource cm_t35_smsc911x_resources[] = {
76 {
77 .flags = IORESOURCE_MEM,
78 },
79 {
80 .start = OMAP_GPIO_IRQ(CM_T35_SMSC911X_GPIO),
81 .end = OMAP_GPIO_IRQ(CM_T35_SMSC911X_GPIO),
82 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
83 },
84 };
85
86 static struct platform_device cm_t35_smsc911x_device = {
87 .name = "smsc911x",
88 .id = 0,
89 .num_resources = ARRAY_SIZE(cm_t35_smsc911x_resources),
90 .resource = cm_t35_smsc911x_resources,
91 .dev = {
92 .platform_data = &cm_t35_smsc911x_config,
93 },
94 };
95
96 static struct resource sb_t35_smsc911x_resources[] = {
97 {
98 .flags = IORESOURCE_MEM,
99 },
100 {
101 .start = OMAP_GPIO_IRQ(SB_T35_SMSC911X_GPIO),
102 .end = OMAP_GPIO_IRQ(SB_T35_SMSC911X_GPIO),
103 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
104 },
105 };
106
107 static struct platform_device sb_t35_smsc911x_device = {
108 .name = "smsc911x",
109 .id = 1,
110 .num_resources = ARRAY_SIZE(sb_t35_smsc911x_resources),
111 .resource = sb_t35_smsc911x_resources,
112 .dev = {
113 .platform_data = &cm_t35_smsc911x_config,
114 },
115 };
116
117 static void __init cm_t35_init_smsc911x(struct platform_device *dev,
118 int cs, int irq_gpio)
119 {
120 unsigned long cs_mem_base;
121
122 if (gpmc_cs_request(cs, SZ_16M, &cs_mem_base) < 0) {
123 pr_err("CM-T35: Failed request for GPMC mem for smsc911x\n");
124 return;
125 }
126
127 dev->resource[0].start = cs_mem_base + 0x0;
128 dev->resource[0].end = cs_mem_base + 0xff;
129
130 if ((gpio_request(irq_gpio, "ETH IRQ") == 0) &&
131 (gpio_direction_input(irq_gpio) == 0)) {
132 gpio_export(irq_gpio, 0);
133 } else {
134 pr_err("CM-T35: could not obtain gpio for SMSC911X IRQ\n");
135 return;
136 }
137
138 platform_device_register(dev);
139 }
140
141 static void __init cm_t35_init_ethernet(void)
142 {
143 cm_t35_init_smsc911x(&cm_t35_smsc911x_device,
144 CM_T35_SMSC911X_CS, CM_T35_SMSC911X_GPIO);
145 cm_t35_init_smsc911x(&sb_t35_smsc911x_device,
146 SB_T35_SMSC911X_CS, SB_T35_SMSC911X_GPIO);
147 }
148 #else
149 static inline void __init cm_t35_init_ethernet(void) { return; }
150 #endif
151
152 #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
153 #include <linux/leds.h>
154
155 static struct gpio_led cm_t35_leds[] = {
156 [0] = {
157 .gpio = 186,
158 .name = "cm-t35:green",
159 .default_trigger = "heartbeat",
160 .active_low = 0,
161 },
162 };
163
164 static struct gpio_led_platform_data cm_t35_led_pdata = {
165 .num_leds = ARRAY_SIZE(cm_t35_leds),
166 .leds = cm_t35_leds,
167 };
168
169 static struct platform_device cm_t35_led_device = {
170 .name = "leds-gpio",
171 .id = -1,
172 .dev = {
173 .platform_data = &cm_t35_led_pdata,
174 },
175 };
176
177 static void __init cm_t35_init_led(void)
178 {
179 platform_device_register(&cm_t35_led_device);
180 }
181 #else
182 static inline void cm_t35_init_led(void) {}
183 #endif
184
185 #if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
186 #include <linux/mtd/mtd.h>
187 #include <linux/mtd/nand.h>
188 #include <linux/mtd/partitions.h>
189
190 static struct mtd_partition cm_t35_nand_partitions[] = {
191 {
192 .name = "xloader",
193 .offset = 0, /* Offset = 0x00000 */
194 .size = 4 * NAND_BLOCK_SIZE,
195 .mask_flags = MTD_WRITEABLE
196 },
197 {
198 .name = "uboot",
199 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
200 .size = 15 * NAND_BLOCK_SIZE,
201 },
202 {
203 .name = "uboot environment",
204 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
205 .size = 2 * NAND_BLOCK_SIZE,
206 },
207 {
208 .name = "linux",
209 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
210 .size = 32 * NAND_BLOCK_SIZE,
211 },
212 {
213 .name = "rootfs",
214 .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
215 .size = MTDPART_SIZ_FULL,
216 },
217 };
218
219 static struct omap_nand_platform_data cm_t35_nand_data = {
220 .parts = cm_t35_nand_partitions,
221 .nr_parts = ARRAY_SIZE(cm_t35_nand_partitions),
222 .dma_channel = -1, /* disable DMA in OMAP NAND driver */
223 .cs = 0,
224
225 };
226
227 static void __init cm_t35_init_nand(void)
228 {
229 if (gpmc_nand_init(&cm_t35_nand_data) < 0)
230 pr_err("CM-T35: Unable to register NAND device\n");
231 }
232 #else
233 static inline void cm_t35_init_nand(void) {}
234 #endif
235
236 #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
237 defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
238 #include <linux/spi/ads7846.h>
239
240 #include <plat/mcspi.h>
241
242 static struct omap2_mcspi_device_config ads7846_mcspi_config = {
243 .turbo_mode = 0,
244 .single_channel = 1, /* 0: slave, 1: master */
245 };
246
247 static int ads7846_get_pendown_state(void)
248 {
249 return !gpio_get_value(CM_T35_GPIO_PENDOWN);
250 }
251
252 static struct ads7846_platform_data ads7846_config = {
253 .x_max = 0x0fff,
254 .y_max = 0x0fff,
255 .x_plate_ohms = 180,
256 .pressure_max = 255,
257 .debounce_max = 10,
258 .debounce_tol = 3,
259 .debounce_rep = 1,
260 .get_pendown_state = ads7846_get_pendown_state,
261 .keep_vref_on = 1,
262 };
263
264 static struct spi_board_info cm_t35_spi_board_info[] __initdata = {
265 {
266 .modalias = "ads7846",
267 .bus_num = 1,
268 .chip_select = 0,
269 .max_speed_hz = 1500000,
270 .controller_data = &ads7846_mcspi_config,
271 .irq = OMAP_GPIO_IRQ(CM_T35_GPIO_PENDOWN),
272 .platform_data = &ads7846_config,
273 },
274 };
275
276 static void __init cm_t35_init_ads7846(void)
277 {
278 if ((gpio_request(CM_T35_GPIO_PENDOWN, "ADS7846_PENDOWN") == 0) &&
279 (gpio_direction_input(CM_T35_GPIO_PENDOWN) == 0)) {
280 gpio_export(CM_T35_GPIO_PENDOWN, 0);
281 } else {
282 pr_err("CM-T35: could not obtain gpio for ADS7846_PENDOWN\n");
283 return;
284 }
285
286 spi_register_board_info(cm_t35_spi_board_info,
287 ARRAY_SIZE(cm_t35_spi_board_info));
288 }
289 #else
290 static inline void cm_t35_init_ads7846(void) {}
291 #endif
292
293 #define CM_T35_LCD_EN_GPIO 157
294 #define CM_T35_LCD_BL_GPIO 58
295 #define CM_T35_DVI_EN_GPIO 54
296
297 static int lcd_bl_gpio;
298 static int lcd_en_gpio;
299 static int dvi_en_gpio;
300
301 static int lcd_enabled;
302 static int dvi_enabled;
303
304 static int cm_t35_panel_enable_lcd(struct omap_dss_device *dssdev)
305 {
306 if (dvi_enabled) {
307 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
308 return -EINVAL;
309 }
310
311 gpio_set_value(lcd_en_gpio, 1);
312 gpio_set_value(lcd_bl_gpio, 1);
313
314 lcd_enabled = 1;
315
316 return 0;
317 }
318
319 static void cm_t35_panel_disable_lcd(struct omap_dss_device *dssdev)
320 {
321 lcd_enabled = 0;
322
323 gpio_set_value(lcd_bl_gpio, 0);
324 gpio_set_value(lcd_en_gpio, 0);
325 }
326
327 static int cm_t35_panel_enable_dvi(struct omap_dss_device *dssdev)
328 {
329 if (lcd_enabled) {
330 printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
331 return -EINVAL;
332 }
333
334 gpio_set_value(dvi_en_gpio, 0);
335 dvi_enabled = 1;
336
337 return 0;
338 }
339
340 static void cm_t35_panel_disable_dvi(struct omap_dss_device *dssdev)
341 {
342 gpio_set_value(dvi_en_gpio, 1);
343 dvi_enabled = 0;
344 }
345
346 static int cm_t35_panel_enable_tv(struct omap_dss_device *dssdev)
347 {
348 return 0;
349 }
350
351 static void cm_t35_panel_disable_tv(struct omap_dss_device *dssdev)
352 {
353 }
354
355 static struct omap_dss_device cm_t35_lcd_device = {
356 .name = "lcd",
357 .driver_name = "toppoly_tdo35s_panel",
358 .type = OMAP_DISPLAY_TYPE_DPI,
359 .phy.dpi.data_lines = 18,
360 .platform_enable = cm_t35_panel_enable_lcd,
361 .platform_disable = cm_t35_panel_disable_lcd,
362 };
363
364 static struct omap_dss_device cm_t35_dvi_device = {
365 .name = "dvi",
366 .driver_name = "generic_panel",
367 .type = OMAP_DISPLAY_TYPE_DPI,
368 .phy.dpi.data_lines = 24,
369 .platform_enable = cm_t35_panel_enable_dvi,
370 .platform_disable = cm_t35_panel_disable_dvi,
371 };
372
373 static struct omap_dss_device cm_t35_tv_device = {
374 .name = "tv",
375 .driver_name = "venc",
376 .type = OMAP_DISPLAY_TYPE_VENC,
377 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
378 .platform_enable = cm_t35_panel_enable_tv,
379 .platform_disable = cm_t35_panel_disable_tv,
380 };
381
382 static struct omap_dss_device *cm_t35_dss_devices[] = {
383 &cm_t35_lcd_device,
384 &cm_t35_dvi_device,
385 &cm_t35_tv_device,
386 };
387
388 static struct omap_dss_board_info cm_t35_dss_data = {
389 .num_devices = ARRAY_SIZE(cm_t35_dss_devices),
390 .devices = cm_t35_dss_devices,
391 .default_device = &cm_t35_dvi_device,
392 };
393
394 static struct platform_device cm_t35_dss_device = {
395 .name = "omapdss",
396 .id = -1,
397 .dev = {
398 .platform_data = &cm_t35_dss_data,
399 },
400 };
401
402 static struct omap2_mcspi_device_config tdo24m_mcspi_config = {
403 .turbo_mode = 0,
404 .single_channel = 1, /* 0: slave, 1: master */
405 };
406
407 static struct tdo24m_platform_data tdo24m_config = {
408 .model = TDO35S,
409 };
410
411 static struct spi_board_info cm_t35_lcd_spi_board_info[] __initdata = {
412 {
413 .modalias = "tdo24m",
414 .bus_num = 4,
415 .chip_select = 0,
416 .max_speed_hz = 1000000,
417 .controller_data = &tdo24m_mcspi_config,
418 .platform_data = &tdo24m_config,
419 },
420 };
421
422 static void __init cm_t35_init_display(void)
423 {
424 int err;
425
426 lcd_en_gpio = CM_T35_LCD_EN_GPIO;
427 lcd_bl_gpio = CM_T35_LCD_BL_GPIO;
428 dvi_en_gpio = CM_T35_DVI_EN_GPIO;
429
430 spi_register_board_info(cm_t35_lcd_spi_board_info,
431 ARRAY_SIZE(cm_t35_lcd_spi_board_info));
432
433 err = gpio_request(lcd_en_gpio, "LCD RST");
434 if (err) {
435 pr_err("CM-T35: failed to get LCD reset GPIO\n");
436 goto out;
437 }
438
439 err = gpio_request(lcd_bl_gpio, "LCD BL");
440 if (err) {
441 pr_err("CM-T35: failed to get LCD backlight control GPIO\n");
442 goto err_lcd_bl;
443 }
444
445 err = gpio_request(dvi_en_gpio, "DVI EN");
446 if (err) {
447 pr_err("CM-T35: failed to get DVI reset GPIO\n");
448 goto err_dvi_en;
449 }
450
451 gpio_export(lcd_en_gpio, 0);
452 gpio_export(lcd_bl_gpio, 0);
453 gpio_export(dvi_en_gpio, 0);
454 gpio_direction_output(lcd_en_gpio, 0);
455 gpio_direction_output(lcd_bl_gpio, 0);
456 gpio_direction_output(dvi_en_gpio, 1);
457
458 msleep(50);
459 gpio_set_value(lcd_en_gpio, 1);
460
461 err = platform_device_register(&cm_t35_dss_device);
462 if (err) {
463 pr_err("CM-T35: failed to register DSS device\n");
464 goto err_dev_reg;
465 }
466
467 return;
468
469 err_dev_reg:
470 gpio_free(dvi_en_gpio);
471 err_dvi_en:
472 gpio_free(lcd_bl_gpio);
473 err_lcd_bl:
474 gpio_free(lcd_en_gpio);
475 out:
476
477 return;
478 }
479
480 static struct regulator_consumer_supply cm_t35_vmmc1_supply = {
481 .supply = "vmmc",
482 };
483
484 static struct regulator_consumer_supply cm_t35_vsim_supply = {
485 .supply = "vmmc_aux",
486 };
487
488 static struct regulator_consumer_supply cm_t35_vdac_supply = {
489 .supply = "vdda_dac",
490 .dev = &cm_t35_dss_device.dev,
491 };
492
493 static struct regulator_consumer_supply cm_t35_vdvi_supply = {
494 .supply = "vdvi",
495 .dev = &cm_t35_dss_device.dev,
496 };
497
498 /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
499 static struct regulator_init_data cm_t35_vmmc1 = {
500 .constraints = {
501 .min_uV = 1850000,
502 .max_uV = 3150000,
503 .valid_modes_mask = REGULATOR_MODE_NORMAL
504 | REGULATOR_MODE_STANDBY,
505 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
506 | REGULATOR_CHANGE_MODE
507 | REGULATOR_CHANGE_STATUS,
508 },
509 .num_consumer_supplies = 1,
510 .consumer_supplies = &cm_t35_vmmc1_supply,
511 };
512
513 /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
514 static struct regulator_init_data cm_t35_vsim = {
515 .constraints = {
516 .min_uV = 1800000,
517 .max_uV = 3000000,
518 .valid_modes_mask = REGULATOR_MODE_NORMAL
519 | REGULATOR_MODE_STANDBY,
520 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
521 | REGULATOR_CHANGE_MODE
522 | REGULATOR_CHANGE_STATUS,
523 },
524 .num_consumer_supplies = 1,
525 .consumer_supplies = &cm_t35_vsim_supply,
526 };
527
528 /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
529 static struct regulator_init_data cm_t35_vdac = {
530 .constraints = {
531 .min_uV = 1800000,
532 .max_uV = 1800000,
533 .valid_modes_mask = REGULATOR_MODE_NORMAL
534 | REGULATOR_MODE_STANDBY,
535 .valid_ops_mask = REGULATOR_CHANGE_MODE
536 | REGULATOR_CHANGE_STATUS,
537 },
538 .num_consumer_supplies = 1,
539 .consumer_supplies = &cm_t35_vdac_supply,
540 };
541
542 /* VPLL2 for digital video outputs */
543 static struct regulator_init_data cm_t35_vpll2 = {
544 .constraints = {
545 .name = "VDVI",
546 .min_uV = 1800000,
547 .max_uV = 1800000,
548 .valid_modes_mask = REGULATOR_MODE_NORMAL
549 | REGULATOR_MODE_STANDBY,
550 .valid_ops_mask = REGULATOR_CHANGE_MODE
551 | REGULATOR_CHANGE_STATUS,
552 },
553 .num_consumer_supplies = 1,
554 .consumer_supplies = &cm_t35_vdvi_supply,
555 };
556
557 static struct twl4030_usb_data cm_t35_usb_data = {
558 .usb_mode = T2_USB_MODE_ULPI,
559 };
560
561 static int cm_t35_keymap[] = {
562 KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT),
563 KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN),
564 KEY(2, 0, KEY_RIGHT), KEY(2, 1, KEY_C), KEY(2, 2, KEY_D),
565 };
566
567 static struct matrix_keymap_data cm_t35_keymap_data = {
568 .keymap = cm_t35_keymap,
569 .keymap_size = ARRAY_SIZE(cm_t35_keymap),
570 };
571
572 static struct twl4030_keypad_data cm_t35_kp_data = {
573 .keymap_data = &cm_t35_keymap_data,
574 .rows = 3,
575 .cols = 3,
576 .rep = 1,
577 };
578
579 static struct omap2_hsmmc_info mmc[] = {
580 {
581 .mmc = 1,
582 .wires = 4,
583 .gpio_cd = -EINVAL,
584 .gpio_wp = -EINVAL,
585
586 },
587 {
588 .mmc = 2,
589 .wires = 4,
590 .transceiver = 1,
591 .gpio_cd = -EINVAL,
592 .gpio_wp = -EINVAL,
593 .ocr_mask = 0x00100000, /* 3.3V */
594 },
595 {} /* Terminator */
596 };
597
598 static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = {
599 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
600 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
601 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
602
603 .phy_reset = true,
604 .reset_gpio_port[0] = -EINVAL,
605 .reset_gpio_port[1] = -EINVAL,
606 .reset_gpio_port[2] = -EINVAL
607 };
608
609 static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
610 unsigned ngpio)
611 {
612 int wlan_rst = gpio + 2;
613
614 if ((gpio_request(wlan_rst, "WLAN RST") == 0) &&
615 (gpio_direction_output(wlan_rst, 1) == 0)) {
616 gpio_export(wlan_rst, 0);
617
618 udelay(10);
619 gpio_set_value(wlan_rst, 0);
620 udelay(10);
621 gpio_set_value(wlan_rst, 1);
622 } else {
623 pr_err("CM-T35: could not obtain gpio for WiFi reset\n");
624 }
625
626 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
627 mmc[0].gpio_cd = gpio + 0;
628 omap2_hsmmc_init(mmc);
629
630 /* link regulators to MMC adapters */
631 cm_t35_vmmc1_supply.dev = mmc[0].dev;
632 cm_t35_vsim_supply.dev = mmc[0].dev;
633
634 /* setup USB with proper PHY reset GPIOs */
635 ehci_pdata.reset_gpio_port[0] = gpio + 6;
636 ehci_pdata.reset_gpio_port[1] = gpio + 7;
637
638 usb_ehci_init(&ehci_pdata);
639
640 return 0;
641 }
642
643 static struct twl4030_gpio_platform_data cm_t35_gpio_data = {
644 .gpio_base = OMAP_MAX_GPIO_LINES,
645 .irq_base = TWL4030_GPIO_IRQ_BASE,
646 .irq_end = TWL4030_GPIO_IRQ_END,
647 .setup = cm_t35_twl_gpio_setup,
648 };
649
650 static struct twl4030_platform_data cm_t35_twldata = {
651 .irq_base = TWL4030_IRQ_BASE,
652 .irq_end = TWL4030_IRQ_END,
653
654 /* platform_data for children goes here */
655 .keypad = &cm_t35_kp_data,
656 .usb = &cm_t35_usb_data,
657 .gpio = &cm_t35_gpio_data,
658 .vmmc1 = &cm_t35_vmmc1,
659 .vsim = &cm_t35_vsim,
660 .vdac = &cm_t35_vdac,
661 .vpll2 = &cm_t35_vpll2,
662 };
663
664 static struct i2c_board_info __initdata cm_t35_i2c_boardinfo[] = {
665 {
666 I2C_BOARD_INFO("tps65930", 0x48),
667 .flags = I2C_CLIENT_WAKE,
668 .irq = INT_34XX_SYS_NIRQ,
669 .platform_data = &cm_t35_twldata,
670 },
671 };
672
673 static void __init cm_t35_init_i2c(void)
674 {
675 omap_register_i2c_bus(1, 2600, cm_t35_i2c_boardinfo,
676 ARRAY_SIZE(cm_t35_i2c_boardinfo));
677 }
678
679 static struct omap_board_config_kernel cm_t35_config[] __initdata = {
680 };
681
682 static void __init cm_t35_init_irq(void)
683 {
684 omap_board_config = cm_t35_config;
685 omap_board_config_size = ARRAY_SIZE(cm_t35_config);
686
687 omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
688 mt46h32m32lf6_sdrc_params);
689 omap_init_irq();
690 omap_gpio_init();
691 }
692
693 static struct omap_board_mux board_mux[] __initdata = {
694 /* nCS and IRQ for CM-T35 ethernet */
695 OMAP3_MUX(GPMC_NCS5, OMAP_MUX_MODE0),
696 OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
697
698 /* nCS and IRQ for SB-T35 ethernet */
699 OMAP3_MUX(GPMC_NCS4, OMAP_MUX_MODE0),
700 OMAP3_MUX(GPMC_WAIT3, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
701
702 /* PENDOWN GPIO */
703 OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
704
705 /* mUSB */
706 OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
707 OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
708 OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
709 OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
710 OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
711 OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
712 OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
713 OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
714 OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
715 OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
716 OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
717 OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
718
719 /* MMC 2 */
720 OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
721 OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
722 OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
723 OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
724
725 /* McSPI 1 */
726 OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
727 OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
728 OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
729 OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
730
731 /* McSPI 4 */
732 OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
733 OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
734 OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
735 OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
736
737 /* McBSP 2 */
738 OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
739 OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
740 OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
741 OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
742
743 /* serial ports */
744 OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
745 OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
746 OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
747 OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
748
749 /* DSS */
750 OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
751 OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
752 OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
753 OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
754 OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
755 OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
756 OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
757 OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
758 OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
759 OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
760 OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
761 OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
762 OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
763 OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
764 OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
765 OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
766 OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
767 OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
768 OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
769 OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
770 OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
771 OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
772 OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
773 OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
774 OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
775 OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
776 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
777 OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
778
779 /* display controls */
780 OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
781 OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
782 OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
783
784 /* TPS IRQ */
785 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
786 OMAP_PIN_INPUT_PULLUP),
787
788 { .reg_offset = OMAP_MUX_TERMINATOR },
789 };
790
791 static struct omap_musb_board_data musb_board_data = {
792 .interface_type = MUSB_INTERFACE_ULPI,
793 .mode = MUSB_OTG,
794 .power = 100,
795 };
796
797 static void __init cm_t35_init(void)
798 {
799 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
800 omap_serial_init();
801 cm_t35_init_i2c();
802 cm_t35_init_nand();
803 cm_t35_init_ads7846();
804 cm_t35_init_ethernet();
805 cm_t35_init_led();
806 cm_t35_init_display();
807
808 usb_musb_init(&musb_board_data);
809 }
810
811 MACHINE_START(CM_T35, "Compulab CM-T35")
812 .boot_params = 0x80000100,
813 .map_io = omap3_map_io,
814 .reserve = omap_reserve,
815 .init_irq = cm_t35_init_irq,
816 .init_machine = cm_t35_init,
817 .timer = &omap_timer,
818 MACHINE_END
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