Merge branch 'pm-hwmods' of ssh://master.kernel.org/pub/scm/linux/kernel/git/khilman...
[deliverable/linux.git] / arch / arm / mach-omap2 / board-cm-t35.c
1 /*
2 * board-cm-t35.c (CompuLab CM-T35 module)
3 *
4 * Copyright (C) 2009 CompuLab, Ltd.
5 * Author: Mike Rapoport <mike@compulab.co.il>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
19 * 02110-1301 USA
20 *
21 */
22
23 #include <linux/kernel.h>
24 #include <linux/init.h>
25 #include <linux/platform_device.h>
26 #include <linux/input.h>
27 #include <linux/input/matrix_keypad.h>
28 #include <linux/delay.h>
29 #include <linux/gpio.h>
30
31 #include <linux/i2c/at24.h>
32 #include <linux/i2c/twl.h>
33 #include <linux/regulator/machine.h>
34 #include <linux/mmc/host.h>
35
36 #include <linux/spi/spi.h>
37 #include <linux/spi/tdo24m.h>
38
39 #include <asm/mach-types.h>
40 #include <asm/mach/arch.h>
41 #include <asm/mach/map.h>
42
43 #include <plat/board.h>
44 #include <plat/common.h>
45 #include <plat/nand.h>
46 #include <plat/gpmc.h>
47 #include <plat/usb.h>
48 #include <plat/display.h>
49 #include <plat/mcspi.h>
50
51 #include <mach/hardware.h>
52
53 #include "mux.h"
54 #include "sdram-micron-mt46h32m32lf-6.h"
55 #include "hsmmc.h"
56
57 #define CM_T35_GPIO_PENDOWN 57
58
59 #define CM_T35_SMSC911X_CS 5
60 #define CM_T35_SMSC911X_GPIO 163
61 #define SB_T35_SMSC911X_CS 4
62 #define SB_T35_SMSC911X_GPIO 65
63
64 #define NAND_BLOCK_SIZE SZ_128K
65
66 #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
67 #include <linux/smsc911x.h>
68
69 static struct smsc911x_platform_config cm_t35_smsc911x_config = {
70 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
71 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
72 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
73 .phy_interface = PHY_INTERFACE_MODE_MII,
74 };
75
76 static struct resource cm_t35_smsc911x_resources[] = {
77 {
78 .flags = IORESOURCE_MEM,
79 },
80 {
81 .start = OMAP_GPIO_IRQ(CM_T35_SMSC911X_GPIO),
82 .end = OMAP_GPIO_IRQ(CM_T35_SMSC911X_GPIO),
83 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
84 },
85 };
86
87 static struct platform_device cm_t35_smsc911x_device = {
88 .name = "smsc911x",
89 .id = 0,
90 .num_resources = ARRAY_SIZE(cm_t35_smsc911x_resources),
91 .resource = cm_t35_smsc911x_resources,
92 .dev = {
93 .platform_data = &cm_t35_smsc911x_config,
94 },
95 };
96
97 static struct resource sb_t35_smsc911x_resources[] = {
98 {
99 .flags = IORESOURCE_MEM,
100 },
101 {
102 .start = OMAP_GPIO_IRQ(SB_T35_SMSC911X_GPIO),
103 .end = OMAP_GPIO_IRQ(SB_T35_SMSC911X_GPIO),
104 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
105 },
106 };
107
108 static struct platform_device sb_t35_smsc911x_device = {
109 .name = "smsc911x",
110 .id = 1,
111 .num_resources = ARRAY_SIZE(sb_t35_smsc911x_resources),
112 .resource = sb_t35_smsc911x_resources,
113 .dev = {
114 .platform_data = &cm_t35_smsc911x_config,
115 },
116 };
117
118 static void __init cm_t35_init_smsc911x(struct platform_device *dev,
119 int cs, int irq_gpio)
120 {
121 unsigned long cs_mem_base;
122
123 if (gpmc_cs_request(cs, SZ_16M, &cs_mem_base) < 0) {
124 pr_err("CM-T35: Failed request for GPMC mem for smsc911x\n");
125 return;
126 }
127
128 dev->resource[0].start = cs_mem_base + 0x0;
129 dev->resource[0].end = cs_mem_base + 0xff;
130
131 if ((gpio_request(irq_gpio, "ETH IRQ") == 0) &&
132 (gpio_direction_input(irq_gpio) == 0)) {
133 gpio_export(irq_gpio, 0);
134 } else {
135 pr_err("CM-T35: could not obtain gpio for SMSC911X IRQ\n");
136 return;
137 }
138
139 platform_device_register(dev);
140 }
141
142 static void __init cm_t35_init_ethernet(void)
143 {
144 cm_t35_init_smsc911x(&cm_t35_smsc911x_device,
145 CM_T35_SMSC911X_CS, CM_T35_SMSC911X_GPIO);
146 cm_t35_init_smsc911x(&sb_t35_smsc911x_device,
147 SB_T35_SMSC911X_CS, SB_T35_SMSC911X_GPIO);
148 }
149 #else
150 static inline void __init cm_t35_init_ethernet(void) { return; }
151 #endif
152
153 #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
154 #include <linux/leds.h>
155
156 static struct gpio_led cm_t35_leds[] = {
157 [0] = {
158 .gpio = 186,
159 .name = "cm-t35:green",
160 .default_trigger = "heartbeat",
161 .active_low = 0,
162 },
163 };
164
165 static struct gpio_led_platform_data cm_t35_led_pdata = {
166 .num_leds = ARRAY_SIZE(cm_t35_leds),
167 .leds = cm_t35_leds,
168 };
169
170 static struct platform_device cm_t35_led_device = {
171 .name = "leds-gpio",
172 .id = -1,
173 .dev = {
174 .platform_data = &cm_t35_led_pdata,
175 },
176 };
177
178 static void __init cm_t35_init_led(void)
179 {
180 platform_device_register(&cm_t35_led_device);
181 }
182 #else
183 static inline void cm_t35_init_led(void) {}
184 #endif
185
186 #if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
187 #include <linux/mtd/mtd.h>
188 #include <linux/mtd/nand.h>
189 #include <linux/mtd/partitions.h>
190
191 static struct mtd_partition cm_t35_nand_partitions[] = {
192 {
193 .name = "xloader",
194 .offset = 0, /* Offset = 0x00000 */
195 .size = 4 * NAND_BLOCK_SIZE,
196 .mask_flags = MTD_WRITEABLE
197 },
198 {
199 .name = "uboot",
200 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
201 .size = 15 * NAND_BLOCK_SIZE,
202 },
203 {
204 .name = "uboot environment",
205 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
206 .size = 2 * NAND_BLOCK_SIZE,
207 },
208 {
209 .name = "linux",
210 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
211 .size = 32 * NAND_BLOCK_SIZE,
212 },
213 {
214 .name = "rootfs",
215 .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
216 .size = MTDPART_SIZ_FULL,
217 },
218 };
219
220 static struct omap_nand_platform_data cm_t35_nand_data = {
221 .parts = cm_t35_nand_partitions,
222 .nr_parts = ARRAY_SIZE(cm_t35_nand_partitions),
223 .dma_channel = -1, /* disable DMA in OMAP NAND driver */
224 .cs = 0,
225
226 };
227
228 static void __init cm_t35_init_nand(void)
229 {
230 if (gpmc_nand_init(&cm_t35_nand_data) < 0)
231 pr_err("CM-T35: Unable to register NAND device\n");
232 }
233 #else
234 static inline void cm_t35_init_nand(void) {}
235 #endif
236
237 #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
238 defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
239 #include <linux/spi/ads7846.h>
240
241 #include <plat/mcspi.h>
242
243 static struct omap2_mcspi_device_config ads7846_mcspi_config = {
244 .turbo_mode = 0,
245 .single_channel = 1, /* 0: slave, 1: master */
246 };
247
248 static int ads7846_get_pendown_state(void)
249 {
250 return !gpio_get_value(CM_T35_GPIO_PENDOWN);
251 }
252
253 static struct ads7846_platform_data ads7846_config = {
254 .x_max = 0x0fff,
255 .y_max = 0x0fff,
256 .x_plate_ohms = 180,
257 .pressure_max = 255,
258 .debounce_max = 10,
259 .debounce_tol = 3,
260 .debounce_rep = 1,
261 .get_pendown_state = ads7846_get_pendown_state,
262 .keep_vref_on = 1,
263 };
264
265 static struct spi_board_info cm_t35_spi_board_info[] __initdata = {
266 {
267 .modalias = "ads7846",
268 .bus_num = 1,
269 .chip_select = 0,
270 .max_speed_hz = 1500000,
271 .controller_data = &ads7846_mcspi_config,
272 .irq = OMAP_GPIO_IRQ(CM_T35_GPIO_PENDOWN),
273 .platform_data = &ads7846_config,
274 },
275 };
276
277 static void __init cm_t35_init_ads7846(void)
278 {
279 if ((gpio_request(CM_T35_GPIO_PENDOWN, "ADS7846_PENDOWN") == 0) &&
280 (gpio_direction_input(CM_T35_GPIO_PENDOWN) == 0)) {
281 gpio_export(CM_T35_GPIO_PENDOWN, 0);
282 } else {
283 pr_err("CM-T35: could not obtain gpio for ADS7846_PENDOWN\n");
284 return;
285 }
286
287 spi_register_board_info(cm_t35_spi_board_info,
288 ARRAY_SIZE(cm_t35_spi_board_info));
289 }
290 #else
291 static inline void cm_t35_init_ads7846(void) {}
292 #endif
293
294 #define CM_T35_LCD_EN_GPIO 157
295 #define CM_T35_LCD_BL_GPIO 58
296 #define CM_T35_DVI_EN_GPIO 54
297
298 static int lcd_bl_gpio;
299 static int lcd_en_gpio;
300 static int dvi_en_gpio;
301
302 static int lcd_enabled;
303 static int dvi_enabled;
304
305 static int cm_t35_panel_enable_lcd(struct omap_dss_device *dssdev)
306 {
307 if (dvi_enabled) {
308 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
309 return -EINVAL;
310 }
311
312 gpio_set_value(lcd_en_gpio, 1);
313 gpio_set_value(lcd_bl_gpio, 1);
314
315 lcd_enabled = 1;
316
317 return 0;
318 }
319
320 static void cm_t35_panel_disable_lcd(struct omap_dss_device *dssdev)
321 {
322 lcd_enabled = 0;
323
324 gpio_set_value(lcd_bl_gpio, 0);
325 gpio_set_value(lcd_en_gpio, 0);
326 }
327
328 static int cm_t35_panel_enable_dvi(struct omap_dss_device *dssdev)
329 {
330 if (lcd_enabled) {
331 printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
332 return -EINVAL;
333 }
334
335 gpio_set_value(dvi_en_gpio, 0);
336 dvi_enabled = 1;
337
338 return 0;
339 }
340
341 static void cm_t35_panel_disable_dvi(struct omap_dss_device *dssdev)
342 {
343 gpio_set_value(dvi_en_gpio, 1);
344 dvi_enabled = 0;
345 }
346
347 static int cm_t35_panel_enable_tv(struct omap_dss_device *dssdev)
348 {
349 return 0;
350 }
351
352 static void cm_t35_panel_disable_tv(struct omap_dss_device *dssdev)
353 {
354 }
355
356 static struct omap_dss_device cm_t35_lcd_device = {
357 .name = "lcd",
358 .driver_name = "toppoly_tdo35s_panel",
359 .type = OMAP_DISPLAY_TYPE_DPI,
360 .phy.dpi.data_lines = 18,
361 .platform_enable = cm_t35_panel_enable_lcd,
362 .platform_disable = cm_t35_panel_disable_lcd,
363 };
364
365 static struct omap_dss_device cm_t35_dvi_device = {
366 .name = "dvi",
367 .driver_name = "generic_panel",
368 .type = OMAP_DISPLAY_TYPE_DPI,
369 .phy.dpi.data_lines = 24,
370 .platform_enable = cm_t35_panel_enable_dvi,
371 .platform_disable = cm_t35_panel_disable_dvi,
372 };
373
374 static struct omap_dss_device cm_t35_tv_device = {
375 .name = "tv",
376 .driver_name = "venc",
377 .type = OMAP_DISPLAY_TYPE_VENC,
378 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
379 .platform_enable = cm_t35_panel_enable_tv,
380 .platform_disable = cm_t35_panel_disable_tv,
381 };
382
383 static struct omap_dss_device *cm_t35_dss_devices[] = {
384 &cm_t35_lcd_device,
385 &cm_t35_dvi_device,
386 &cm_t35_tv_device,
387 };
388
389 static struct omap_dss_board_info cm_t35_dss_data = {
390 .num_devices = ARRAY_SIZE(cm_t35_dss_devices),
391 .devices = cm_t35_dss_devices,
392 .default_device = &cm_t35_dvi_device,
393 };
394
395 static struct platform_device cm_t35_dss_device = {
396 .name = "omapdss",
397 .id = -1,
398 .dev = {
399 .platform_data = &cm_t35_dss_data,
400 },
401 };
402
403 static struct omap2_mcspi_device_config tdo24m_mcspi_config = {
404 .turbo_mode = 0,
405 .single_channel = 1, /* 0: slave, 1: master */
406 };
407
408 static struct tdo24m_platform_data tdo24m_config = {
409 .model = TDO35S,
410 };
411
412 static struct spi_board_info cm_t35_lcd_spi_board_info[] __initdata = {
413 {
414 .modalias = "tdo24m",
415 .bus_num = 4,
416 .chip_select = 0,
417 .max_speed_hz = 1000000,
418 .controller_data = &tdo24m_mcspi_config,
419 .platform_data = &tdo24m_config,
420 },
421 };
422
423 static void __init cm_t35_init_display(void)
424 {
425 int err;
426
427 lcd_en_gpio = CM_T35_LCD_EN_GPIO;
428 lcd_bl_gpio = CM_T35_LCD_BL_GPIO;
429 dvi_en_gpio = CM_T35_DVI_EN_GPIO;
430
431 spi_register_board_info(cm_t35_lcd_spi_board_info,
432 ARRAY_SIZE(cm_t35_lcd_spi_board_info));
433
434 err = gpio_request(lcd_en_gpio, "LCD RST");
435 if (err) {
436 pr_err("CM-T35: failed to get LCD reset GPIO\n");
437 goto out;
438 }
439
440 err = gpio_request(lcd_bl_gpio, "LCD BL");
441 if (err) {
442 pr_err("CM-T35: failed to get LCD backlight control GPIO\n");
443 goto err_lcd_bl;
444 }
445
446 err = gpio_request(dvi_en_gpio, "DVI EN");
447 if (err) {
448 pr_err("CM-T35: failed to get DVI reset GPIO\n");
449 goto err_dvi_en;
450 }
451
452 gpio_export(lcd_en_gpio, 0);
453 gpio_export(lcd_bl_gpio, 0);
454 gpio_export(dvi_en_gpio, 0);
455 gpio_direction_output(lcd_en_gpio, 0);
456 gpio_direction_output(lcd_bl_gpio, 0);
457 gpio_direction_output(dvi_en_gpio, 1);
458
459 msleep(50);
460 gpio_set_value(lcd_en_gpio, 1);
461
462 err = platform_device_register(&cm_t35_dss_device);
463 if (err) {
464 pr_err("CM-T35: failed to register DSS device\n");
465 goto err_dev_reg;
466 }
467
468 return;
469
470 err_dev_reg:
471 gpio_free(dvi_en_gpio);
472 err_dvi_en:
473 gpio_free(lcd_bl_gpio);
474 err_lcd_bl:
475 gpio_free(lcd_en_gpio);
476 out:
477
478 return;
479 }
480
481 static struct regulator_consumer_supply cm_t35_vmmc1_supply = {
482 .supply = "vmmc",
483 };
484
485 static struct regulator_consumer_supply cm_t35_vsim_supply = {
486 .supply = "vmmc_aux",
487 };
488
489 static struct regulator_consumer_supply cm_t35_vdac_supply = {
490 .supply = "vdda_dac",
491 .dev = &cm_t35_dss_device.dev,
492 };
493
494 static struct regulator_consumer_supply cm_t35_vdvi_supply = {
495 .supply = "vdvi",
496 .dev = &cm_t35_dss_device.dev,
497 };
498
499 /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
500 static struct regulator_init_data cm_t35_vmmc1 = {
501 .constraints = {
502 .min_uV = 1850000,
503 .max_uV = 3150000,
504 .valid_modes_mask = REGULATOR_MODE_NORMAL
505 | REGULATOR_MODE_STANDBY,
506 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
507 | REGULATOR_CHANGE_MODE
508 | REGULATOR_CHANGE_STATUS,
509 },
510 .num_consumer_supplies = 1,
511 .consumer_supplies = &cm_t35_vmmc1_supply,
512 };
513
514 /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
515 static struct regulator_init_data cm_t35_vsim = {
516 .constraints = {
517 .min_uV = 1800000,
518 .max_uV = 3000000,
519 .valid_modes_mask = REGULATOR_MODE_NORMAL
520 | REGULATOR_MODE_STANDBY,
521 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
522 | REGULATOR_CHANGE_MODE
523 | REGULATOR_CHANGE_STATUS,
524 },
525 .num_consumer_supplies = 1,
526 .consumer_supplies = &cm_t35_vsim_supply,
527 };
528
529 /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
530 static struct regulator_init_data cm_t35_vdac = {
531 .constraints = {
532 .min_uV = 1800000,
533 .max_uV = 1800000,
534 .valid_modes_mask = REGULATOR_MODE_NORMAL
535 | REGULATOR_MODE_STANDBY,
536 .valid_ops_mask = REGULATOR_CHANGE_MODE
537 | REGULATOR_CHANGE_STATUS,
538 },
539 .num_consumer_supplies = 1,
540 .consumer_supplies = &cm_t35_vdac_supply,
541 };
542
543 /* VPLL2 for digital video outputs */
544 static struct regulator_init_data cm_t35_vpll2 = {
545 .constraints = {
546 .name = "VDVI",
547 .min_uV = 1800000,
548 .max_uV = 1800000,
549 .valid_modes_mask = REGULATOR_MODE_NORMAL
550 | REGULATOR_MODE_STANDBY,
551 .valid_ops_mask = REGULATOR_CHANGE_MODE
552 | REGULATOR_CHANGE_STATUS,
553 },
554 .num_consumer_supplies = 1,
555 .consumer_supplies = &cm_t35_vdvi_supply,
556 };
557
558 static struct twl4030_usb_data cm_t35_usb_data = {
559 .usb_mode = T2_USB_MODE_ULPI,
560 };
561
562 static uint32_t cm_t35_keymap[] = {
563 KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT),
564 KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN),
565 KEY(2, 0, KEY_RIGHT), KEY(2, 1, KEY_C), KEY(2, 2, KEY_D),
566 };
567
568 static struct matrix_keymap_data cm_t35_keymap_data = {
569 .keymap = cm_t35_keymap,
570 .keymap_size = ARRAY_SIZE(cm_t35_keymap),
571 };
572
573 static struct twl4030_keypad_data cm_t35_kp_data = {
574 .keymap_data = &cm_t35_keymap_data,
575 .rows = 3,
576 .cols = 3,
577 .rep = 1,
578 };
579
580 static struct omap2_hsmmc_info mmc[] = {
581 {
582 .mmc = 1,
583 .caps = MMC_CAP_4_BIT_DATA,
584 .gpio_cd = -EINVAL,
585 .gpio_wp = -EINVAL,
586
587 },
588 {
589 .mmc = 2,
590 .caps = MMC_CAP_4_BIT_DATA,
591 .transceiver = 1,
592 .gpio_cd = -EINVAL,
593 .gpio_wp = -EINVAL,
594 .ocr_mask = 0x00100000, /* 3.3V */
595 },
596 {} /* Terminator */
597 };
598
599 static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = {
600 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
601 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
602 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
603
604 .phy_reset = true,
605 .reset_gpio_port[0] = -EINVAL,
606 .reset_gpio_port[1] = -EINVAL,
607 .reset_gpio_port[2] = -EINVAL
608 };
609
610 static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
611 unsigned ngpio)
612 {
613 int wlan_rst = gpio + 2;
614
615 if ((gpio_request(wlan_rst, "WLAN RST") == 0) &&
616 (gpio_direction_output(wlan_rst, 1) == 0)) {
617 gpio_export(wlan_rst, 0);
618
619 udelay(10);
620 gpio_set_value(wlan_rst, 0);
621 udelay(10);
622 gpio_set_value(wlan_rst, 1);
623 } else {
624 pr_err("CM-T35: could not obtain gpio for WiFi reset\n");
625 }
626
627 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
628 mmc[0].gpio_cd = gpio + 0;
629 omap2_hsmmc_init(mmc);
630
631 /* link regulators to MMC adapters */
632 cm_t35_vmmc1_supply.dev = mmc[0].dev;
633 cm_t35_vsim_supply.dev = mmc[0].dev;
634
635 /* setup USB with proper PHY reset GPIOs */
636 ehci_pdata.reset_gpio_port[0] = gpio + 6;
637 ehci_pdata.reset_gpio_port[1] = gpio + 7;
638
639 usb_ehci_init(&ehci_pdata);
640
641 return 0;
642 }
643
644 static struct twl4030_gpio_platform_data cm_t35_gpio_data = {
645 .gpio_base = OMAP_MAX_GPIO_LINES,
646 .irq_base = TWL4030_GPIO_IRQ_BASE,
647 .irq_end = TWL4030_GPIO_IRQ_END,
648 .setup = cm_t35_twl_gpio_setup,
649 };
650
651 static struct twl4030_platform_data cm_t35_twldata = {
652 .irq_base = TWL4030_IRQ_BASE,
653 .irq_end = TWL4030_IRQ_END,
654
655 /* platform_data for children goes here */
656 .keypad = &cm_t35_kp_data,
657 .usb = &cm_t35_usb_data,
658 .gpio = &cm_t35_gpio_data,
659 .vmmc1 = &cm_t35_vmmc1,
660 .vsim = &cm_t35_vsim,
661 .vdac = &cm_t35_vdac,
662 .vpll2 = &cm_t35_vpll2,
663 };
664
665 static struct i2c_board_info __initdata cm_t35_i2c_boardinfo[] = {
666 {
667 I2C_BOARD_INFO("tps65930", 0x48),
668 .flags = I2C_CLIENT_WAKE,
669 .irq = INT_34XX_SYS_NIRQ,
670 .platform_data = &cm_t35_twldata,
671 },
672 };
673
674 static void __init cm_t35_init_i2c(void)
675 {
676 omap_register_i2c_bus(1, 2600, cm_t35_i2c_boardinfo,
677 ARRAY_SIZE(cm_t35_i2c_boardinfo));
678 }
679
680 static struct omap_board_config_kernel cm_t35_config[] __initdata = {
681 };
682
683 static void __init cm_t35_init_irq(void)
684 {
685 omap_board_config = cm_t35_config;
686 omap_board_config_size = ARRAY_SIZE(cm_t35_config);
687
688 omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
689 mt46h32m32lf6_sdrc_params);
690 omap_init_irq();
691 omap_gpio_init();
692 }
693
694 static struct omap_board_mux board_mux[] __initdata = {
695 /* nCS and IRQ for CM-T35 ethernet */
696 OMAP3_MUX(GPMC_NCS5, OMAP_MUX_MODE0),
697 OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
698
699 /* nCS and IRQ for SB-T35 ethernet */
700 OMAP3_MUX(GPMC_NCS4, OMAP_MUX_MODE0),
701 OMAP3_MUX(GPMC_WAIT3, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
702
703 /* PENDOWN GPIO */
704 OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
705
706 /* mUSB */
707 OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
708 OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
709 OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
710 OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
711 OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
712 OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
713 OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
714 OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
715 OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
716 OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
717 OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
718 OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
719
720 /* MMC 2 */
721 OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
722 OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
723 OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
724 OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
725
726 /* McSPI 1 */
727 OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
728 OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
729 OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
730 OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
731
732 /* McSPI 4 */
733 OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
734 OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
735 OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
736 OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
737
738 /* McBSP 2 */
739 OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
740 OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
741 OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
742 OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
743
744 /* serial ports */
745 OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
746 OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
747 OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
748 OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
749
750 /* DSS */
751 OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
752 OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
753 OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
754 OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
755 OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
756 OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
757 OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
758 OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
759 OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
760 OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
761 OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
762 OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
763 OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
764 OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
765 OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
766 OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
767 OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
768 OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
769 OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
770 OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
771 OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
772 OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
773 OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
774 OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
775 OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
776 OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
777 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
778 OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
779
780 /* display controls */
781 OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
782 OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
783 OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
784
785 /* TPS IRQ */
786 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
787 OMAP_PIN_INPUT_PULLUP),
788
789 { .reg_offset = OMAP_MUX_TERMINATOR },
790 };
791
792 static struct omap_musb_board_data musb_board_data = {
793 .interface_type = MUSB_INTERFACE_ULPI,
794 .mode = MUSB_OTG,
795 .power = 100,
796 };
797
798 static void __init cm_t35_init(void)
799 {
800 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
801 omap_serial_init();
802 cm_t35_init_i2c();
803 cm_t35_init_nand();
804 cm_t35_init_ads7846();
805 cm_t35_init_ethernet();
806 cm_t35_init_led();
807 cm_t35_init_display();
808
809 usb_musb_init(&musb_board_data);
810 }
811
812 MACHINE_START(CM_T35, "Compulab CM-T35")
813 .phys_io = 0x48000000,
814 .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
815 .boot_params = 0x80000100,
816 .map_io = omap3_map_io,
817 .reserve = omap_reserve,
818 .init_irq = cm_t35_init_irq,
819 .init_machine = cm_t35_init,
820 .timer = &omap_timer,
821 MACHINE_END
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