arch/arm/mach-omap2/clockdomains2420_data.c

   1 /*
   2  * OMAP2420 clockdomains
   3  *
   4  * Copyright (C) 2008-2011 Texas Instruments, Inc.
   5  * Copyright (C) 2008-2010 Nokia Corporation
   6  *
   7  * Paul Walmsley, Jouni Högander
   8  *
   9  * This file contains clockdomains and clockdomain wakeup dependencies
  10  * for OMAP2420 chips.  Some notes:
  11  *
  12  * A useful validation rule for struct clockdomain: Any clockdomain
  13  * referenced by a wkdep_srcs must have a dep_bit assigned.  So
  14  * wkdep_srcs are really just software-controllable dependencies.
  15  * Non-software-controllable dependencies do exist, but they are not
  16  * encoded below (yet).
  17  *
  18  * 24xx does not support programmable sleep dependencies (SLEEPDEP)
  19  *
  20  * The overly-specific dep_bit names are due to a bit name collision
  21  * with CM_FCLKEN_{DSP,IVA2}.  The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift
  22  * value are the same for all powerdomains: 2
  23  *
  24  * XXX should dep_bit be a mask, so we can test to see if it is 0 as a
  25  * sanity check?
  26  * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE
  27  */
  28
  29 /*
  30  * To-Do List
  31  * -> Port the Sleep/Wakeup dependencies for the domains
  32  *    from the Power domain framework
  33  */
  34
  35 #include <linux/kernel.h>
  36 #include <linux/io.h>
  37
  38 #include "soc.h"
  39 #include "clockdomain.h"
  40 #include "prm2xxx_3xxx.h"
  41 #include "cm2xxx_3xxx.h"
  42 #include "cm-regbits-24xx.h"
  43 #include "prm-regbits-24xx.h"
  44
  45 /*
  46  * Clockdomain dependencies for wkdeps
  47  *
  48  * XXX Hardware dependencies (e.g., dependencies that cannot be
  49  * changed in software) are not included here yet, but should be.
  50  */
  51
  52 /* Wakeup dependency source arrays */
  53
  54 /* 2420-specific possible wakeup dependencies */
  55
  56 /* 2420 PM_WKDEP_MPU: CORE, DSP, WKUP */
  57 static struct clkdm_dep mpu_2420_wkdeps[] = {
  58         { .clkdm_name = "core_l3_clkdm" },
  59         { .clkdm_name = "core_l4_clkdm" },
  60         { .clkdm_name = "dsp_clkdm" },
  61         { .clkdm_name = "wkup_clkdm" },
  62         { NULL },
  63 };
  64
  65 /* 2420 PM_WKDEP_CORE: DSP, GFX, MPU, WKUP */
  66 static struct clkdm_dep core_2420_wkdeps[] = {
  67         { .clkdm_name = "dsp_clkdm" },
  68         { .clkdm_name = "gfx_clkdm" },
  69         { .clkdm_name = "mpu_clkdm" },
  70         { .clkdm_name = "wkup_clkdm" },
  71         { NULL },
  72 };
  73
  74 /*
  75  * 2420-only clockdomains
  76  */
  77
  78 static struct clockdomain mpu_2420_clkdm = {
  79         .name           = "mpu_clkdm",
  80         .pwrdm          = { .name = "mpu_pwrdm" },
  81         .flags          = CLKDM_CAN_HWSUP,
  82         .wkdep_srcs     = mpu_2420_wkdeps,
  83         .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK,
  84 };
  85
  86 static struct clockdomain iva1_2420_clkdm = {
  87         .name           = "iva1_clkdm",
  88         .pwrdm          = { .name = "dsp_pwrdm" },
  89         .flags          = CLKDM_CAN_HWSUP_SWSUP,
  90         .dep_bit        = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT,
  91         .wkdep_srcs     = dsp_24xx_wkdeps,
  92         .clktrctrl_mask = OMAP2420_AUTOSTATE_IVA_MASK,
  93 };
  94
  95 static struct clockdomain dsp_2420_clkdm = {
  96         .name           = "dsp_clkdm",
  97         .pwrdm          = { .name = "dsp_pwrdm" },
  98         .flags          = CLKDM_CAN_HWSUP_SWSUP,
  99         .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK,
 100 };
 101
 102 static struct clockdomain gfx_2420_clkdm = {
 103         .name           = "gfx_clkdm",
 104         .pwrdm          = { .name = "gfx_pwrdm" },
 105         .flags          = CLKDM_CAN_HWSUP_SWSUP,
 106         .wkdep_srcs     = gfx_24xx_wkdeps,
 107         .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK,
 108 };
 109
 110 static struct clockdomain core_l3_2420_clkdm = {
 111         .name           = "core_l3_clkdm",
 112         .pwrdm          = { .name = "core_pwrdm" },
 113         .flags          = CLKDM_CAN_HWSUP,
 114         .wkdep_srcs     = core_2420_wkdeps,
 115         .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK,
 116 };
 117
 118 static struct clockdomain core_l4_2420_clkdm = {
 119         .name           = "core_l4_clkdm",
 120         .pwrdm          = { .name = "core_pwrdm" },
 121         .flags          = CLKDM_CAN_HWSUP,
 122         .wkdep_srcs     = core_2420_wkdeps,
 123         .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK,
 124 };
 125
 126 static struct clockdomain dss_2420_clkdm = {
 127         .name           = "dss_clkdm",
 128         .pwrdm          = { .name = "core_pwrdm" },
 129         .flags          = CLKDM_CAN_HWSUP,
 130         .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK,
 131 };
 132
 133 static struct clockdomain *clockdomains_omap242x[] __initdata = {
 134         &wkup_common_clkdm,
 135         &mpu_2420_clkdm,
 136         &iva1_2420_clkdm,
 137         &dsp_2420_clkdm,
 138         &gfx_2420_clkdm,
 139         &core_l3_2420_clkdm,
 140         &core_l4_2420_clkdm,
 141         &dss_2420_clkdm,
 142         NULL,
 143 };
 144
 145 void __init omap242x_clockdomains_init(void)
 146 {
 147         if (!cpu_is_omap242x())
 148                 return;
 149
 150         clkdm_register_platform_funcs(&omap2_clkdm_operations);
 151         clkdm_register_clkdms(clockdomains_omap242x);
 152         clkdm_complete_init();
 153 }