arch/arm/mach-omap2/id.c

   1 /*
   2  * linux/arch/arm/mach-omap2/id.c
   3  *
   4  * OMAP2 CPU identification code
   5  *
   6  * Copyright (C) 2005 Nokia Corporation
   7  * Written by Tony Lindgren <tony@atomide.com>
   8  *
   9  * Copyright (C) 2009 Texas Instruments
  10  * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/kernel.h>
  19 #include <linux/init.h>
  20 #include <linux/io.h>
  21
  22 #include <asm/cputype.h>
  23
  24 #include <mach/common.h>
  25 #include <mach/control.h>
  26 #include <mach/cpu.h>
  27
  28 static struct omap_chip_id omap_chip;
  29 static unsigned int omap_revision;
  30
  31
  32 unsigned int omap_rev(void)
  33 {
  34         return omap_revision;
  35 }
  36 EXPORT_SYMBOL(omap_rev);
  37
  38 /**
  39  * omap_chip_is - test whether currently running OMAP matches a chip type
  40  * @oc: omap_chip_t to test against
  41  *
  42  * Test whether the currently-running OMAP chip matches the supplied
  43  * chip type 'oc'.  Returns 1 upon a match; 0 upon failure.
  44  */
  45 int omap_chip_is(struct omap_chip_id oci)
  46 {
  47         return (oci.oc & omap_chip.oc) ? 1 : 0;
  48 }
  49 EXPORT_SYMBOL(omap_chip_is);
  50
  51 /*----------------------------------------------------------------------------*/
  52
  53 #define OMAP_TAP_IDCODE         0x0204
  54 #define OMAP_TAP_DIE_ID_0       0x0218
  55 #define OMAP_TAP_DIE_ID_1       0x021C
  56 #define OMAP_TAP_DIE_ID_2       0x0220
  57 #define OMAP_TAP_DIE_ID_3       0x0224
  58
  59 #define read_tap_reg(reg)       __raw_readl(tap_base  + (reg))
  60
  61 struct omap_id {
  62         u16     hawkeye;        /* Silicon type (Hawkeye id) */
  63         u8      dev;            /* Device type from production_id reg */
  64         u32     type;           /* Combined type id copied to omap_revision */
  65 };
  66
  67 /* Register values to detect the OMAP version */
  68 static struct omap_id omap_ids[] __initdata = {
  69         { .hawkeye = 0xb5d9, .dev = 0x0, .type = 0x24200024 },
  70         { .hawkeye = 0xb5d9, .dev = 0x1, .type = 0x24201024 },
  71         { .hawkeye = 0xb5d9, .dev = 0x2, .type = 0x24202024 },
  72         { .hawkeye = 0xb5d9, .dev = 0x4, .type = 0x24220024 },
  73         { .hawkeye = 0xb5d9, .dev = 0x8, .type = 0x24230024 },
  74         { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300024 },
  75 };
  76
  77 static void __iomem *tap_base;
  78 static u16 tap_prod_id;
  79
  80 void __init omap24xx_check_revision(void)
  81 {
  82         int i, j;
  83         u32 idcode, prod_id;
  84         u16 hawkeye;
  85         u8  dev_type, rev;
  86
  87         idcode = read_tap_reg(OMAP_TAP_IDCODE);
  88         prod_id = read_tap_reg(tap_prod_id);
  89         hawkeye = (idcode >> 12) & 0xffff;
  90         rev = (idcode >> 28) & 0x0f;
  91         dev_type = (prod_id >> 16) & 0x0f;
  92
  93         pr_debug("OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n",
  94                  idcode, rev, hawkeye, (idcode >> 1) & 0x7ff);
  95         pr_debug("OMAP_TAP_DIE_ID_0: 0x%08x\n",
  96                  read_tap_reg(OMAP_TAP_DIE_ID_0));
  97         pr_debug("OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n",
  98                  read_tap_reg(OMAP_TAP_DIE_ID_1),
  99                  (read_tap_reg(OMAP_TAP_DIE_ID_1) >> 28) & 0xf);
 100         pr_debug("OMAP_TAP_DIE_ID_2: 0x%08x\n",
 101                  read_tap_reg(OMAP_TAP_DIE_ID_2));
 102         pr_debug("OMAP_TAP_DIE_ID_3: 0x%08x\n",
 103                  read_tap_reg(OMAP_TAP_DIE_ID_3));
 104         pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n",
 105                  prod_id, dev_type);
 106
 107         /* Check hawkeye ids */
 108         for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
 109                 if (hawkeye == omap_ids[i].hawkeye)
 110                         break;
 111         }
 112
 113         if (i == ARRAY_SIZE(omap_ids)) {
 114                 printk(KERN_ERR "Unknown OMAP CPU id\n");
 115                 return;
 116         }
 117
 118         for (j = i; j < ARRAY_SIZE(omap_ids); j++) {
 119                 if (dev_type == omap_ids[j].dev)
 120                         break;
 121         }
 122
 123         if (j == ARRAY_SIZE(omap_ids)) {
 124                 printk(KERN_ERR "Unknown OMAP device type. "
 125                                 "Handling it as OMAP%04x\n",
 126                                 omap_ids[i].type >> 16);
 127                 j = i;
 128         }
 129
 130         pr_info("OMAP%04x", omap_rev() >> 16);
 131         if ((omap_rev() >> 8) & 0x0f)
 132                 pr_info("ES%x", (omap_rev() >> 12) & 0xf);
 133         pr_info("\n");
 134 }
 135
 136 void __init omap34xx_check_revision(void)
 137 {
 138         u32 cpuid, idcode;
 139         u16 hawkeye;
 140         u8 rev;
 141         char *rev_name = "ES1.0";
 142
 143         /*
 144          * We cannot access revision registers on ES1.0.
 145          * If the processor type is Cortex-A8 and the revision is 0x0
 146          * it means its Cortex r0p0 which is 3430 ES1.0.
 147          */
 148         cpuid = read_cpuid(CPUID_ID);
 149         if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
 150                 omap_revision = OMAP3430_REV_ES1_0;
 151                 goto out;
 152         }
 153
 154         /*
 155          * Detection for 34xx ES2.0 and above can be done with just
 156          * hawkeye and rev. See TRM 1.5.2 Device Identification.
 157          * Note that rev does not map directly to our defined processor
 158          * revision numbers as ES1.0 uses value 0.
 159          */
 160         idcode = read_tap_reg(OMAP_TAP_IDCODE);
 161         hawkeye = (idcode >> 12) & 0xffff;
 162         rev = (idcode >> 28) & 0xff;
 163
 164         if (hawkeye == 0xb7ae) {
 165                 switch (rev) {
 166                 case 0:
 167                         omap_revision = OMAP3430_REV_ES2_0;
 168                         rev_name = "ES2.0";
 169                         break;
 170                 case 2:
 171                         omap_revision = OMAP3430_REV_ES2_1;
 172                         rev_name = "ES2.1";
 173                         break;
 174                 case 3:
 175                         omap_revision = OMAP3430_REV_ES3_0;
 176                         rev_name = "ES3.0";
 177                         break;
 178                 case 4:
 179                         omap_revision = OMAP3430_REV_ES3_1;
 180                         rev_name = "ES3.1";
 181                         break;
 182                 default:
 183                         /* Use the latest known revision as default */
 184                         omap_revision = OMAP3430_REV_ES3_1;
 185                         rev_name = "Unknown revision\n";
 186                 }
 187         }
 188
 189 out:
 190         pr_info("OMAP%04x %s\n", omap_rev() >> 16, rev_name);
 191 }
 192
 193 /*
 194  * Try to detect the exact revision of the omap we're running on
 195  */
 196 void __init omap2_check_revision(void)
 197 {
 198         /*
 199          * At this point we have an idea about the processor revision set
 200          * earlier with omap2_set_globals_tap().
 201          */
 202         if (cpu_is_omap24xx())
 203                 omap24xx_check_revision();
 204         else if (cpu_is_omap34xx())
 205                 omap34xx_check_revision();
 206         else if (cpu_is_omap44xx()) {
 207                 printk(KERN_INFO "FIXME: CPU revision = OMAP4430\n");
 208                 return;
 209         } else
 210                 pr_err("OMAP revision unknown, please fix!\n");
 211
 212         /*
 213          * OK, now we know the exact revision. Initialize omap_chip bits
 214          * for powerdowmain and clockdomain code.
 215          */
 216         if (cpu_is_omap243x()) {
 217                 /* Currently only supports 2430ES2.1 and 2430-all */
 218                 omap_chip.oc |= CHIP_IS_OMAP2430;
 219         } else if (cpu_is_omap242x()) {
 220                 /* Currently only supports 2420ES2.1.1 and 2420-all */
 221                 omap_chip.oc |= CHIP_IS_OMAP2420;
 222         } else if (cpu_is_omap343x()) {
 223                 omap_chip.oc = CHIP_IS_OMAP3430;
 224                 if (omap_rev() == OMAP3430_REV_ES1_0)
 225                         omap_chip.oc |= CHIP_IS_OMAP3430ES1;
 226                 else if (omap_rev() >= OMAP3430_REV_ES2_0 &&
 227                          omap_rev() <= OMAP3430_REV_ES2_1)
 228                         omap_chip.oc |= CHIP_IS_OMAP3430ES2;
 229                 else if (omap_rev() == OMAP3430_REV_ES3_0)
 230                         omap_chip.oc |= CHIP_IS_OMAP3430ES3_0;
 231                 else if (omap_rev() == OMAP3430_REV_ES3_1)
 232                         omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
 233         } else {
 234                 pr_err("Uninitialized omap_chip, please fix!\n");
 235         }
 236 }
 237
 238 /*
 239  * Set up things for map_io and processor detection later on. Gets called
 240  * pretty much first thing from board init. For multi-omap, this gets
 241  * cpu_is_omapxxxx() working accurately enough for map_io. Then we'll try to
 242  * detect the exact revision later on in omap2_detect_revision() once map_io
 243  * is done.
 244  */
 245 void __init omap2_set_globals_tap(struct omap_globals *omap2_globals)
 246 {
 247         omap_revision = omap2_globals->class;
 248         tap_base = omap2_globals->tap;
 249
 250         if (cpu_is_omap34xx())
 251                 tap_prod_id = 0x0210;
 252         else
 253                 tap_prod_id = 0x0208;
 254 }