2 * Copyright (C) 2009 Nokia
3 * Copyright (C) 2009 Texas Instruments
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
10 #define OMAP2430_CONTROL_PADCONF_MUX_PBASE 0x49002030LU
12 #define OMAP2430_MUX(mode0, mux_value) \
14 .reg_offset = (OMAP2430_CONTROL_PADCONF_##mode0##_OFFSET), \
15 .value = (mux_value), \
19 * OMAP2430 CONTROL_PADCONF* register offsets for pin-muxing
21 * Extracted from the TRM. Add 0x49002030 to these values to get the
22 * absolute addresses. The name in the macro is the mode-0 name of
23 * the pin. NOTE: These registers are 8-bits wide.
25 * Note that these defines use SDMMC instead of MMC for compatibility
26 * with signal names used in 3630.
28 #define OMAP2430_CONTROL_PADCONF_GPMC_CLK_OFFSET 0x000
29 #define OMAP2430_CONTROL_PADCONF_GPMC_NCS0_OFFSET 0x001
30 #define OMAP2430_CONTROL_PADCONF_GPMC_NCS1_OFFSET 0x002
31 #define OMAP2430_CONTROL_PADCONF_GPMC_NCS2_OFFSET 0x003
32 #define OMAP2430_CONTROL_PADCONF_GPMC_NCS3_OFFSET 0x004
33 #define OMAP2430_CONTROL_PADCONF_GPMC_NCS4_OFFSET 0x005
34 #define OMAP2430_CONTROL_PADCONF_GPMC_NCS5_OFFSET 0x006
35 #define OMAP2430_CONTROL_PADCONF_GPMC_NCS6_OFFSET 0x007
36 #define OMAP2430_CONTROL_PADCONF_GPMC_NCS7_OFFSET 0x008
37 #define OMAP2430_CONTROL_PADCONF_GPMC_NADV_ALE_OFFSET 0x009
38 #define OMAP2430_CONTROL_PADCONF_GPMC_NOE_NRE_OFFSET 0x00a
39 #define OMAP2430_CONTROL_PADCONF_GPMC_NWE_OFFSET 0x00b
40 #define OMAP2430_CONTROL_PADCONF_GPMC_NBE0_CLE_OFFSET 0x00c
41 #define OMAP2430_CONTROL_PADCONF_GPMC_NBE1_OFFSET 0x00d
42 #define OMAP2430_CONTROL_PADCONF_GPMC_NWP_OFFSET 0x00e
43 #define OMAP2430_CONTROL_PADCONF_GPMC_WAIT0_OFFSET 0x00f
44 #define OMAP2430_CONTROL_PADCONF_GPMC_WAIT1_OFFSET 0x010
45 #define OMAP2430_CONTROL_PADCONF_GPMC_WAIT2_OFFSET 0x011
46 #define OMAP2430_CONTROL_PADCONF_GPMC_WAIT3_OFFSET 0x012
47 #define OMAP2430_CONTROL_PADCONF_SDRC_CLK_OFFSET 0x013
48 #define OMAP2430_CONTROL_PADCONF_SDRC_NCLK_OFFSET 0x014
49 #define OMAP2430_CONTROL_PADCONF_SDRC_NCS0_OFFSET 0x015
50 #define OMAP2430_CONTROL_PADCONF_SDRC_NCS1_OFFSET 0x016
51 #define OMAP2430_CONTROL_PADCONF_SDRC_CKE0_OFFSET 0x017
52 #define OMAP2430_CONTROL_PADCONF_SDRC_CKE1_OFFSET 0x018
53 #define OMAP2430_CONTROL_PADCONF_SDRC_NRAS_OFFSET 0x019
54 #define OMAP2430_CONTROL_PADCONF_SDRC_NCAS_OFFSET 0x01a
55 #define OMAP2430_CONTROL_PADCONF_SDRC_NWE_OFFSET 0x01b
56 #define OMAP2430_CONTROL_PADCONF_SDRC_DM0_OFFSET 0x01c
57 #define OMAP2430_CONTROL_PADCONF_SDRC_DM1_OFFSET 0x01d
58 #define OMAP2430_CONTROL_PADCONF_SDRC_DM2_OFFSET 0x01e
59 #define OMAP2430_CONTROL_PADCONF_SDRC_DM3_OFFSET 0x01f
60 #define OMAP2430_CONTROL_PADCONF_SDRC_DQS0_OFFSET 0x020
61 #define OMAP2430_CONTROL_PADCONF_SDRC_DQS1_OFFSET 0x021
62 #define OMAP2430_CONTROL_PADCONF_SDRC_DQS2_OFFSET 0x022
63 #define OMAP2430_CONTROL_PADCONF_SDRC_DQS3_OFFSET 0x023
64 #define OMAP2430_CONTROL_PADCONF_SDRC_A14_OFFSET 0x024
65 #define OMAP2430_CONTROL_PADCONF_SDRC_A13_OFFSET 0x025
66 #define OMAP2430_CONTROL_PADCONF_SDRC_A12_OFFSET 0x026
67 #define OMAP2430_CONTROL_PADCONF_SDRC_BA1_OFFSET 0x027
68 #define OMAP2430_CONTROL_PADCONF_SDRC_BA0_OFFSET 0x028
69 #define OMAP2430_CONTROL_PADCONF_SDRC_A11_OFFSET 0x029
70 #define OMAP2430_CONTROL_PADCONF_SDRC_A10_OFFSET 0x02a
71 #define OMAP2430_CONTROL_PADCONF_SDRC_A9_OFFSET 0x02b
72 #define OMAP2430_CONTROL_PADCONF_SDRC_A8_OFFSET 0x02c
73 #define OMAP2430_CONTROL_PADCONF_SDRC_A7_OFFSET 0x02d
74 #define OMAP2430_CONTROL_PADCONF_SDRC_A6_OFFSET 0x02e
75 #define OMAP2430_CONTROL_PADCONF_SDRC_A5_OFFSET 0x02f
76 #define OMAP2430_CONTROL_PADCONF_SDRC_A4_OFFSET 0x030
77 #define OMAP2430_CONTROL_PADCONF_SDRC_A3_OFFSET 0x031
78 #define OMAP2430_CONTROL_PADCONF_SDRC_A2_OFFSET 0x032
79 #define OMAP2430_CONTROL_PADCONF_SDRC_A1_OFFSET 0x033
80 #define OMAP2430_CONTROL_PADCONF_SDRC_A0_OFFSET 0x034
81 #define OMAP2430_CONTROL_PADCONF_SDRC_D31_OFFSET 0x035
82 #define OMAP2430_CONTROL_PADCONF_SDRC_D30_OFFSET 0x036
83 #define OMAP2430_CONTROL_PADCONF_SDRC_D29_OFFSET 0x037
84 #define OMAP2430_CONTROL_PADCONF_SDRC_D28_OFFSET 0x038
85 #define OMAP2430_CONTROL_PADCONF_SDRC_D27_OFFSET 0x039
86 #define OMAP2430_CONTROL_PADCONF_SDRC_D26_OFFSET 0x03a
87 #define OMAP2430_CONTROL_PADCONF_SDRC_D25_OFFSET 0x03b
88 #define OMAP2430_CONTROL_PADCONF_SDRC_D24_OFFSET 0x03c
89 #define OMAP2430_CONTROL_PADCONF_SDRC_D23_OFFSET 0x03d
90 #define OMAP2430_CONTROL_PADCONF_SDRC_D22_OFFSET 0x03e
91 #define OMAP2430_CONTROL_PADCONF_SDRC_D21_OFFSET 0x03f
92 #define OMAP2430_CONTROL_PADCONF_SDRC_D20_OFFSET 0x040
93 #define OMAP2430_CONTROL_PADCONF_SDRC_D19_OFFSET 0x041
94 #define OMAP2430_CONTROL_PADCONF_SDRC_D18_OFFSET 0x042
95 #define OMAP2430_CONTROL_PADCONF_SDRC_D17_OFFSET 0x043
96 #define OMAP2430_CONTROL_PADCONF_SDRC_D16_OFFSET 0x044
97 #define OMAP2430_CONTROL_PADCONF_SDRC_D15_OFFSET 0x045
98 #define OMAP2430_CONTROL_PADCONF_SDRC_D14_OFFSET 0x046
99 #define OMAP2430_CONTROL_PADCONF_SDRC_D13_OFFSET 0x047
100 #define OMAP2430_CONTROL_PADCONF_SDRC_D12_OFFSET 0x048
101 #define OMAP2430_CONTROL_PADCONF_SDRC_D11_OFFSET 0x049
102 #define OMAP2430_CONTROL_PADCONF_SDRC_D10_OFFSET 0x04a
103 #define OMAP2430_CONTROL_PADCONF_SDRC_D9_OFFSET 0x04b
104 #define OMAP2430_CONTROL_PADCONF_SDRC_D8_OFFSET 0x04c
105 #define OMAP2430_CONTROL_PADCONF_SDRC_D7_OFFSET 0x04d
106 #define OMAP2430_CONTROL_PADCONF_SDRC_D6_OFFSET 0x04e
107 #define OMAP2430_CONTROL_PADCONF_SDRC_D5_OFFSET 0x04f
108 #define OMAP2430_CONTROL_PADCONF_SDRC_D4_OFFSET 0x050
109 #define OMAP2430_CONTROL_PADCONF_SDRC_D3_OFFSET 0x051
110 #define OMAP2430_CONTROL_PADCONF_SDRC_D2_OFFSET 0x052
111 #define OMAP2430_CONTROL_PADCONF_SDRC_D1_OFFSET 0x053
112 #define OMAP2430_CONTROL_PADCONF_SDRC_D0_OFFSET 0x054
113 #define OMAP2430_CONTROL_PADCONF_GPMC_A10_OFFSET 0x055
114 #define OMAP2430_CONTROL_PADCONF_GPMC_A9_OFFSET 0x056
115 #define OMAP2430_CONTROL_PADCONF_GPMC_A8_OFFSET 0x057
116 #define OMAP2430_CONTROL_PADCONF_GPMC_A7_OFFSET 0x058
117 #define OMAP2430_CONTROL_PADCONF_GPMC_A6_OFFSET 0x059
118 #define OMAP2430_CONTROL_PADCONF_GPMC_A5_OFFSET 0x05a
119 #define OMAP2430_CONTROL_PADCONF_GPMC_A4_OFFSET 0x05b
120 #define OMAP2430_CONTROL_PADCONF_GPMC_A3_OFFSET 0x05c
121 #define OMAP2430_CONTROL_PADCONF_GPMC_A2_OFFSET 0x05d
122 #define OMAP2430_CONTROL_PADCONF_GPMC_A1_OFFSET 0x05e
123 #define OMAP2430_CONTROL_PADCONF_GPMC_D15_OFFSET 0x05f
124 #define OMAP2430_CONTROL_PADCONF_GPMC_D14_OFFSET 0x060
125 #define OMAP2430_CONTROL_PADCONF_GPMC_D13_OFFSET 0x061
126 #define OMAP2430_CONTROL_PADCONF_GPMC_D12_OFFSET 0x062
127 #define OMAP2430_CONTROL_PADCONF_GPMC_D11_OFFSET 0x063
128 #define OMAP2430_CONTROL_PADCONF_GPMC_D10_OFFSET 0x064
129 #define OMAP2430_CONTROL_PADCONF_GPMC_D9_OFFSET 0x065
130 #define OMAP2430_CONTROL_PADCONF_GPMC_D8_OFFSET 0x066
131 #define OMAP2430_CONTROL_PADCONF_GPMC_D7_OFFSET 0x067
132 #define OMAP2430_CONTROL_PADCONF_GPMC_D6_OFFSET 0x068
133 #define OMAP2430_CONTROL_PADCONF_GPMC_D5_OFFSET 0x069
134 #define OMAP2430_CONTROL_PADCONF_GPMC_D4_OFFSET 0x06a
135 #define OMAP2430_CONTROL_PADCONF_GPMC_D3_OFFSET 0x06b
136 #define OMAP2430_CONTROL_PADCONF_GPMC_D2_OFFSET 0x06c
137 #define OMAP2430_CONTROL_PADCONF_GPMC_D1_OFFSET 0x06d
138 #define OMAP2430_CONTROL_PADCONF_GPMC_D0_OFFSET 0x06e
139 #define OMAP2430_CONTROL_PADCONF_DSS_DATA0_OFFSET 0x06f
140 #define OMAP2430_CONTROL_PADCONF_DSS_DATA1_OFFSET 0x070
141 #define OMAP2430_CONTROL_PADCONF_DSS_DATA2_OFFSET 0x071
142 #define OMAP2430_CONTROL_PADCONF_DSS_DATA3_OFFSET 0x072
143 #define OMAP2430_CONTROL_PADCONF_DSS_DATA4_OFFSET 0x073
144 #define OMAP2430_CONTROL_PADCONF_DSS_DATA5_OFFSET 0x074
145 #define OMAP2430_CONTROL_PADCONF_DSS_DATA6_OFFSET 0x075
146 #define OMAP2430_CONTROL_PADCONF_DSS_DATA7_OFFSET 0x076
147 #define OMAP2430_CONTROL_PADCONF_DSS_DATA8_OFFSET 0x077
148 #define OMAP2430_CONTROL_PADCONF_DSS_DATA9_OFFSET 0x078
149 #define OMAP2430_CONTROL_PADCONF_DSS_DATA10_OFFSET 0x079
150 #define OMAP2430_CONTROL_PADCONF_DSS_DATA11_OFFSET 0x07a
151 #define OMAP2430_CONTROL_PADCONF_DSS_DATA12_OFFSET 0x07b
152 #define OMAP2430_CONTROL_PADCONF_DSS_DATA13_OFFSET 0x07c
153 #define OMAP2430_CONTROL_PADCONF_DSS_DATA14_OFFSET 0x07d
154 #define OMAP2430_CONTROL_PADCONF_DSS_DATA15_OFFSET 0x07e
155 #define OMAP2430_CONTROL_PADCONF_DSS_DATA16_OFFSET 0x07f
156 #define OMAP2430_CONTROL_PADCONF_DSS_DATA17_OFFSET 0x080
157 #define OMAP2430_CONTROL_PADCONF_UART1_CTS_OFFSET 0x081
158 #define OMAP2430_CONTROL_PADCONF_UART1_RTS_OFFSET 0x082
159 #define OMAP2430_CONTROL_PADCONF_UART1_TX_OFFSET 0x083
160 #define OMAP2430_CONTROL_PADCONF_UART1_RX_OFFSET 0x084
161 #define OMAP2430_CONTROL_PADCONF_MCBSP2_DR_OFFSET 0x085
162 #define OMAP2430_CONTROL_PADCONF_MCBSP2_CLKX_OFFSET 0x086
163 #define OMAP2430_CONTROL_PADCONF_DSS_PCLK_OFFSET 0x087
164 #define OMAP2430_CONTROL_PADCONF_DSS_VSYNC_OFFSET 0x088
165 #define OMAP2430_CONTROL_PADCONF_DSS_HSYNC_OFFSET 0x089
166 #define OMAP2430_CONTROL_PADCONF_DSS_ACBIAS_OFFSET 0x08a
167 #define OMAP2430_CONTROL_PADCONF_SYS_NRESPWRON_OFFSET 0x08b
168 #define OMAP2430_CONTROL_PADCONF_SYS_NRESWARM_OFFSET 0x08c
169 #define OMAP2430_CONTROL_PADCONF_SYS_NIRQ0_OFFSET 0x08d
170 #define OMAP2430_CONTROL_PADCONF_SYS_NIRQ1_OFFSET 0x08e
171 #define OMAP2430_CONTROL_PADCONF_SYS_VMODE_OFFSET 0x08f
172 #define OMAP2430_CONTROL_PADCONF_GPIO_128_OFFSET 0x090
173 #define OMAP2430_CONTROL_PADCONF_GPIO_129_OFFSET 0x091
174 #define OMAP2430_CONTROL_PADCONF_GPIO_130_OFFSET 0x092
175 #define OMAP2430_CONTROL_PADCONF_GPIO_131_OFFSET 0x093
176 #define OMAP2430_CONTROL_PADCONF_SYS_32K_OFFSET 0x094
177 #define OMAP2430_CONTROL_PADCONF_SYS_XTALIN_OFFSET 0x095
178 #define OMAP2430_CONTROL_PADCONF_SYS_XTALOUT_OFFSET 0x096
179 #define OMAP2430_CONTROL_PADCONF_GPIO_132_OFFSET 0x097
180 #define OMAP2430_CONTROL_PADCONF_SYS_CLKREQ_OFFSET 0x098
181 #define OMAP2430_CONTROL_PADCONF_SYS_CLKOUT_OFFSET 0x099
182 #define OMAP2430_CONTROL_PADCONF_GPIO_151_OFFSET 0x09a
183 #define OMAP2430_CONTROL_PADCONF_GPIO_133_OFFSET 0x09b
184 #define OMAP2430_CONTROL_PADCONF_JTAG_EMU1_OFFSET 0x09c
185 #define OMAP2430_CONTROL_PADCONF_JTAG_EMU0_OFFSET 0x09d
186 #define OMAP2430_CONTROL_PADCONF_JTAG_NTRST_OFFSET 0x09e
187 #define OMAP2430_CONTROL_PADCONF_JTAG_TCK_OFFSET 0x09f
188 #define OMAP2430_CONTROL_PADCONF_JTAG_RTCK_OFFSET 0x0a0
189 #define OMAP2430_CONTROL_PADCONF_JTAG_TMS_OFFSET 0x0a1
190 #define OMAP2430_CONTROL_PADCONF_JTAG_TDI_OFFSET 0x0a2
191 #define OMAP2430_CONTROL_PADCONF_JTAG_TDO_OFFSET 0x0a3
192 #define OMAP2430_CONTROL_PADCONF_CAM_D9_OFFSET 0x0a4
193 #define OMAP2430_CONTROL_PADCONF_CAM_D8_OFFSET 0x0a5
194 #define OMAP2430_CONTROL_PADCONF_CAM_D7_OFFSET 0x0a6
195 #define OMAP2430_CONTROL_PADCONF_CAM_D6_OFFSET 0x0a7
196 #define OMAP2430_CONTROL_PADCONF_CAM_D5_OFFSET 0x0a8
197 #define OMAP2430_CONTROL_PADCONF_CAM_D4_OFFSET 0x0a9
198 #define OMAP2430_CONTROL_PADCONF_CAM_D3_OFFSET 0x0aa
199 #define OMAP2430_CONTROL_PADCONF_CAM_D2_OFFSET 0x0ab
200 #define OMAP2430_CONTROL_PADCONF_CAM_D1_OFFSET 0x0ac
201 #define OMAP2430_CONTROL_PADCONF_CAM_D0_OFFSET 0x0ad
202 #define OMAP2430_CONTROL_PADCONF_CAM_HS_OFFSET 0x0ae
203 #define OMAP2430_CONTROL_PADCONF_CAM_VS_OFFSET 0x0af
204 #define OMAP2430_CONTROL_PADCONF_CAM_LCLK_OFFSET 0x0b0
205 #define OMAP2430_CONTROL_PADCONF_CAM_XCLK_OFFSET 0x0b1
206 #define OMAP2430_CONTROL_PADCONF_CAM_D11_OFFSET 0x0b2
207 #define OMAP2430_CONTROL_PADCONF_CAM_D10_OFFSET 0x0b3
208 #define OMAP2430_CONTROL_PADCONF_GPIO_134_OFFSET 0x0b4
209 #define OMAP2430_CONTROL_PADCONF_GPIO_135_OFFSET 0x0b5
210 #define OMAP2430_CONTROL_PADCONF_GPIO_136_OFFSET 0x0b6
211 #define OMAP2430_CONTROL_PADCONF_GPIO_137_OFFSET 0x0b7
212 #define OMAP2430_CONTROL_PADCONF_GPIO_138_OFFSET 0x0b8
213 #define OMAP2430_CONTROL_PADCONF_GPIO_139_OFFSET 0x0b9
214 #define OMAP2430_CONTROL_PADCONF_GPIO_140_OFFSET 0x0ba
215 #define OMAP2430_CONTROL_PADCONF_GPIO_141_OFFSET 0x0bb
216 #define OMAP2430_CONTROL_PADCONF_GPIO_142_OFFSET 0x0bc
217 #define OMAP2430_CONTROL_PADCONF_GPIO_154_OFFSET 0x0bd
218 #define OMAP2430_CONTROL_PADCONF_GPIO_148_OFFSET 0x0be
219 #define OMAP2430_CONTROL_PADCONF_GPIO_149_OFFSET 0x0bf
220 #define OMAP2430_CONTROL_PADCONF_GPIO_150_OFFSET 0x0c0
221 #define OMAP2430_CONTROL_PADCONF_GPIO_152_OFFSET 0x0c1
222 #define OMAP2430_CONTROL_PADCONF_GPIO_153_OFFSET 0x0c2
223 #define OMAP2430_CONTROL_PADCONF_SDMMC1_CLKO_OFFSET 0x0c3
224 #define OMAP2430_CONTROL_PADCONF_SDMMC1_CMD_OFFSET 0x0c4
225 #define OMAP2430_CONTROL_PADCONF_SDMMC1_DAT0_OFFSET 0x0c5
226 #define OMAP2430_CONTROL_PADCONF_SDMMC1_DAT1_OFFSET 0x0c6
227 #define OMAP2430_CONTROL_PADCONF_SDMMC1_DAT2_OFFSET 0x0c7
228 #define OMAP2430_CONTROL_PADCONF_SDMMC1_DAT3_OFFSET 0x0c8
229 #define OMAP2430_CONTROL_PADCONF_SDMMC2_CLKO_OFFSET 0x0c9
230 #define OMAP2430_CONTROL_PADCONF_SDMMC2_DAT3_OFFSET 0x0ca
231 #define OMAP2430_CONTROL_PADCONF_SDMMC2_CMD_OFFSET 0x0cb
232 #define OMAP2430_CONTROL_PADCONF_SDMMC2_DAT0_OFFSET 0x0cc
233 #define OMAP2430_CONTROL_PADCONF_SDMMC2_DAT2_OFFSET 0x0cd
234 #define OMAP2430_CONTROL_PADCONF_SDMMC2_DAT1_OFFSET 0x0ce
235 #define OMAP2430_CONTROL_PADCONF_UART2_CTS_OFFSET 0x0cf
236 #define OMAP2430_CONTROL_PADCONF_UART2_RTS_OFFSET 0x0d0
237 #define OMAP2430_CONTROL_PADCONF_UART2_TX_OFFSET 0x0d1
238 #define OMAP2430_CONTROL_PADCONF_UART2_RX_OFFSET 0x0d2
239 #define OMAP2430_CONTROL_PADCONF_MCBSP3_CLKX_OFFSET 0x0d3
240 #define OMAP2430_CONTROL_PADCONF_MCBSP3_FSX_OFFSET 0x0d4
241 #define OMAP2430_CONTROL_PADCONF_MCBSP3_DR_OFFSET 0x0d5
242 #define OMAP2430_CONTROL_PADCONF_MCBSP3_DX_OFFSET 0x0d6
243 #define OMAP2430_CONTROL_PADCONF_SSI1_DAT_TX_OFFSET 0x0d7
244 #define OMAP2430_CONTROL_PADCONF_SSI1_FLAG_TX_OFFSET 0x0d8
245 #define OMAP2430_CONTROL_PADCONF_SSI1_RDY_TX_OFFSET 0x0d9
246 #define OMAP2430_CONTROL_PADCONF_SSI1_DAT_RX_OFFSET 0x0da
247 #define OMAP2430_CONTROL_PADCONF_GPIO_63_OFFSET 0x0db
248 #define OMAP2430_CONTROL_PADCONF_SSI1_FLAG_RX_OFFSET 0x0dc
249 #define OMAP2430_CONTROL_PADCONF_SSI1_RDY_RX_OFFSET 0x0dd
250 #define OMAP2430_CONTROL_PADCONF_SSI1_WAKE_OFFSET 0x0de
251 #define OMAP2430_CONTROL_PADCONF_SPI1_CLK_OFFSET 0x0df
252 #define OMAP2430_CONTROL_PADCONF_SPI1_SIMO_OFFSET 0x0e0
253 #define OMAP2430_CONTROL_PADCONF_SPI1_SOMI_OFFSET 0x0e1
254 #define OMAP2430_CONTROL_PADCONF_SPI1_CS0_OFFSET 0x0e2
255 #define OMAP2430_CONTROL_PADCONF_SPI1_CS1_OFFSET 0x0e3
256 #define OMAP2430_CONTROL_PADCONF_SPI1_CS2_OFFSET 0x0e4
257 #define OMAP2430_CONTROL_PADCONF_SPI1_CS3_OFFSET 0x0e5
258 #define OMAP2430_CONTROL_PADCONF_SPI2_CLK_OFFSET 0x0e6
259 #define OMAP2430_CONTROL_PADCONF_SPI2_SIMO_OFFSET 0x0e7
260 #define OMAP2430_CONTROL_PADCONF_SPI2_SOMI_OFFSET 0x0e8
261 #define OMAP2430_CONTROL_PADCONF_SPI2_CS0_OFFSET 0x0e9
262 #define OMAP2430_CONTROL_PADCONF_MCBSP1_CLKR_OFFSET 0x0ea
263 #define OMAP2430_CONTROL_PADCONF_MCBSP1_FSR_OFFSET 0x0eb
264 #define OMAP2430_CONTROL_PADCONF_MCBSP1_DX_OFFSET 0x0ec
265 #define OMAP2430_CONTROL_PADCONF_MCBSP1_DR_OFFSET 0x0ed
266 #define OMAP2430_CONTROL_PADCONF_MCBSP_CLKS_OFFSET 0x0ee
267 #define OMAP2430_CONTROL_PADCONF_MCBSP1_FSX_OFFSET 0x0ef
268 #define OMAP2430_CONTROL_PADCONF_MCBSP1_CLKX_OFFSET 0x0f0
269 #define OMAP2430_CONTROL_PADCONF_I2C1_SCL_OFFSET 0x0f1
270 #define OMAP2430_CONTROL_PADCONF_I2C1_SDA_OFFSET 0x0f2
271 #define OMAP2430_CONTROL_PADCONF_I2C2_SCL_OFFSET 0x0f3
272 #define OMAP2430_CONTROL_PADCONF_I2C2_SDA_OFFSET 0x0f4
273 #define OMAP2430_CONTROL_PADCONF_HDQ_SIO_OFFSET 0x0f5
274 #define OMAP2430_CONTROL_PADCONF_UART3_CTS_RCTX_OFFSET 0x0f6
275 #define OMAP2430_CONTROL_PADCONF_UART3_RTS_SD_OFFSET 0x0f7
276 #define OMAP2430_CONTROL_PADCONF_UART3_TX_IRTX_OFFSET 0x0f8
277 #define OMAP2430_CONTROL_PADCONF_UART3_RX_IRRX_OFFSET 0x0f9
278 #define OMAP2430_CONTROL_PADCONF_GPIO_7_OFFSET 0x0fa
279 #define OMAP2430_CONTROL_PADCONF_GPIO_78_OFFSET 0x0fb
280 #define OMAP2430_CONTROL_PADCONF_GPIO_79_OFFSET 0x0fc
281 #define OMAP2430_CONTROL_PADCONF_GPIO_80_OFFSET 0x0fd
282 #define OMAP2430_CONTROL_PADCONF_GPIO_113_OFFSET 0x0fe
283 #define OMAP2430_CONTROL_PADCONF_GPIO_114_OFFSET 0x0ff
284 #define OMAP2430_CONTROL_PADCONF_GPIO_115_OFFSET 0x100
285 #define OMAP2430_CONTROL_PADCONF_GPIO_116_OFFSET 0x101
286 #define OMAP2430_CONTROL_PADCONF_SYS_DRM_MSECURE_OFFSET 0x102
287 #define OMAP2430_CONTROL_PADCONF_USB0HS_DATA3_OFFSET 0x103
288 #define OMAP2430_CONTROL_PADCONF_USB0HS_DATA4_OFFSET 0x104
289 #define OMAP2430_CONTROL_PADCONF_USB0HS_DATA5_OFFSET 0x105
290 #define OMAP2430_CONTROL_PADCONF_USB0HS_DATA6_OFFSET 0x106
291 #define OMAP2430_CONTROL_PADCONF_USB0HS_DATA2_OFFSET 0x107
292 #define OMAP2430_CONTROL_PADCONF_USB0HS_DATA0_OFFSET 0x108
293 #define OMAP2430_CONTROL_PADCONF_USB0HS_DATA1_OFFSET 0x109
294 #define OMAP2430_CONTROL_PADCONF_USB0HS_CLK_OFFSET 0x10a
295 #define OMAP2430_CONTROL_PADCONF_USB0HS_DIR_OFFSET 0x10b
296 #define OMAP2430_CONTROL_PADCONF_USB0HS_STP_OFFSET 0x10c
297 #define OMAP2430_CONTROL_PADCONF_USB0HS_NXT_OFFSET 0x10d
298 #define OMAP2430_CONTROL_PADCONF_USB0HS_DATA7_OFFSET 0x10e
299 #define OMAP2430_CONTROL_PADCONF_TV_OUT_OFFSET 0x10f
300 #define OMAP2430_CONTROL_PADCONF_TV_VREF_OFFSET 0x110
301 #define OMAP2430_CONTROL_PADCONF_TV_RSET_OFFSET 0x111
302 #define OMAP2430_CONTROL_PADCONF_TV_VFB_OFFSET 0x112
303 #define OMAP2430_CONTROL_PADCONF_TV_DACOUT_OFFSET 0x113
304 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD0_OFFSET 0x114
305 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD1_OFFSET 0x115
306 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD2_OFFSET 0x116
307 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD3_OFFSET 0x117
308 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD4_OFFSET 0x118
309 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD5_OFFSET 0x119
310 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD6_OFFSET 0x11a
311 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD7_OFFSET 0x11b
312 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD8_OFFSET 0x11c
313 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD9_OFFSET 0x11d
314 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD10_OFFSET 0x11e
315 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD11_OFFSET 0x11f
316 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD12_OFFSET 0x120
317 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD13_OFFSET 0x121
318 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD14_OFFSET 0x122
319 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD15_OFFSET 0x123
320 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD16_OFFSET 0x124
321 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD17_OFFSET 0x125
322 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD18_OFFSET 0x126
323 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD19_OFFSET 0x127
324 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD20_OFFSET 0x128
325 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD21_OFFSET 0x129
326 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD22_OFFSET 0x12a
327 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD23_OFFSET 0x12b
328 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD24_OFFSET 0x12c
329 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD25_OFFSET 0x12d
330 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD26_OFFSET 0x12e
331 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD27_OFFSET 0x12f
332 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD28_OFFSET 0x130
333 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD29_OFFSET 0x131
334 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD30_OFFSET 0x132
335 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD31_OFFSET 0x133
336 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD32_OFFSET 0x134
337 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD33_OFFSET 0x135
338 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD34_OFFSET 0x136
339 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD35_OFFSET 0x137
340 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD36_OFFSET 0x138
341 #define OMAP2430_CONTROL_PADCONF_AD2DMCAD37_OFFSET 0x139
342 #define OMAP2430_CONTROL_PADCONF_AD2DMWRITE_OFFSET 0x13a
343 #define OMAP2430_CONTROL_PADCONF_D2DCLK26MI_OFFSET 0x13b
344 #define OMAP2430_CONTROL_PADCONF_D2DNRESPWRON1_OFFSET 0x13c
345 #define OMAP2430_CONTROL_PADCONF_D2DNRESWARM_OFFSET 0x13d
346 #define OMAP2430_CONTROL_PADCONF_D2DARM9NIRQ_OFFSET 0x13e
347 #define OMAP2430_CONTROL_PADCONF_D2DUMA2P6FIQ_OFFSET 0x13f
348 #define OMAP2430_CONTROL_PADCONF_D2DSPINT_OFFSET 0x140
349 #define OMAP2430_CONTROL_PADCONF_D2DFRINT_OFFSET 0x141
350 #define OMAP2430_CONTROL_PADCONF_D2DDMAREQ0_OFFSET 0x142
351 #define OMAP2430_CONTROL_PADCONF_D2DDMAREQ1_OFFSET 0x143
352 #define OMAP2430_CONTROL_PADCONF_D2DDMAREQ2_OFFSET 0x144
353 #define OMAP2430_CONTROL_PADCONF_D2DDMAREQ3_OFFSET 0x145
354 #define OMAP2430_CONTROL_PADCONF_D2DN3GTRST_OFFSET 0x146
355 #define OMAP2430_CONTROL_PADCONF_D2DN3GTDI_OFFSET 0x147
356 #define OMAP2430_CONTROL_PADCONF_D2DN3GTDO_OFFSET 0x148
357 #define OMAP2430_CONTROL_PADCONF_D2DN3GTMS_OFFSET 0x149
358 #define OMAP2430_CONTROL_PADCONF_D2DN3GTCK_OFFSET 0x14a
359 #define OMAP2430_CONTROL_PADCONF_D2DN3GRTCK_OFFSET 0x14b
360 #define OMAP2430_CONTROL_PADCONF_D2DMSTDBY_OFFSET 0x14c
361 #define OMAP2430_CONTROL_PADCONF_AD2DSREAD_OFFSET 0x14d
362 #define OMAP2430_CONTROL_PADCONF_D2DSWAKEUP_OFFSET 0x14e
363 #define OMAP2430_CONTROL_PADCONF_D2DIDLEREQ_OFFSET 0x14f
364 #define OMAP2430_CONTROL_PADCONF_D2DIDLEACK_OFFSET 0x150
365 #define OMAP2430_CONTROL_PADCONF_D2DSPARE0_OFFSET 0x151
366 #define OMAP2430_CONTROL_PADCONF_AD2DSWRITE_OFFSET 0x152
367 #define OMAP2430_CONTROL_PADCONF_AD2DMREAD_OFFSET 0x153
369 #define OMAP2430_CONTROL_PADCONF_MUX_SIZE \
370 (OMAP2430_CONTROL_PADCONF_AD2DMREAD_OFFSET + 0x1)
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