Merge branch 'for-3.8' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/cgroup
[deliverable/linux.git] / arch / arm / mach-omap2 / omap_hwmod.c
1 /*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
6 *
7 * Paul Walmsley, BenoƮt Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
27 *
28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128 #undef DEBUG
129
130 #include <linux/kernel.h>
131 #include <linux/errno.h>
132 #include <linux/io.h>
133 #include <linux/clk.h>
134 #include <linux/delay.h>
135 #include <linux/err.h>
136 #include <linux/list.h>
137 #include <linux/mutex.h>
138 #include <linux/spinlock.h>
139 #include <linux/slab.h>
140 #include <linux/bootmem.h>
141
142 #include <plat/clock.h>
143 #include <plat/omap_hwmod.h>
144 #include <plat/prcm.h>
145
146 #include "soc.h"
147 #include "common.h"
148 #include "clockdomain.h"
149 #include "powerdomain.h"
150 #include "cm2xxx_3xxx.h"
151 #include "cminst44xx.h"
152 #include "cm33xx.h"
153 #include "prm2xxx_3xxx.h"
154 #include "prm44xx.h"
155 #include "prm33xx.h"
156 #include "prminst44xx.h"
157 #include "mux.h"
158 #include "pm.h"
159
160 /* Maximum microseconds to wait for OMAP module to softreset */
161 #define MAX_MODULE_SOFTRESET_WAIT 10000
162
163 /* Name of the OMAP hwmod for the MPU */
164 #define MPU_INITIATOR_NAME "mpu"
165
166 /*
167 * Number of struct omap_hwmod_link records per struct
168 * omap_hwmod_ocp_if record (master->slave and slave->master)
169 */
170 #define LINKS_PER_OCP_IF 2
171
172 /**
173 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
174 * @enable_module: function to enable a module (via MODULEMODE)
175 * @disable_module: function to disable a module (via MODULEMODE)
176 *
177 * XXX Eventually this functionality will be hidden inside the PRM/CM
178 * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
179 * conditionals in this code.
180 */
181 struct omap_hwmod_soc_ops {
182 void (*enable_module)(struct omap_hwmod *oh);
183 int (*disable_module)(struct omap_hwmod *oh);
184 int (*wait_target_ready)(struct omap_hwmod *oh);
185 int (*assert_hardreset)(struct omap_hwmod *oh,
186 struct omap_hwmod_rst_info *ohri);
187 int (*deassert_hardreset)(struct omap_hwmod *oh,
188 struct omap_hwmod_rst_info *ohri);
189 int (*is_hardreset_asserted)(struct omap_hwmod *oh,
190 struct omap_hwmod_rst_info *ohri);
191 int (*init_clkdm)(struct omap_hwmod *oh);
192 };
193
194 /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
195 static struct omap_hwmod_soc_ops soc_ops;
196
197 /* omap_hwmod_list contains all registered struct omap_hwmods */
198 static LIST_HEAD(omap_hwmod_list);
199
200 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
201 static struct omap_hwmod *mpu_oh;
202
203 /* io_chain_lock: used to serialize reconfigurations of the I/O chain */
204 static DEFINE_SPINLOCK(io_chain_lock);
205
206 /*
207 * linkspace: ptr to a buffer that struct omap_hwmod_link records are
208 * allocated from - used to reduce the number of small memory
209 * allocations, which has a significant impact on performance
210 */
211 static struct omap_hwmod_link *linkspace;
212
213 /*
214 * free_ls, max_ls: array indexes into linkspace; representing the
215 * next free struct omap_hwmod_link index, and the maximum number of
216 * struct omap_hwmod_link records allocated (respectively)
217 */
218 static unsigned short free_ls, max_ls, ls_supp;
219
220 /* inited: set to true once the hwmod code is initialized */
221 static bool inited;
222
223 /* Private functions */
224
225 /**
226 * _fetch_next_ocp_if - return the next OCP interface in a list
227 * @p: ptr to a ptr to the list_head inside the ocp_if to return
228 * @i: pointer to the index of the element pointed to by @p in the list
229 *
230 * Return a pointer to the struct omap_hwmod_ocp_if record
231 * containing the struct list_head pointed to by @p, and increment
232 * @p such that a future call to this routine will return the next
233 * record.
234 */
235 static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
236 int *i)
237 {
238 struct omap_hwmod_ocp_if *oi;
239
240 oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
241 *p = (*p)->next;
242
243 *i = *i + 1;
244
245 return oi;
246 }
247
248 /**
249 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
250 * @oh: struct omap_hwmod *
251 *
252 * Load the current value of the hwmod OCP_SYSCONFIG register into the
253 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
254 * OCP_SYSCONFIG register or 0 upon success.
255 */
256 static int _update_sysc_cache(struct omap_hwmod *oh)
257 {
258 if (!oh->class->sysc) {
259 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
260 return -EINVAL;
261 }
262
263 /* XXX ensure module interface clock is up */
264
265 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
266
267 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
268 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
269
270 return 0;
271 }
272
273 /**
274 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
275 * @v: OCP_SYSCONFIG value to write
276 * @oh: struct omap_hwmod *
277 *
278 * Write @v into the module class' OCP_SYSCONFIG register, if it has
279 * one. No return value.
280 */
281 static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
282 {
283 if (!oh->class->sysc) {
284 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
285 return;
286 }
287
288 /* XXX ensure module interface clock is up */
289
290 /* Module might have lost context, always update cache and register */
291 oh->_sysc_cache = v;
292 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
293 }
294
295 /**
296 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
297 * @oh: struct omap_hwmod *
298 * @standbymode: MIDLEMODE field bits
299 * @v: pointer to register contents to modify
300 *
301 * Update the master standby mode bits in @v to be @standbymode for
302 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
303 * upon error or 0 upon success.
304 */
305 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
306 u32 *v)
307 {
308 u32 mstandby_mask;
309 u8 mstandby_shift;
310
311 if (!oh->class->sysc ||
312 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
313 return -EINVAL;
314
315 if (!oh->class->sysc->sysc_fields) {
316 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
317 return -EINVAL;
318 }
319
320 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
321 mstandby_mask = (0x3 << mstandby_shift);
322
323 *v &= ~mstandby_mask;
324 *v |= __ffs(standbymode) << mstandby_shift;
325
326 return 0;
327 }
328
329 /**
330 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
331 * @oh: struct omap_hwmod *
332 * @idlemode: SIDLEMODE field bits
333 * @v: pointer to register contents to modify
334 *
335 * Update the slave idle mode bits in @v to be @idlemode for the @oh
336 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
337 * or 0 upon success.
338 */
339 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
340 {
341 u32 sidle_mask;
342 u8 sidle_shift;
343
344 if (!oh->class->sysc ||
345 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
346 return -EINVAL;
347
348 if (!oh->class->sysc->sysc_fields) {
349 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
350 return -EINVAL;
351 }
352
353 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
354 sidle_mask = (0x3 << sidle_shift);
355
356 *v &= ~sidle_mask;
357 *v |= __ffs(idlemode) << sidle_shift;
358
359 return 0;
360 }
361
362 /**
363 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
364 * @oh: struct omap_hwmod *
365 * @clockact: CLOCKACTIVITY field bits
366 * @v: pointer to register contents to modify
367 *
368 * Update the clockactivity mode bits in @v to be @clockact for the
369 * @oh hwmod. Used for additional powersaving on some modules. Does
370 * not write to the hardware. Returns -EINVAL upon error or 0 upon
371 * success.
372 */
373 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
374 {
375 u32 clkact_mask;
376 u8 clkact_shift;
377
378 if (!oh->class->sysc ||
379 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
380 return -EINVAL;
381
382 if (!oh->class->sysc->sysc_fields) {
383 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
384 return -EINVAL;
385 }
386
387 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
388 clkact_mask = (0x3 << clkact_shift);
389
390 *v &= ~clkact_mask;
391 *v |= clockact << clkact_shift;
392
393 return 0;
394 }
395
396 /**
397 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
398 * @oh: struct omap_hwmod *
399 * @v: pointer to register contents to modify
400 *
401 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
402 * error or 0 upon success.
403 */
404 static int _set_softreset(struct omap_hwmod *oh, u32 *v)
405 {
406 u32 softrst_mask;
407
408 if (!oh->class->sysc ||
409 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
410 return -EINVAL;
411
412 if (!oh->class->sysc->sysc_fields) {
413 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
414 return -EINVAL;
415 }
416
417 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
418
419 *v |= softrst_mask;
420
421 return 0;
422 }
423
424 /**
425 * _wait_softreset_complete - wait for an OCP softreset to complete
426 * @oh: struct omap_hwmod * to wait on
427 *
428 * Wait until the IP block represented by @oh reports that its OCP
429 * softreset is complete. This can be triggered by software (see
430 * _ocp_softreset()) or by hardware upon returning from off-mode (one
431 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
432 * microseconds. Returns the number of microseconds waited.
433 */
434 static int _wait_softreset_complete(struct omap_hwmod *oh)
435 {
436 struct omap_hwmod_class_sysconfig *sysc;
437 u32 softrst_mask;
438 int c = 0;
439
440 sysc = oh->class->sysc;
441
442 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
443 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
444 & SYSS_RESETDONE_MASK),
445 MAX_MODULE_SOFTRESET_WAIT, c);
446 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
447 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
448 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
449 & softrst_mask),
450 MAX_MODULE_SOFTRESET_WAIT, c);
451 }
452
453 return c;
454 }
455
456 /**
457 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
458 * @oh: struct omap_hwmod *
459 *
460 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
461 * of some modules. When the DMA must perform read/write accesses, the
462 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
463 * for power management, software must set the DMADISABLE bit back to 1.
464 *
465 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
466 * error or 0 upon success.
467 */
468 static int _set_dmadisable(struct omap_hwmod *oh)
469 {
470 u32 v;
471 u32 dmadisable_mask;
472
473 if (!oh->class->sysc ||
474 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
475 return -EINVAL;
476
477 if (!oh->class->sysc->sysc_fields) {
478 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
479 return -EINVAL;
480 }
481
482 /* clocks must be on for this operation */
483 if (oh->_state != _HWMOD_STATE_ENABLED) {
484 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
485 return -EINVAL;
486 }
487
488 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
489
490 v = oh->_sysc_cache;
491 dmadisable_mask =
492 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
493 v |= dmadisable_mask;
494 _write_sysconfig(v, oh);
495
496 return 0;
497 }
498
499 /**
500 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
501 * @oh: struct omap_hwmod *
502 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
503 * @v: pointer to register contents to modify
504 *
505 * Update the module autoidle bit in @v to be @autoidle for the @oh
506 * hwmod. The autoidle bit controls whether the module can gate
507 * internal clocks automatically when it isn't doing anything; the
508 * exact function of this bit varies on a per-module basis. This
509 * function does not write to the hardware. Returns -EINVAL upon
510 * error or 0 upon success.
511 */
512 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
513 u32 *v)
514 {
515 u32 autoidle_mask;
516 u8 autoidle_shift;
517
518 if (!oh->class->sysc ||
519 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
520 return -EINVAL;
521
522 if (!oh->class->sysc->sysc_fields) {
523 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
524 return -EINVAL;
525 }
526
527 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
528 autoidle_mask = (0x1 << autoidle_shift);
529
530 *v &= ~autoidle_mask;
531 *v |= autoidle << autoidle_shift;
532
533 return 0;
534 }
535
536 /**
537 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
538 * @oh: struct omap_hwmod *
539 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
540 *
541 * Set or clear the I/O pad wakeup flag in the mux entries for the
542 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
543 * in memory. If the hwmod is currently idled, and the new idle
544 * values don't match the previous ones, this function will also
545 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
546 * currently idled, this function won't touch the hardware: the new
547 * mux settings are written to the SCM PADCTRL registers when the
548 * hwmod is idled. No return value.
549 */
550 static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
551 {
552 struct omap_device_pad *pad;
553 bool change = false;
554 u16 prev_idle;
555 int j;
556
557 if (!oh->mux || !oh->mux->enabled)
558 return;
559
560 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
561 pad = oh->mux->pads_dynamic[j];
562
563 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
564 continue;
565
566 prev_idle = pad->idle;
567
568 if (set_wake)
569 pad->idle |= OMAP_WAKEUP_EN;
570 else
571 pad->idle &= ~OMAP_WAKEUP_EN;
572
573 if (prev_idle != pad->idle)
574 change = true;
575 }
576
577 if (change && oh->_state == _HWMOD_STATE_IDLE)
578 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
579 }
580
581 /**
582 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
583 * @oh: struct omap_hwmod *
584 *
585 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
586 * upon error or 0 upon success.
587 */
588 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
589 {
590 if (!oh->class->sysc ||
591 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
592 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
593 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
594 return -EINVAL;
595
596 if (!oh->class->sysc->sysc_fields) {
597 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
598 return -EINVAL;
599 }
600
601 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
602 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
603
604 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
605 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
606 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
607 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
608
609 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
610
611 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
612
613 return 0;
614 }
615
616 /**
617 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
618 * @oh: struct omap_hwmod *
619 *
620 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
621 * upon error or 0 upon success.
622 */
623 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
624 {
625 if (!oh->class->sysc ||
626 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
627 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
628 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
629 return -EINVAL;
630
631 if (!oh->class->sysc->sysc_fields) {
632 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
633 return -EINVAL;
634 }
635
636 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
637 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
638
639 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
640 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
641 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
642 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
643
644 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
645
646 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
647
648 return 0;
649 }
650
651 /**
652 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
653 * @oh: struct omap_hwmod *
654 *
655 * Prevent the hardware module @oh from entering idle while the
656 * hardare module initiator @init_oh is active. Useful when a module
657 * will be accessed by a particular initiator (e.g., if a module will
658 * be accessed by the IVA, there should be a sleepdep between the IVA
659 * initiator and the module). Only applies to modules in smart-idle
660 * mode. If the clockdomain is marked as not needing autodeps, return
661 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
662 * passes along clkdm_add_sleepdep() value upon success.
663 */
664 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
665 {
666 if (!oh->_clk)
667 return -EINVAL;
668
669 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
670 return 0;
671
672 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
673 }
674
675 /**
676 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
677 * @oh: struct omap_hwmod *
678 *
679 * Allow the hardware module @oh to enter idle while the hardare
680 * module initiator @init_oh is active. Useful when a module will not
681 * be accessed by a particular initiator (e.g., if a module will not
682 * be accessed by the IVA, there should be no sleepdep between the IVA
683 * initiator and the module). Only applies to modules in smart-idle
684 * mode. If the clockdomain is marked as not needing autodeps, return
685 * 0 without doing anything. Returns -EINVAL upon error or passes
686 * along clkdm_del_sleepdep() value upon success.
687 */
688 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
689 {
690 if (!oh->_clk)
691 return -EINVAL;
692
693 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
694 return 0;
695
696 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
697 }
698
699 /**
700 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
701 * @oh: struct omap_hwmod *
702 *
703 * Called from _init_clocks(). Populates the @oh _clk (main
704 * functional clock pointer) if a main_clk is present. Returns 0 on
705 * success or -EINVAL on error.
706 */
707 static int _init_main_clk(struct omap_hwmod *oh)
708 {
709 int ret = 0;
710
711 if (!oh->main_clk)
712 return 0;
713
714 oh->_clk = clk_get(NULL, oh->main_clk);
715 if (IS_ERR(oh->_clk)) {
716 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
717 oh->name, oh->main_clk);
718 return -EINVAL;
719 }
720 /*
721 * HACK: This needs a re-visit once clk_prepare() is implemented
722 * to do something meaningful. Today its just a no-op.
723 * If clk_prepare() is used at some point to do things like
724 * voltage scaling etc, then this would have to be moved to
725 * some point where subsystems like i2c and pmic become
726 * available.
727 */
728 clk_prepare(oh->_clk);
729
730 if (!oh->_clk->clkdm)
731 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
732 oh->name, oh->main_clk);
733
734 return ret;
735 }
736
737 /**
738 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
739 * @oh: struct omap_hwmod *
740 *
741 * Called from _init_clocks(). Populates the @oh OCP slave interface
742 * clock pointers. Returns 0 on success or -EINVAL on error.
743 */
744 static int _init_interface_clks(struct omap_hwmod *oh)
745 {
746 struct omap_hwmod_ocp_if *os;
747 struct list_head *p;
748 struct clk *c;
749 int i = 0;
750 int ret = 0;
751
752 p = oh->slave_ports.next;
753
754 while (i < oh->slaves_cnt) {
755 os = _fetch_next_ocp_if(&p, &i);
756 if (!os->clk)
757 continue;
758
759 c = clk_get(NULL, os->clk);
760 if (IS_ERR(c)) {
761 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
762 oh->name, os->clk);
763 ret = -EINVAL;
764 }
765 os->_clk = c;
766 /*
767 * HACK: This needs a re-visit once clk_prepare() is implemented
768 * to do something meaningful. Today its just a no-op.
769 * If clk_prepare() is used at some point to do things like
770 * voltage scaling etc, then this would have to be moved to
771 * some point where subsystems like i2c and pmic become
772 * available.
773 */
774 clk_prepare(os->_clk);
775 }
776
777 return ret;
778 }
779
780 /**
781 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
782 * @oh: struct omap_hwmod *
783 *
784 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
785 * clock pointers. Returns 0 on success or -EINVAL on error.
786 */
787 static int _init_opt_clks(struct omap_hwmod *oh)
788 {
789 struct omap_hwmod_opt_clk *oc;
790 struct clk *c;
791 int i;
792 int ret = 0;
793
794 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
795 c = clk_get(NULL, oc->clk);
796 if (IS_ERR(c)) {
797 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
798 oh->name, oc->clk);
799 ret = -EINVAL;
800 }
801 oc->_clk = c;
802 /*
803 * HACK: This needs a re-visit once clk_prepare() is implemented
804 * to do something meaningful. Today its just a no-op.
805 * If clk_prepare() is used at some point to do things like
806 * voltage scaling etc, then this would have to be moved to
807 * some point where subsystems like i2c and pmic become
808 * available.
809 */
810 clk_prepare(oc->_clk);
811 }
812
813 return ret;
814 }
815
816 /**
817 * _enable_clocks - enable hwmod main clock and interface clocks
818 * @oh: struct omap_hwmod *
819 *
820 * Enables all clocks necessary for register reads and writes to succeed
821 * on the hwmod @oh. Returns 0.
822 */
823 static int _enable_clocks(struct omap_hwmod *oh)
824 {
825 struct omap_hwmod_ocp_if *os;
826 struct list_head *p;
827 int i = 0;
828
829 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
830
831 if (oh->_clk)
832 clk_enable(oh->_clk);
833
834 p = oh->slave_ports.next;
835
836 while (i < oh->slaves_cnt) {
837 os = _fetch_next_ocp_if(&p, &i);
838
839 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
840 clk_enable(os->_clk);
841 }
842
843 /* The opt clocks are controlled by the device driver. */
844
845 return 0;
846 }
847
848 /**
849 * _disable_clocks - disable hwmod main clock and interface clocks
850 * @oh: struct omap_hwmod *
851 *
852 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
853 */
854 static int _disable_clocks(struct omap_hwmod *oh)
855 {
856 struct omap_hwmod_ocp_if *os;
857 struct list_head *p;
858 int i = 0;
859
860 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
861
862 if (oh->_clk)
863 clk_disable(oh->_clk);
864
865 p = oh->slave_ports.next;
866
867 while (i < oh->slaves_cnt) {
868 os = _fetch_next_ocp_if(&p, &i);
869
870 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
871 clk_disable(os->_clk);
872 }
873
874 /* The opt clocks are controlled by the device driver. */
875
876 return 0;
877 }
878
879 static void _enable_optional_clocks(struct omap_hwmod *oh)
880 {
881 struct omap_hwmod_opt_clk *oc;
882 int i;
883
884 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
885
886 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
887 if (oc->_clk) {
888 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
889 __clk_get_name(oc->_clk));
890 clk_enable(oc->_clk);
891 }
892 }
893
894 static void _disable_optional_clocks(struct omap_hwmod *oh)
895 {
896 struct omap_hwmod_opt_clk *oc;
897 int i;
898
899 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
900
901 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
902 if (oc->_clk) {
903 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
904 __clk_get_name(oc->_clk));
905 clk_disable(oc->_clk);
906 }
907 }
908
909 /**
910 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
911 * @oh: struct omap_hwmod *
912 *
913 * Enables the PRCM module mode related to the hwmod @oh.
914 * No return value.
915 */
916 static void _omap4_enable_module(struct omap_hwmod *oh)
917 {
918 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
919 return;
920
921 pr_debug("omap_hwmod: %s: %s: %d\n",
922 oh->name, __func__, oh->prcm.omap4.modulemode);
923
924 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
925 oh->clkdm->prcm_partition,
926 oh->clkdm->cm_inst,
927 oh->clkdm->clkdm_offs,
928 oh->prcm.omap4.clkctrl_offs);
929 }
930
931 /**
932 * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
933 * @oh: struct omap_hwmod *
934 *
935 * Enables the PRCM module mode related to the hwmod @oh.
936 * No return value.
937 */
938 static void _am33xx_enable_module(struct omap_hwmod *oh)
939 {
940 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
941 return;
942
943 pr_debug("omap_hwmod: %s: %s: %d\n",
944 oh->name, __func__, oh->prcm.omap4.modulemode);
945
946 am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst,
947 oh->clkdm->clkdm_offs,
948 oh->prcm.omap4.clkctrl_offs);
949 }
950
951 /**
952 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
953 * @oh: struct omap_hwmod *
954 *
955 * Wait for a module @oh to enter slave idle. Returns 0 if the module
956 * does not have an IDLEST bit or if the module successfully enters
957 * slave idle; otherwise, pass along the return value of the
958 * appropriate *_cm*_wait_module_idle() function.
959 */
960 static int _omap4_wait_target_disable(struct omap_hwmod *oh)
961 {
962 if (!oh)
963 return -EINVAL;
964
965 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
966 return 0;
967
968 if (oh->flags & HWMOD_NO_IDLEST)
969 return 0;
970
971 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
972 oh->clkdm->cm_inst,
973 oh->clkdm->clkdm_offs,
974 oh->prcm.omap4.clkctrl_offs);
975 }
976
977 /**
978 * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
979 * @oh: struct omap_hwmod *
980 *
981 * Wait for a module @oh to enter slave idle. Returns 0 if the module
982 * does not have an IDLEST bit or if the module successfully enters
983 * slave idle; otherwise, pass along the return value of the
984 * appropriate *_cm*_wait_module_idle() function.
985 */
986 static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
987 {
988 if (!oh)
989 return -EINVAL;
990
991 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
992 return 0;
993
994 if (oh->flags & HWMOD_NO_IDLEST)
995 return 0;
996
997 return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
998 oh->clkdm->clkdm_offs,
999 oh->prcm.omap4.clkctrl_offs);
1000 }
1001
1002 /**
1003 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
1004 * @oh: struct omap_hwmod *oh
1005 *
1006 * Count and return the number of MPU IRQs associated with the hwmod
1007 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
1008 * NULL.
1009 */
1010 static int _count_mpu_irqs(struct omap_hwmod *oh)
1011 {
1012 struct omap_hwmod_irq_info *ohii;
1013 int i = 0;
1014
1015 if (!oh || !oh->mpu_irqs)
1016 return 0;
1017
1018 do {
1019 ohii = &oh->mpu_irqs[i++];
1020 } while (ohii->irq != -1);
1021
1022 return i-1;
1023 }
1024
1025 /**
1026 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
1027 * @oh: struct omap_hwmod *oh
1028 *
1029 * Count and return the number of SDMA request lines associated with
1030 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1031 * if @oh is NULL.
1032 */
1033 static int _count_sdma_reqs(struct omap_hwmod *oh)
1034 {
1035 struct omap_hwmod_dma_info *ohdi;
1036 int i = 0;
1037
1038 if (!oh || !oh->sdma_reqs)
1039 return 0;
1040
1041 do {
1042 ohdi = &oh->sdma_reqs[i++];
1043 } while (ohdi->dma_req != -1);
1044
1045 return i-1;
1046 }
1047
1048 /**
1049 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
1050 * @oh: struct omap_hwmod *oh
1051 *
1052 * Count and return the number of address space ranges associated with
1053 * the hwmod @oh. Used to allocate struct resource data. Returns 0
1054 * if @oh is NULL.
1055 */
1056 static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
1057 {
1058 struct omap_hwmod_addr_space *mem;
1059 int i = 0;
1060
1061 if (!os || !os->addr)
1062 return 0;
1063
1064 do {
1065 mem = &os->addr[i++];
1066 } while (mem->pa_start != mem->pa_end);
1067
1068 return i-1;
1069 }
1070
1071 /**
1072 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
1073 * @oh: struct omap_hwmod * to operate on
1074 * @name: pointer to the name of the MPU interrupt number to fetch (optional)
1075 * @irq: pointer to an unsigned int to store the MPU IRQ number to
1076 *
1077 * Retrieve a MPU hardware IRQ line number named by @name associated
1078 * with the IP block pointed to by @oh. The IRQ number will be filled
1079 * into the address pointed to by @dma. When @name is non-null, the
1080 * IRQ line number associated with the named entry will be returned.
1081 * If @name is null, the first matching entry will be returned. Data
1082 * order is not meaningful in hwmod data, so callers are strongly
1083 * encouraged to use a non-null @name whenever possible to avoid
1084 * unpredictable effects if hwmod data is later added that causes data
1085 * ordering to change. Returns 0 upon success or a negative error
1086 * code upon error.
1087 */
1088 static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
1089 unsigned int *irq)
1090 {
1091 int i;
1092 bool found = false;
1093
1094 if (!oh->mpu_irqs)
1095 return -ENOENT;
1096
1097 i = 0;
1098 while (oh->mpu_irqs[i].irq != -1) {
1099 if (name == oh->mpu_irqs[i].name ||
1100 !strcmp(name, oh->mpu_irqs[i].name)) {
1101 found = true;
1102 break;
1103 }
1104 i++;
1105 }
1106
1107 if (!found)
1108 return -ENOENT;
1109
1110 *irq = oh->mpu_irqs[i].irq;
1111
1112 return 0;
1113 }
1114
1115 /**
1116 * _get_sdma_req_by_name - fetch SDMA request line ID by name
1117 * @oh: struct omap_hwmod * to operate on
1118 * @name: pointer to the name of the SDMA request line to fetch (optional)
1119 * @dma: pointer to an unsigned int to store the request line ID to
1120 *
1121 * Retrieve an SDMA request line ID named by @name on the IP block
1122 * pointed to by @oh. The ID will be filled into the address pointed
1123 * to by @dma. When @name is non-null, the request line ID associated
1124 * with the named entry will be returned. If @name is null, the first
1125 * matching entry will be returned. Data order is not meaningful in
1126 * hwmod data, so callers are strongly encouraged to use a non-null
1127 * @name whenever possible to avoid unpredictable effects if hwmod
1128 * data is later added that causes data ordering to change. Returns 0
1129 * upon success or a negative error code upon error.
1130 */
1131 static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
1132 unsigned int *dma)
1133 {
1134 int i;
1135 bool found = false;
1136
1137 if (!oh->sdma_reqs)
1138 return -ENOENT;
1139
1140 i = 0;
1141 while (oh->sdma_reqs[i].dma_req != -1) {
1142 if (name == oh->sdma_reqs[i].name ||
1143 !strcmp(name, oh->sdma_reqs[i].name)) {
1144 found = true;
1145 break;
1146 }
1147 i++;
1148 }
1149
1150 if (!found)
1151 return -ENOENT;
1152
1153 *dma = oh->sdma_reqs[i].dma_req;
1154
1155 return 0;
1156 }
1157
1158 /**
1159 * _get_addr_space_by_name - fetch address space start & end by name
1160 * @oh: struct omap_hwmod * to operate on
1161 * @name: pointer to the name of the address space to fetch (optional)
1162 * @pa_start: pointer to a u32 to store the starting address to
1163 * @pa_end: pointer to a u32 to store the ending address to
1164 *
1165 * Retrieve address space start and end addresses for the IP block
1166 * pointed to by @oh. The data will be filled into the addresses
1167 * pointed to by @pa_start and @pa_end. When @name is non-null, the
1168 * address space data associated with the named entry will be
1169 * returned. If @name is null, the first matching entry will be
1170 * returned. Data order is not meaningful in hwmod data, so callers
1171 * are strongly encouraged to use a non-null @name whenever possible
1172 * to avoid unpredictable effects if hwmod data is later added that
1173 * causes data ordering to change. Returns 0 upon success or a
1174 * negative error code upon error.
1175 */
1176 static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
1177 u32 *pa_start, u32 *pa_end)
1178 {
1179 int i, j;
1180 struct omap_hwmod_ocp_if *os;
1181 struct list_head *p = NULL;
1182 bool found = false;
1183
1184 p = oh->slave_ports.next;
1185
1186 i = 0;
1187 while (i < oh->slaves_cnt) {
1188 os = _fetch_next_ocp_if(&p, &i);
1189
1190 if (!os->addr)
1191 return -ENOENT;
1192
1193 j = 0;
1194 while (os->addr[j].pa_start != os->addr[j].pa_end) {
1195 if (name == os->addr[j].name ||
1196 !strcmp(name, os->addr[j].name)) {
1197 found = true;
1198 break;
1199 }
1200 j++;
1201 }
1202
1203 if (found)
1204 break;
1205 }
1206
1207 if (!found)
1208 return -ENOENT;
1209
1210 *pa_start = os->addr[j].pa_start;
1211 *pa_end = os->addr[j].pa_end;
1212
1213 return 0;
1214 }
1215
1216 /**
1217 * _save_mpu_port_index - find and save the index to @oh's MPU port
1218 * @oh: struct omap_hwmod *
1219 *
1220 * Determines the array index of the OCP slave port that the MPU uses
1221 * to address the device, and saves it into the struct omap_hwmod.
1222 * Intended to be called during hwmod registration only. No return
1223 * value.
1224 */
1225 static void __init _save_mpu_port_index(struct omap_hwmod *oh)
1226 {
1227 struct omap_hwmod_ocp_if *os = NULL;
1228 struct list_head *p;
1229 int i = 0;
1230
1231 if (!oh)
1232 return;
1233
1234 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1235
1236 p = oh->slave_ports.next;
1237
1238 while (i < oh->slaves_cnt) {
1239 os = _fetch_next_ocp_if(&p, &i);
1240 if (os->user & OCP_USER_MPU) {
1241 oh->_mpu_port = os;
1242 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
1243 break;
1244 }
1245 }
1246
1247 return;
1248 }
1249
1250 /**
1251 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1252 * @oh: struct omap_hwmod *
1253 *
1254 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1255 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1256 * communicate with the IP block. This interface need not be directly
1257 * connected to the MPU (and almost certainly is not), but is directly
1258 * connected to the IP block represented by @oh. Returns a pointer
1259 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1260 * error or if there does not appear to be a path from the MPU to this
1261 * IP block.
1262 */
1263 static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1264 {
1265 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1266 return NULL;
1267
1268 return oh->_mpu_port;
1269 };
1270
1271 /**
1272 * _find_mpu_rt_addr_space - return MPU register target address space for @oh
1273 * @oh: struct omap_hwmod *
1274 *
1275 * Returns a pointer to the struct omap_hwmod_addr_space record representing
1276 * the register target MPU address space; or returns NULL upon error.
1277 */
1278 static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
1279 {
1280 struct omap_hwmod_ocp_if *os;
1281 struct omap_hwmod_addr_space *mem;
1282 int found = 0, i = 0;
1283
1284 os = _find_mpu_rt_port(oh);
1285 if (!os || !os->addr)
1286 return NULL;
1287
1288 do {
1289 mem = &os->addr[i++];
1290 if (mem->flags & ADDR_TYPE_RT)
1291 found = 1;
1292 } while (!found && mem->pa_start != mem->pa_end);
1293
1294 return (found) ? mem : NULL;
1295 }
1296
1297 /**
1298 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1299 * @oh: struct omap_hwmod *
1300 *
1301 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1302 * by @oh is set to indicate to the PRCM that the IP block is active.
1303 * Usually this means placing the module into smart-idle mode and
1304 * smart-standby, but if there is a bug in the automatic idle handling
1305 * for the IP block, it may need to be placed into the force-idle or
1306 * no-idle variants of these modes. No return value.
1307 */
1308 static void _enable_sysc(struct omap_hwmod *oh)
1309 {
1310 u8 idlemode, sf;
1311 u32 v;
1312 bool clkdm_act;
1313
1314 if (!oh->class->sysc)
1315 return;
1316
1317 /*
1318 * Wait until reset has completed, this is needed as the IP
1319 * block is reset automatically by hardware in some cases
1320 * (off-mode for example), and the drivers require the
1321 * IP to be ready when they access it
1322 */
1323 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1324 _enable_optional_clocks(oh);
1325 _wait_softreset_complete(oh);
1326 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1327 _disable_optional_clocks(oh);
1328
1329 v = oh->_sysc_cache;
1330 sf = oh->class->sysc->sysc_flags;
1331
1332 if (sf & SYSC_HAS_SIDLEMODE) {
1333 clkdm_act = ((oh->clkdm &&
1334 oh->clkdm->flags & CLKDM_ACTIVE_WITH_MPU) ||
1335 (oh->_clk && oh->_clk->clkdm &&
1336 oh->_clk->clkdm->flags & CLKDM_ACTIVE_WITH_MPU));
1337 if (clkdm_act && !(oh->class->sysc->idlemodes &
1338 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1339 idlemode = HWMOD_IDLEMODE_FORCE;
1340 else
1341 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1342 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
1343 _set_slave_idlemode(oh, idlemode, &v);
1344 }
1345
1346 if (sf & SYSC_HAS_MIDLEMODE) {
1347 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1348 idlemode = HWMOD_IDLEMODE_NO;
1349 } else {
1350 if (sf & SYSC_HAS_ENAWAKEUP)
1351 _enable_wakeup(oh, &v);
1352 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1353 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1354 else
1355 idlemode = HWMOD_IDLEMODE_SMART;
1356 }
1357 _set_master_standbymode(oh, idlemode, &v);
1358 }
1359
1360 /*
1361 * XXX The clock framework should handle this, by
1362 * calling into this code. But this must wait until the
1363 * clock structures are tagged with omap_hwmod entries
1364 */
1365 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1366 (sf & SYSC_HAS_CLOCKACTIVITY))
1367 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
1368
1369 /* If slave is in SMARTIDLE, also enable wakeup */
1370 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1371 _enable_wakeup(oh, &v);
1372
1373 _write_sysconfig(v, oh);
1374
1375 /*
1376 * Set the autoidle bit only after setting the smartidle bit
1377 * Setting this will not have any impact on the other modules.
1378 */
1379 if (sf & SYSC_HAS_AUTOIDLE) {
1380 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1381 0 : 1;
1382 _set_module_autoidle(oh, idlemode, &v);
1383 _write_sysconfig(v, oh);
1384 }
1385 }
1386
1387 /**
1388 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1389 * @oh: struct omap_hwmod *
1390 *
1391 * If module is marked as SWSUP_SIDLE, force the module into slave
1392 * idle; otherwise, configure it for smart-idle. If module is marked
1393 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1394 * configure it for smart-standby. No return value.
1395 */
1396 static void _idle_sysc(struct omap_hwmod *oh)
1397 {
1398 u8 idlemode, sf;
1399 u32 v;
1400
1401 if (!oh->class->sysc)
1402 return;
1403
1404 v = oh->_sysc_cache;
1405 sf = oh->class->sysc->sysc_flags;
1406
1407 if (sf & SYSC_HAS_SIDLEMODE) {
1408 /* XXX What about HWMOD_IDLEMODE_SMART_WKUP? */
1409 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1410 !(oh->class->sysc->idlemodes &
1411 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1412 idlemode = HWMOD_IDLEMODE_FORCE;
1413 else
1414 idlemode = HWMOD_IDLEMODE_SMART;
1415 _set_slave_idlemode(oh, idlemode, &v);
1416 }
1417
1418 if (sf & SYSC_HAS_MIDLEMODE) {
1419 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1420 idlemode = HWMOD_IDLEMODE_FORCE;
1421 } else {
1422 if (sf & SYSC_HAS_ENAWAKEUP)
1423 _enable_wakeup(oh, &v);
1424 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1425 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1426 else
1427 idlemode = HWMOD_IDLEMODE_SMART;
1428 }
1429 _set_master_standbymode(oh, idlemode, &v);
1430 }
1431
1432 /* If slave is in SMARTIDLE, also enable wakeup */
1433 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1434 _enable_wakeup(oh, &v);
1435
1436 _write_sysconfig(v, oh);
1437 }
1438
1439 /**
1440 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1441 * @oh: struct omap_hwmod *
1442 *
1443 * Force the module into slave idle and master suspend. No return
1444 * value.
1445 */
1446 static void _shutdown_sysc(struct omap_hwmod *oh)
1447 {
1448 u32 v;
1449 u8 sf;
1450
1451 if (!oh->class->sysc)
1452 return;
1453
1454 v = oh->_sysc_cache;
1455 sf = oh->class->sysc->sysc_flags;
1456
1457 if (sf & SYSC_HAS_SIDLEMODE)
1458 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1459
1460 if (sf & SYSC_HAS_MIDLEMODE)
1461 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1462
1463 if (sf & SYSC_HAS_AUTOIDLE)
1464 _set_module_autoidle(oh, 1, &v);
1465
1466 _write_sysconfig(v, oh);
1467 }
1468
1469 /**
1470 * _lookup - find an omap_hwmod by name
1471 * @name: find an omap_hwmod by name
1472 *
1473 * Return a pointer to an omap_hwmod by name, or NULL if not found.
1474 */
1475 static struct omap_hwmod *_lookup(const char *name)
1476 {
1477 struct omap_hwmod *oh, *temp_oh;
1478
1479 oh = NULL;
1480
1481 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1482 if (!strcmp(name, temp_oh->name)) {
1483 oh = temp_oh;
1484 break;
1485 }
1486 }
1487
1488 return oh;
1489 }
1490
1491 /**
1492 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1493 * @oh: struct omap_hwmod *
1494 *
1495 * Convert a clockdomain name stored in a struct omap_hwmod into a
1496 * clockdomain pointer, and save it into the struct omap_hwmod.
1497 * Return -EINVAL if the clkdm_name lookup failed.
1498 */
1499 static int _init_clkdm(struct omap_hwmod *oh)
1500 {
1501 if (!oh->clkdm_name) {
1502 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
1503 return 0;
1504 }
1505
1506 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1507 if (!oh->clkdm) {
1508 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1509 oh->name, oh->clkdm_name);
1510 return -EINVAL;
1511 }
1512
1513 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1514 oh->name, oh->clkdm_name);
1515
1516 return 0;
1517 }
1518
1519 /**
1520 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1521 * well the clockdomain.
1522 * @oh: struct omap_hwmod *
1523 * @data: not used; pass NULL
1524 *
1525 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1526 * Resolves all clock names embedded in the hwmod. Returns 0 on
1527 * success, or a negative error code on failure.
1528 */
1529 static int _init_clocks(struct omap_hwmod *oh, void *data)
1530 {
1531 int ret = 0;
1532
1533 if (oh->_state != _HWMOD_STATE_REGISTERED)
1534 return 0;
1535
1536 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1537
1538 ret |= _init_main_clk(oh);
1539 ret |= _init_interface_clks(oh);
1540 ret |= _init_opt_clks(oh);
1541 if (soc_ops.init_clkdm)
1542 ret |= soc_ops.init_clkdm(oh);
1543
1544 if (!ret)
1545 oh->_state = _HWMOD_STATE_CLKS_INITED;
1546 else
1547 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1548
1549 return ret;
1550 }
1551
1552 /**
1553 * _lookup_hardreset - fill register bit info for this hwmod/reset line
1554 * @oh: struct omap_hwmod *
1555 * @name: name of the reset line in the context of this hwmod
1556 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1557 *
1558 * Return the bit position of the reset line that match the
1559 * input name. Return -ENOENT if not found.
1560 */
1561 static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1562 struct omap_hwmod_rst_info *ohri)
1563 {
1564 int i;
1565
1566 for (i = 0; i < oh->rst_lines_cnt; i++) {
1567 const char *rst_line = oh->rst_lines[i].name;
1568 if (!strcmp(rst_line, name)) {
1569 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1570 ohri->st_shift = oh->rst_lines[i].st_shift;
1571 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1572 oh->name, __func__, rst_line, ohri->rst_shift,
1573 ohri->st_shift);
1574
1575 return 0;
1576 }
1577 }
1578
1579 return -ENOENT;
1580 }
1581
1582 /**
1583 * _assert_hardreset - assert the HW reset line of submodules
1584 * contained in the hwmod module.
1585 * @oh: struct omap_hwmod *
1586 * @name: name of the reset line to lookup and assert
1587 *
1588 * Some IP like dsp, ipu or iva contain processor that require an HW
1589 * reset line to be assert / deassert in order to enable fully the IP.
1590 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1591 * asserting the hardreset line on the currently-booted SoC, or passes
1592 * along the return value from _lookup_hardreset() or the SoC's
1593 * assert_hardreset code.
1594 */
1595 static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1596 {
1597 struct omap_hwmod_rst_info ohri;
1598 int ret = -EINVAL;
1599
1600 if (!oh)
1601 return -EINVAL;
1602
1603 if (!soc_ops.assert_hardreset)
1604 return -ENOSYS;
1605
1606 ret = _lookup_hardreset(oh, name, &ohri);
1607 if (ret < 0)
1608 return ret;
1609
1610 ret = soc_ops.assert_hardreset(oh, &ohri);
1611
1612 return ret;
1613 }
1614
1615 /**
1616 * _deassert_hardreset - deassert the HW reset line of submodules contained
1617 * in the hwmod module.
1618 * @oh: struct omap_hwmod *
1619 * @name: name of the reset line to look up and deassert
1620 *
1621 * Some IP like dsp, ipu or iva contain processor that require an HW
1622 * reset line to be assert / deassert in order to enable fully the IP.
1623 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1624 * deasserting the hardreset line on the currently-booted SoC, or passes
1625 * along the return value from _lookup_hardreset() or the SoC's
1626 * deassert_hardreset code.
1627 */
1628 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1629 {
1630 struct omap_hwmod_rst_info ohri;
1631 int ret = -EINVAL;
1632 int hwsup = 0;
1633
1634 if (!oh)
1635 return -EINVAL;
1636
1637 if (!soc_ops.deassert_hardreset)
1638 return -ENOSYS;
1639
1640 ret = _lookup_hardreset(oh, name, &ohri);
1641 if (IS_ERR_VALUE(ret))
1642 return ret;
1643
1644 if (oh->clkdm) {
1645 /*
1646 * A clockdomain must be in SW_SUP otherwise reset
1647 * might not be completed. The clockdomain can be set
1648 * in HW_AUTO only when the module become ready.
1649 */
1650 hwsup = clkdm_in_hwsup(oh->clkdm);
1651 ret = clkdm_hwmod_enable(oh->clkdm, oh);
1652 if (ret) {
1653 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1654 oh->name, oh->clkdm->name, ret);
1655 return ret;
1656 }
1657 }
1658
1659 _enable_clocks(oh);
1660 if (soc_ops.enable_module)
1661 soc_ops.enable_module(oh);
1662
1663 ret = soc_ops.deassert_hardreset(oh, &ohri);
1664
1665 if (soc_ops.disable_module)
1666 soc_ops.disable_module(oh);
1667 _disable_clocks(oh);
1668
1669 if (ret == -EBUSY)
1670 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1671
1672 if (!ret) {
1673 /*
1674 * Set the clockdomain to HW_AUTO, assuming that the
1675 * previous state was HW_AUTO.
1676 */
1677 if (oh->clkdm && hwsup)
1678 clkdm_allow_idle(oh->clkdm);
1679 } else {
1680 if (oh->clkdm)
1681 clkdm_hwmod_disable(oh->clkdm, oh);
1682 }
1683
1684 return ret;
1685 }
1686
1687 /**
1688 * _read_hardreset - read the HW reset line state of submodules
1689 * contained in the hwmod module
1690 * @oh: struct omap_hwmod *
1691 * @name: name of the reset line to look up and read
1692 *
1693 * Return the state of the reset line. Returns -EINVAL if @oh is
1694 * null, -ENOSYS if we have no way of reading the hardreset line
1695 * status on the currently-booted SoC, or passes along the return
1696 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1697 * code.
1698 */
1699 static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1700 {
1701 struct omap_hwmod_rst_info ohri;
1702 int ret = -EINVAL;
1703
1704 if (!oh)
1705 return -EINVAL;
1706
1707 if (!soc_ops.is_hardreset_asserted)
1708 return -ENOSYS;
1709
1710 ret = _lookup_hardreset(oh, name, &ohri);
1711 if (ret < 0)
1712 return ret;
1713
1714 return soc_ops.is_hardreset_asserted(oh, &ohri);
1715 }
1716
1717 /**
1718 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1719 * @oh: struct omap_hwmod *
1720 *
1721 * If all hardreset lines associated with @oh are asserted, then return true.
1722 * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1723 * associated with @oh are asserted, then return false.
1724 * This function is used to avoid executing some parts of the IP block
1725 * enable/disable sequence if its hardreset line is set.
1726 */
1727 static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
1728 {
1729 int i, rst_cnt = 0;
1730
1731 if (oh->rst_lines_cnt == 0)
1732 return false;
1733
1734 for (i = 0; i < oh->rst_lines_cnt; i++)
1735 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1736 rst_cnt++;
1737
1738 if (oh->rst_lines_cnt == rst_cnt)
1739 return true;
1740
1741 return false;
1742 }
1743
1744 /**
1745 * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1746 * hard-reset
1747 * @oh: struct omap_hwmod *
1748 *
1749 * If any hardreset lines associated with @oh are asserted, then
1750 * return true. Otherwise, if no hardreset lines associated with @oh
1751 * are asserted, or if @oh has no hardreset lines, then return false.
1752 * This function is used to avoid executing some parts of the IP block
1753 * enable/disable sequence if any hardreset line is set.
1754 */
1755 static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1756 {
1757 int rst_cnt = 0;
1758 int i;
1759
1760 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1761 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1762 rst_cnt++;
1763
1764 return (rst_cnt) ? true : false;
1765 }
1766
1767 /**
1768 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1769 * @oh: struct omap_hwmod *
1770 *
1771 * Disable the PRCM module mode related to the hwmod @oh.
1772 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1773 */
1774 static int _omap4_disable_module(struct omap_hwmod *oh)
1775 {
1776 int v;
1777
1778 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1779 return -EINVAL;
1780
1781 /*
1782 * Since integration code might still be doing something, only
1783 * disable if all lines are under hardreset.
1784 */
1785 if (_are_any_hardreset_lines_asserted(oh))
1786 return 0;
1787
1788 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1789
1790 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
1791 oh->clkdm->cm_inst,
1792 oh->clkdm->clkdm_offs,
1793 oh->prcm.omap4.clkctrl_offs);
1794
1795 v = _omap4_wait_target_disable(oh);
1796 if (v)
1797 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1798 oh->name);
1799
1800 return 0;
1801 }
1802
1803 /**
1804 * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX
1805 * @oh: struct omap_hwmod *
1806 *
1807 * Disable the PRCM module mode related to the hwmod @oh.
1808 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1809 */
1810 static int _am33xx_disable_module(struct omap_hwmod *oh)
1811 {
1812 int v;
1813
1814 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1815 return -EINVAL;
1816
1817 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1818
1819 if (_are_any_hardreset_lines_asserted(oh))
1820 return 0;
1821
1822 am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
1823 oh->prcm.omap4.clkctrl_offs);
1824
1825 v = _am33xx_wait_target_disable(oh);
1826 if (v)
1827 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1828 oh->name);
1829
1830 return 0;
1831 }
1832
1833 /**
1834 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1835 * @oh: struct omap_hwmod *
1836 *
1837 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
1838 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1839 * reset this way, -EINVAL if the hwmod is in the wrong state,
1840 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1841 *
1842 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1843 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1844 * use the SYSCONFIG softreset bit to provide the status.
1845 *
1846 * Note that some IP like McBSP do have reset control but don't have
1847 * reset status.
1848 */
1849 static int _ocp_softreset(struct omap_hwmod *oh)
1850 {
1851 u32 v;
1852 int c = 0;
1853 int ret = 0;
1854
1855 if (!oh->class->sysc ||
1856 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1857 return -ENOENT;
1858
1859 /* clocks must be on for this operation */
1860 if (oh->_state != _HWMOD_STATE_ENABLED) {
1861 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1862 oh->name);
1863 return -EINVAL;
1864 }
1865
1866 /* For some modules, all optionnal clocks need to be enabled as well */
1867 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1868 _enable_optional_clocks(oh);
1869
1870 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1871
1872 v = oh->_sysc_cache;
1873 ret = _set_softreset(oh, &v);
1874 if (ret)
1875 goto dis_opt_clks;
1876 _write_sysconfig(v, oh);
1877
1878 if (oh->class->sysc->srst_udelay)
1879 udelay(oh->class->sysc->srst_udelay);
1880
1881 c = _wait_softreset_complete(oh);
1882 if (c == MAX_MODULE_SOFTRESET_WAIT)
1883 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1884 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1885 else
1886 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1887
1888 /*
1889 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1890 * _wait_target_ready() or _reset()
1891 */
1892
1893 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1894
1895 dis_opt_clks:
1896 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1897 _disable_optional_clocks(oh);
1898
1899 return ret;
1900 }
1901
1902 /**
1903 * _reset - reset an omap_hwmod
1904 * @oh: struct omap_hwmod *
1905 *
1906 * Resets an omap_hwmod @oh. If the module has a custom reset
1907 * function pointer defined, then call it to reset the IP block, and
1908 * pass along its return value to the caller. Otherwise, if the IP
1909 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1910 * associated with it, call a function to reset the IP block via that
1911 * method, and pass along the return value to the caller. Finally, if
1912 * the IP block has some hardreset lines associated with it, assert
1913 * all of those, but do _not_ deassert them. (This is because driver
1914 * authors have expressed an apparent requirement to control the
1915 * deassertion of the hardreset lines themselves.)
1916 *
1917 * The default software reset mechanism for most OMAP IP blocks is
1918 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1919 * hwmods cannot be reset via this method. Some are not targets and
1920 * therefore have no OCP header registers to access. Others (like the
1921 * IVA) have idiosyncratic reset sequences. So for these relatively
1922 * rare cases, custom reset code can be supplied in the struct
1923 * omap_hwmod_class .reset function pointer.
1924 *
1925 * _set_dmadisable() is called to set the DMADISABLE bit so that it
1926 * does not prevent idling of the system. This is necessary for cases
1927 * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1928 * kernel without disabling dma.
1929 *
1930 * Passes along the return value from either _ocp_softreset() or the
1931 * custom reset function - these must return -EINVAL if the hwmod
1932 * cannot be reset this way or if the hwmod is in the wrong state,
1933 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1934 */
1935 static int _reset(struct omap_hwmod *oh)
1936 {
1937 int i, r;
1938
1939 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1940
1941 if (oh->class->reset) {
1942 r = oh->class->reset(oh);
1943 } else {
1944 if (oh->rst_lines_cnt > 0) {
1945 for (i = 0; i < oh->rst_lines_cnt; i++)
1946 _assert_hardreset(oh, oh->rst_lines[i].name);
1947 return 0;
1948 } else {
1949 r = _ocp_softreset(oh);
1950 if (r == -ENOENT)
1951 r = 0;
1952 }
1953 }
1954
1955 _set_dmadisable(oh);
1956
1957 /*
1958 * OCP_SYSCONFIG bits need to be reprogrammed after a
1959 * softreset. The _enable() function should be split to avoid
1960 * the rewrite of the OCP_SYSCONFIG register.
1961 */
1962 if (oh->class->sysc) {
1963 _update_sysc_cache(oh);
1964 _enable_sysc(oh);
1965 }
1966
1967 return r;
1968 }
1969
1970 /**
1971 * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain
1972 *
1973 * Call the appropriate PRM function to clear any logged I/O chain
1974 * wakeups and to reconfigure the chain. This apparently needs to be
1975 * done upon every mux change. Since hwmods can be concurrently
1976 * enabled and idled, hold a spinlock around the I/O chain
1977 * reconfiguration sequence. No return value.
1978 *
1979 * XXX When the PRM code is moved to drivers, this function can be removed,
1980 * as the PRM infrastructure should abstract this.
1981 */
1982 static void _reconfigure_io_chain(void)
1983 {
1984 unsigned long flags;
1985
1986 spin_lock_irqsave(&io_chain_lock, flags);
1987
1988 if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl())
1989 omap3xxx_prm_reconfigure_io_chain();
1990 else if (cpu_is_omap44xx())
1991 omap44xx_prm_reconfigure_io_chain();
1992
1993 spin_unlock_irqrestore(&io_chain_lock, flags);
1994 }
1995
1996 /**
1997 * _enable - enable an omap_hwmod
1998 * @oh: struct omap_hwmod *
1999 *
2000 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
2001 * register target. Returns -EINVAL if the hwmod is in the wrong
2002 * state or passes along the return value of _wait_target_ready().
2003 */
2004 static int _enable(struct omap_hwmod *oh)
2005 {
2006 int r;
2007 int hwsup = 0;
2008
2009 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
2010
2011 /*
2012 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
2013 * state at init. Now that someone is really trying to enable
2014 * them, just ensure that the hwmod mux is set.
2015 */
2016 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
2017 /*
2018 * If the caller has mux data populated, do the mux'ing
2019 * which wouldn't have been done as part of the _enable()
2020 * done during setup.
2021 */
2022 if (oh->mux)
2023 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
2024
2025 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
2026 return 0;
2027 }
2028
2029 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
2030 oh->_state != _HWMOD_STATE_IDLE &&
2031 oh->_state != _HWMOD_STATE_DISABLED) {
2032 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
2033 oh->name);
2034 return -EINVAL;
2035 }
2036
2037 /*
2038 * If an IP block contains HW reset lines and all of them are
2039 * asserted, we let integration code associated with that
2040 * block handle the enable. We've received very little
2041 * information on what those driver authors need, and until
2042 * detailed information is provided and the driver code is
2043 * posted to the public lists, this is probably the best we
2044 * can do.
2045 */
2046 if (_are_all_hardreset_lines_asserted(oh))
2047 return 0;
2048
2049 /* Mux pins for device runtime if populated */
2050 if (oh->mux && (!oh->mux->enabled ||
2051 ((oh->_state == _HWMOD_STATE_IDLE) &&
2052 oh->mux->pads_dynamic))) {
2053 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
2054 _reconfigure_io_chain();
2055 }
2056
2057 _add_initiator_dep(oh, mpu_oh);
2058
2059 if (oh->clkdm) {
2060 /*
2061 * A clockdomain must be in SW_SUP before enabling
2062 * completely the module. The clockdomain can be set
2063 * in HW_AUTO only when the module become ready.
2064 */
2065 hwsup = clkdm_in_hwsup(oh->clkdm) &&
2066 !clkdm_missing_idle_reporting(oh->clkdm);
2067 r = clkdm_hwmod_enable(oh->clkdm, oh);
2068 if (r) {
2069 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
2070 oh->name, oh->clkdm->name, r);
2071 return r;
2072 }
2073 }
2074
2075 _enable_clocks(oh);
2076 if (soc_ops.enable_module)
2077 soc_ops.enable_module(oh);
2078
2079 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
2080 -EINVAL;
2081 if (!r) {
2082 /*
2083 * Set the clockdomain to HW_AUTO only if the target is ready,
2084 * assuming that the previous state was HW_AUTO
2085 */
2086 if (oh->clkdm && hwsup)
2087 clkdm_allow_idle(oh->clkdm);
2088
2089 oh->_state = _HWMOD_STATE_ENABLED;
2090
2091 /* Access the sysconfig only if the target is ready */
2092 if (oh->class->sysc) {
2093 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
2094 _update_sysc_cache(oh);
2095 _enable_sysc(oh);
2096 }
2097 } else {
2098 _omap4_disable_module(oh);
2099 _disable_clocks(oh);
2100 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
2101 oh->name, r);
2102
2103 if (oh->clkdm)
2104 clkdm_hwmod_disable(oh->clkdm, oh);
2105 }
2106
2107 return r;
2108 }
2109
2110 /**
2111 * _idle - idle an omap_hwmod
2112 * @oh: struct omap_hwmod *
2113 *
2114 * Idles an omap_hwmod @oh. This should be called once the hwmod has
2115 * no further work. Returns -EINVAL if the hwmod is in the wrong
2116 * state or returns 0.
2117 */
2118 static int _idle(struct omap_hwmod *oh)
2119 {
2120 pr_debug("omap_hwmod: %s: idling\n", oh->name);
2121
2122 if (oh->_state != _HWMOD_STATE_ENABLED) {
2123 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
2124 oh->name);
2125 return -EINVAL;
2126 }
2127
2128 if (_are_all_hardreset_lines_asserted(oh))
2129 return 0;
2130
2131 if (oh->class->sysc)
2132 _idle_sysc(oh);
2133 _del_initiator_dep(oh, mpu_oh);
2134
2135 if (soc_ops.disable_module)
2136 soc_ops.disable_module(oh);
2137
2138 /*
2139 * The module must be in idle mode before disabling any parents
2140 * clocks. Otherwise, the parent clock might be disabled before
2141 * the module transition is done, and thus will prevent the
2142 * transition to complete properly.
2143 */
2144 _disable_clocks(oh);
2145 if (oh->clkdm)
2146 clkdm_hwmod_disable(oh->clkdm, oh);
2147
2148 /* Mux pins for device idle if populated */
2149 if (oh->mux && oh->mux->pads_dynamic) {
2150 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
2151 _reconfigure_io_chain();
2152 }
2153
2154 oh->_state = _HWMOD_STATE_IDLE;
2155
2156 return 0;
2157 }
2158
2159 /**
2160 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
2161 * @oh: struct omap_hwmod *
2162 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
2163 *
2164 * Sets the IP block's OCP autoidle bit in hardware, and updates our
2165 * local copy. Intended to be used by drivers that require
2166 * direct manipulation of the AUTOIDLE bits.
2167 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
2168 * along the return value from _set_module_autoidle().
2169 *
2170 * Any users of this function should be scrutinized carefully.
2171 */
2172 int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
2173 {
2174 u32 v;
2175 int retval = 0;
2176 unsigned long flags;
2177
2178 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
2179 return -EINVAL;
2180
2181 spin_lock_irqsave(&oh->_lock, flags);
2182
2183 v = oh->_sysc_cache;
2184
2185 retval = _set_module_autoidle(oh, autoidle, &v);
2186
2187 if (!retval)
2188 _write_sysconfig(v, oh);
2189
2190 spin_unlock_irqrestore(&oh->_lock, flags);
2191
2192 return retval;
2193 }
2194
2195 /**
2196 * _shutdown - shutdown an omap_hwmod
2197 * @oh: struct omap_hwmod *
2198 *
2199 * Shut down an omap_hwmod @oh. This should be called when the driver
2200 * used for the hwmod is removed or unloaded or if the driver is not
2201 * used by the system. Returns -EINVAL if the hwmod is in the wrong
2202 * state or returns 0.
2203 */
2204 static int _shutdown(struct omap_hwmod *oh)
2205 {
2206 int ret, i;
2207 u8 prev_state;
2208
2209 if (oh->_state != _HWMOD_STATE_IDLE &&
2210 oh->_state != _HWMOD_STATE_ENABLED) {
2211 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2212 oh->name);
2213 return -EINVAL;
2214 }
2215
2216 if (_are_all_hardreset_lines_asserted(oh))
2217 return 0;
2218
2219 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2220
2221 if (oh->class->pre_shutdown) {
2222 prev_state = oh->_state;
2223 if (oh->_state == _HWMOD_STATE_IDLE)
2224 _enable(oh);
2225 ret = oh->class->pre_shutdown(oh);
2226 if (ret) {
2227 if (prev_state == _HWMOD_STATE_IDLE)
2228 _idle(oh);
2229 return ret;
2230 }
2231 }
2232
2233 if (oh->class->sysc) {
2234 if (oh->_state == _HWMOD_STATE_IDLE)
2235 _enable(oh);
2236 _shutdown_sysc(oh);
2237 }
2238
2239 /* clocks and deps are already disabled in idle */
2240 if (oh->_state == _HWMOD_STATE_ENABLED) {
2241 _del_initiator_dep(oh, mpu_oh);
2242 /* XXX what about the other system initiators here? dma, dsp */
2243 if (soc_ops.disable_module)
2244 soc_ops.disable_module(oh);
2245 _disable_clocks(oh);
2246 if (oh->clkdm)
2247 clkdm_hwmod_disable(oh->clkdm, oh);
2248 }
2249 /* XXX Should this code also force-disable the optional clocks? */
2250
2251 for (i = 0; i < oh->rst_lines_cnt; i++)
2252 _assert_hardreset(oh, oh->rst_lines[i].name);
2253
2254 /* Mux pins to safe mode or use populated off mode values */
2255 if (oh->mux)
2256 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
2257
2258 oh->_state = _HWMOD_STATE_DISABLED;
2259
2260 return 0;
2261 }
2262
2263 /**
2264 * _init_mpu_rt_base - populate the virtual address for a hwmod
2265 * @oh: struct omap_hwmod * to locate the virtual address
2266 *
2267 * Cache the virtual address used by the MPU to access this IP block's
2268 * registers. This address is needed early so the OCP registers that
2269 * are part of the device's address space can be ioremapped properly.
2270 * No return value.
2271 */
2272 static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
2273 {
2274 struct omap_hwmod_addr_space *mem;
2275 void __iomem *va_start;
2276
2277 if (!oh)
2278 return;
2279
2280 _save_mpu_port_index(oh);
2281
2282 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2283 return;
2284
2285 mem = _find_mpu_rt_addr_space(oh);
2286 if (!mem) {
2287 pr_debug("omap_hwmod: %s: no MPU register target found\n",
2288 oh->name);
2289 return;
2290 }
2291
2292 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
2293 if (!va_start) {
2294 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
2295 return;
2296 }
2297
2298 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2299 oh->name, va_start);
2300
2301 oh->_mpu_rt_va = va_start;
2302 }
2303
2304 /**
2305 * _init - initialize internal data for the hwmod @oh
2306 * @oh: struct omap_hwmod *
2307 * @n: (unused)
2308 *
2309 * Look up the clocks and the address space used by the MPU to access
2310 * registers belonging to the hwmod @oh. @oh must already be
2311 * registered at this point. This is the first of two phases for
2312 * hwmod initialization. Code called here does not touch any hardware
2313 * registers, it simply prepares internal data structures. Returns 0
2314 * upon success or if the hwmod isn't registered, or -EINVAL upon
2315 * failure.
2316 */
2317 static int __init _init(struct omap_hwmod *oh, void *data)
2318 {
2319 int r;
2320
2321 if (oh->_state != _HWMOD_STATE_REGISTERED)
2322 return 0;
2323
2324 _init_mpu_rt_base(oh, NULL);
2325
2326 r = _init_clocks(oh, NULL);
2327 if (IS_ERR_VALUE(r)) {
2328 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2329 return -EINVAL;
2330 }
2331
2332 oh->_state = _HWMOD_STATE_INITIALIZED;
2333
2334 return 0;
2335 }
2336
2337 /**
2338 * _setup_iclk_autoidle - configure an IP block's interface clocks
2339 * @oh: struct omap_hwmod *
2340 *
2341 * Set up the module's interface clocks. XXX This function is still mostly
2342 * a stub; implementing this properly requires iclk autoidle usecounting in
2343 * the clock code. No return value.
2344 */
2345 static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
2346 {
2347 struct omap_hwmod_ocp_if *os;
2348 struct list_head *p;
2349 int i = 0;
2350 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2351 return;
2352
2353 p = oh->slave_ports.next;
2354
2355 while (i < oh->slaves_cnt) {
2356 os = _fetch_next_ocp_if(&p, &i);
2357 if (!os->_clk)
2358 continue;
2359
2360 if (os->flags & OCPIF_SWSUP_IDLE) {
2361 /* XXX omap_iclk_deny_idle(c); */
2362 } else {
2363 /* XXX omap_iclk_allow_idle(c); */
2364 clk_enable(os->_clk);
2365 }
2366 }
2367
2368 return;
2369 }
2370
2371 /**
2372 * _setup_reset - reset an IP block during the setup process
2373 * @oh: struct omap_hwmod *
2374 *
2375 * Reset the IP block corresponding to the hwmod @oh during the setup
2376 * process. The IP block is first enabled so it can be successfully
2377 * reset. Returns 0 upon success or a negative error code upon
2378 * failure.
2379 */
2380 static int __init _setup_reset(struct omap_hwmod *oh)
2381 {
2382 int r;
2383
2384 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2385 return -EINVAL;
2386
2387 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2388 return -EPERM;
2389
2390 if (oh->rst_lines_cnt == 0) {
2391 r = _enable(oh);
2392 if (r) {
2393 pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2394 oh->name, oh->_state);
2395 return -EINVAL;
2396 }
2397 }
2398
2399 if (!(oh->flags & HWMOD_INIT_NO_RESET))
2400 r = _reset(oh);
2401
2402 return r;
2403 }
2404
2405 /**
2406 * _setup_postsetup - transition to the appropriate state after _setup
2407 * @oh: struct omap_hwmod *
2408 *
2409 * Place an IP block represented by @oh into a "post-setup" state --
2410 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2411 * this function is called at the end of _setup().) The postsetup
2412 * state for an IP block can be changed by calling
2413 * omap_hwmod_enter_postsetup_state() early in the boot process,
2414 * before one of the omap_hwmod_setup*() functions are called for the
2415 * IP block.
2416 *
2417 * The IP block stays in this state until a PM runtime-based driver is
2418 * loaded for that IP block. A post-setup state of IDLE is
2419 * appropriate for almost all IP blocks with runtime PM-enabled
2420 * drivers, since those drivers are able to enable the IP block. A
2421 * post-setup state of ENABLED is appropriate for kernels with PM
2422 * runtime disabled. The DISABLED state is appropriate for unusual IP
2423 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2424 * included, since the WDTIMER starts running on reset and will reset
2425 * the MPU if left active.
2426 *
2427 * This post-setup mechanism is deprecated. Once all of the OMAP
2428 * drivers have been converted to use PM runtime, and all of the IP
2429 * block data and interconnect data is available to the hwmod code, it
2430 * should be possible to replace this mechanism with a "lazy reset"
2431 * arrangement. In a "lazy reset" setup, each IP block is enabled
2432 * when the driver first probes, then all remaining IP blocks without
2433 * drivers are either shut down or enabled after the drivers have
2434 * loaded. However, this cannot take place until the above
2435 * preconditions have been met, since otherwise the late reset code
2436 * has no way of knowing which IP blocks are in use by drivers, and
2437 * which ones are unused.
2438 *
2439 * No return value.
2440 */
2441 static void __init _setup_postsetup(struct omap_hwmod *oh)
2442 {
2443 u8 postsetup_state;
2444
2445 if (oh->rst_lines_cnt > 0)
2446 return;
2447
2448 postsetup_state = oh->_postsetup_state;
2449 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2450 postsetup_state = _HWMOD_STATE_ENABLED;
2451
2452 /*
2453 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2454 * it should be set by the core code as a runtime flag during startup
2455 */
2456 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
2457 (postsetup_state == _HWMOD_STATE_IDLE)) {
2458 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2459 postsetup_state = _HWMOD_STATE_ENABLED;
2460 }
2461
2462 if (postsetup_state == _HWMOD_STATE_IDLE)
2463 _idle(oh);
2464 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2465 _shutdown(oh);
2466 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2467 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2468 oh->name, postsetup_state);
2469
2470 return;
2471 }
2472
2473 /**
2474 * _setup - prepare IP block hardware for use
2475 * @oh: struct omap_hwmod *
2476 * @n: (unused, pass NULL)
2477 *
2478 * Configure the IP block represented by @oh. This may include
2479 * enabling the IP block, resetting it, and placing it into a
2480 * post-setup state, depending on the type of IP block and applicable
2481 * flags. IP blocks are reset to prevent any previous configuration
2482 * by the bootloader or previous operating system from interfering
2483 * with power management or other parts of the system. The reset can
2484 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2485 * two phases for hwmod initialization. Code called here generally
2486 * affects the IP block hardware, or system integration hardware
2487 * associated with the IP block. Returns 0.
2488 */
2489 static int __init _setup(struct omap_hwmod *oh, void *data)
2490 {
2491 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2492 return 0;
2493
2494 _setup_iclk_autoidle(oh);
2495
2496 if (!_setup_reset(oh))
2497 _setup_postsetup(oh);
2498
2499 return 0;
2500 }
2501
2502 /**
2503 * _register - register a struct omap_hwmod
2504 * @oh: struct omap_hwmod *
2505 *
2506 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2507 * already has been registered by the same name; -EINVAL if the
2508 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2509 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2510 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2511 * success.
2512 *
2513 * XXX The data should be copied into bootmem, so the original data
2514 * should be marked __initdata and freed after init. This would allow
2515 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2516 * that the copy process would be relatively complex due to the large number
2517 * of substructures.
2518 */
2519 static int __init _register(struct omap_hwmod *oh)
2520 {
2521 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2522 (oh->_state != _HWMOD_STATE_UNKNOWN))
2523 return -EINVAL;
2524
2525 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2526
2527 if (_lookup(oh->name))
2528 return -EEXIST;
2529
2530 list_add_tail(&oh->node, &omap_hwmod_list);
2531
2532 INIT_LIST_HEAD(&oh->master_ports);
2533 INIT_LIST_HEAD(&oh->slave_ports);
2534 spin_lock_init(&oh->_lock);
2535
2536 oh->_state = _HWMOD_STATE_REGISTERED;
2537
2538 /*
2539 * XXX Rather than doing a strcmp(), this should test a flag
2540 * set in the hwmod data, inserted by the autogenerator code.
2541 */
2542 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2543 mpu_oh = oh;
2544
2545 return 0;
2546 }
2547
2548 /**
2549 * _alloc_links - return allocated memory for hwmod links
2550 * @ml: pointer to a struct omap_hwmod_link * for the master link
2551 * @sl: pointer to a struct omap_hwmod_link * for the slave link
2552 *
2553 * Return pointers to two struct omap_hwmod_link records, via the
2554 * addresses pointed to by @ml and @sl. Will first attempt to return
2555 * memory allocated as part of a large initial block, but if that has
2556 * been exhausted, will allocate memory itself. Since ideally this
2557 * second allocation path will never occur, the number of these
2558 * 'supplemental' allocations will be logged when debugging is
2559 * enabled. Returns 0.
2560 */
2561 static int __init _alloc_links(struct omap_hwmod_link **ml,
2562 struct omap_hwmod_link **sl)
2563 {
2564 unsigned int sz;
2565
2566 if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
2567 *ml = &linkspace[free_ls++];
2568 *sl = &linkspace[free_ls++];
2569 return 0;
2570 }
2571
2572 sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
2573
2574 *sl = NULL;
2575 *ml = alloc_bootmem(sz);
2576
2577 memset(*ml, 0, sz);
2578
2579 *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
2580
2581 ls_supp++;
2582 pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
2583 ls_supp * LINKS_PER_OCP_IF);
2584
2585 return 0;
2586 };
2587
2588 /**
2589 * _add_link - add an interconnect between two IP blocks
2590 * @oi: pointer to a struct omap_hwmod_ocp_if record
2591 *
2592 * Add struct omap_hwmod_link records connecting the master IP block
2593 * specified in @oi->master to @oi, and connecting the slave IP block
2594 * specified in @oi->slave to @oi. This code is assumed to run before
2595 * preemption or SMP has been enabled, thus avoiding the need for
2596 * locking in this code. Changes to this assumption will require
2597 * additional locking. Returns 0.
2598 */
2599 static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2600 {
2601 struct omap_hwmod_link *ml, *sl;
2602
2603 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2604 oi->slave->name);
2605
2606 _alloc_links(&ml, &sl);
2607
2608 ml->ocp_if = oi;
2609 INIT_LIST_HEAD(&ml->node);
2610 list_add(&ml->node, &oi->master->master_ports);
2611 oi->master->masters_cnt++;
2612
2613 sl->ocp_if = oi;
2614 INIT_LIST_HEAD(&sl->node);
2615 list_add(&sl->node, &oi->slave->slave_ports);
2616 oi->slave->slaves_cnt++;
2617
2618 return 0;
2619 }
2620
2621 /**
2622 * _register_link - register a struct omap_hwmod_ocp_if
2623 * @oi: struct omap_hwmod_ocp_if *
2624 *
2625 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2626 * has already been registered; -EINVAL if @oi is NULL or if the
2627 * record pointed to by @oi is missing required fields; or 0 upon
2628 * success.
2629 *
2630 * XXX The data should be copied into bootmem, so the original data
2631 * should be marked __initdata and freed after init. This would allow
2632 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2633 */
2634 static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2635 {
2636 if (!oi || !oi->master || !oi->slave || !oi->user)
2637 return -EINVAL;
2638
2639 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2640 return -EEXIST;
2641
2642 pr_debug("omap_hwmod: registering link from %s to %s\n",
2643 oi->master->name, oi->slave->name);
2644
2645 /*
2646 * Register the connected hwmods, if they haven't been
2647 * registered already
2648 */
2649 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2650 _register(oi->master);
2651
2652 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2653 _register(oi->slave);
2654
2655 _add_link(oi);
2656
2657 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2658
2659 return 0;
2660 }
2661
2662 /**
2663 * _alloc_linkspace - allocate large block of hwmod links
2664 * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
2665 *
2666 * Allocate a large block of struct omap_hwmod_link records. This
2667 * improves boot time significantly by avoiding the need to allocate
2668 * individual records one by one. If the number of records to
2669 * allocate in the block hasn't been manually specified, this function
2670 * will count the number of struct omap_hwmod_ocp_if records in @ois
2671 * and use that to determine the allocation size. For SoC families
2672 * that require multiple list registrations, such as OMAP3xxx, this
2673 * estimation process isn't optimal, so manual estimation is advised
2674 * in those cases. Returns -EEXIST if the allocation has already occurred
2675 * or 0 upon success.
2676 */
2677 static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
2678 {
2679 unsigned int i = 0;
2680 unsigned int sz;
2681
2682 if (linkspace) {
2683 WARN(1, "linkspace already allocated\n");
2684 return -EEXIST;
2685 }
2686
2687 if (max_ls == 0)
2688 while (ois[i++])
2689 max_ls += LINKS_PER_OCP_IF;
2690
2691 sz = sizeof(struct omap_hwmod_link) * max_ls;
2692
2693 pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
2694 __func__, sz, max_ls);
2695
2696 linkspace = alloc_bootmem(sz);
2697
2698 memset(linkspace, 0, sz);
2699
2700 return 0;
2701 }
2702
2703 /* Static functions intended only for use in soc_ops field function pointers */
2704
2705 /**
2706 * _omap2_wait_target_ready - wait for a module to leave slave idle
2707 * @oh: struct omap_hwmod *
2708 *
2709 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2710 * does not have an IDLEST bit or if the module successfully leaves
2711 * slave idle; otherwise, pass along the return value of the
2712 * appropriate *_cm*_wait_module_ready() function.
2713 */
2714 static int _omap2_wait_target_ready(struct omap_hwmod *oh)
2715 {
2716 if (!oh)
2717 return -EINVAL;
2718
2719 if (oh->flags & HWMOD_NO_IDLEST)
2720 return 0;
2721
2722 if (!_find_mpu_rt_port(oh))
2723 return 0;
2724
2725 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2726
2727 return omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
2728 oh->prcm.omap2.idlest_reg_id,
2729 oh->prcm.omap2.idlest_idle_bit);
2730 }
2731
2732 /**
2733 * _omap4_wait_target_ready - wait for a module to leave slave idle
2734 * @oh: struct omap_hwmod *
2735 *
2736 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2737 * does not have an IDLEST bit or if the module successfully leaves
2738 * slave idle; otherwise, pass along the return value of the
2739 * appropriate *_cm*_wait_module_ready() function.
2740 */
2741 static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2742 {
2743 if (!oh)
2744 return -EINVAL;
2745
2746 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
2747 return 0;
2748
2749 if (!_find_mpu_rt_port(oh))
2750 return 0;
2751
2752 /* XXX check module SIDLEMODE, hardreset status */
2753
2754 return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
2755 oh->clkdm->cm_inst,
2756 oh->clkdm->clkdm_offs,
2757 oh->prcm.omap4.clkctrl_offs);
2758 }
2759
2760 /**
2761 * _am33xx_wait_target_ready - wait for a module to leave slave idle
2762 * @oh: struct omap_hwmod *
2763 *
2764 * Wait for a module @oh to leave slave idle. Returns 0 if the module
2765 * does not have an IDLEST bit or if the module successfully leaves
2766 * slave idle; otherwise, pass along the return value of the
2767 * appropriate *_cm*_wait_module_ready() function.
2768 */
2769 static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
2770 {
2771 if (!oh || !oh->clkdm)
2772 return -EINVAL;
2773
2774 if (oh->flags & HWMOD_NO_IDLEST)
2775 return 0;
2776
2777 if (!_find_mpu_rt_port(oh))
2778 return 0;
2779
2780 /* XXX check module SIDLEMODE, hardreset status */
2781
2782 return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
2783 oh->clkdm->clkdm_offs,
2784 oh->prcm.omap4.clkctrl_offs);
2785 }
2786
2787 /**
2788 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2789 * @oh: struct omap_hwmod * to assert hardreset
2790 * @ohri: hardreset line data
2791 *
2792 * Call omap2_prm_assert_hardreset() with parameters extracted from
2793 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2794 * use as an soc_ops function pointer. Passes along the return value
2795 * from omap2_prm_assert_hardreset(). XXX This function is scheduled
2796 * for removal when the PRM code is moved into drivers/.
2797 */
2798 static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2799 struct omap_hwmod_rst_info *ohri)
2800 {
2801 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
2802 ohri->rst_shift);
2803 }
2804
2805 /**
2806 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2807 * @oh: struct omap_hwmod * to deassert hardreset
2808 * @ohri: hardreset line data
2809 *
2810 * Call omap2_prm_deassert_hardreset() with parameters extracted from
2811 * the hwmod @oh and the hardreset line data @ohri. Only intended for
2812 * use as an soc_ops function pointer. Passes along the return value
2813 * from omap2_prm_deassert_hardreset(). XXX This function is
2814 * scheduled for removal when the PRM code is moved into drivers/.
2815 */
2816 static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2817 struct omap_hwmod_rst_info *ohri)
2818 {
2819 return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
2820 ohri->rst_shift,
2821 ohri->st_shift);
2822 }
2823
2824 /**
2825 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2826 * @oh: struct omap_hwmod * to test hardreset
2827 * @ohri: hardreset line data
2828 *
2829 * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2830 * from the hwmod @oh and the hardreset line data @ohri. Only
2831 * intended for use as an soc_ops function pointer. Passes along the
2832 * return value from omap2_prm_is_hardreset_asserted(). XXX This
2833 * function is scheduled for removal when the PRM code is moved into
2834 * drivers/.
2835 */
2836 static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2837 struct omap_hwmod_rst_info *ohri)
2838 {
2839 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
2840 ohri->st_shift);
2841 }
2842
2843 /**
2844 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2845 * @oh: struct omap_hwmod * to assert hardreset
2846 * @ohri: hardreset line data
2847 *
2848 * Call omap4_prminst_assert_hardreset() with parameters extracted
2849 * from the hwmod @oh and the hardreset line data @ohri. Only
2850 * intended for use as an soc_ops function pointer. Passes along the
2851 * return value from omap4_prminst_assert_hardreset(). XXX This
2852 * function is scheduled for removal when the PRM code is moved into
2853 * drivers/.
2854 */
2855 static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2856 struct omap_hwmod_rst_info *ohri)
2857 {
2858 if (!oh->clkdm)
2859 return -EINVAL;
2860
2861 return omap4_prminst_assert_hardreset(ohri->rst_shift,
2862 oh->clkdm->pwrdm.ptr->prcm_partition,
2863 oh->clkdm->pwrdm.ptr->prcm_offs,
2864 oh->prcm.omap4.rstctrl_offs);
2865 }
2866
2867 /**
2868 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2869 * @oh: struct omap_hwmod * to deassert hardreset
2870 * @ohri: hardreset line data
2871 *
2872 * Call omap4_prminst_deassert_hardreset() with parameters extracted
2873 * from the hwmod @oh and the hardreset line data @ohri. Only
2874 * intended for use as an soc_ops function pointer. Passes along the
2875 * return value from omap4_prminst_deassert_hardreset(). XXX This
2876 * function is scheduled for removal when the PRM code is moved into
2877 * drivers/.
2878 */
2879 static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2880 struct omap_hwmod_rst_info *ohri)
2881 {
2882 if (!oh->clkdm)
2883 return -EINVAL;
2884
2885 if (ohri->st_shift)
2886 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2887 oh->name, ohri->name);
2888 return omap4_prminst_deassert_hardreset(ohri->rst_shift,
2889 oh->clkdm->pwrdm.ptr->prcm_partition,
2890 oh->clkdm->pwrdm.ptr->prcm_offs,
2891 oh->prcm.omap4.rstctrl_offs);
2892 }
2893
2894 /**
2895 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2896 * @oh: struct omap_hwmod * to test hardreset
2897 * @ohri: hardreset line data
2898 *
2899 * Call omap4_prminst_is_hardreset_asserted() with parameters
2900 * extracted from the hwmod @oh and the hardreset line data @ohri.
2901 * Only intended for use as an soc_ops function pointer. Passes along
2902 * the return value from omap4_prminst_is_hardreset_asserted(). XXX
2903 * This function is scheduled for removal when the PRM code is moved
2904 * into drivers/.
2905 */
2906 static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2907 struct omap_hwmod_rst_info *ohri)
2908 {
2909 if (!oh->clkdm)
2910 return -EINVAL;
2911
2912 return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
2913 oh->clkdm->pwrdm.ptr->prcm_partition,
2914 oh->clkdm->pwrdm.ptr->prcm_offs,
2915 oh->prcm.omap4.rstctrl_offs);
2916 }
2917
2918 /**
2919 * _am33xx_assert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2920 * @oh: struct omap_hwmod * to assert hardreset
2921 * @ohri: hardreset line data
2922 *
2923 * Call am33xx_prminst_assert_hardreset() with parameters extracted
2924 * from the hwmod @oh and the hardreset line data @ohri. Only
2925 * intended for use as an soc_ops function pointer. Passes along the
2926 * return value from am33xx_prminst_assert_hardreset(). XXX This
2927 * function is scheduled for removal when the PRM code is moved into
2928 * drivers/.
2929 */
2930 static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
2931 struct omap_hwmod_rst_info *ohri)
2932
2933 {
2934 return am33xx_prm_assert_hardreset(ohri->rst_shift,
2935 oh->clkdm->pwrdm.ptr->prcm_offs,
2936 oh->prcm.omap4.rstctrl_offs);
2937 }
2938
2939 /**
2940 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
2941 * @oh: struct omap_hwmod * to deassert hardreset
2942 * @ohri: hardreset line data
2943 *
2944 * Call am33xx_prminst_deassert_hardreset() with parameters extracted
2945 * from the hwmod @oh and the hardreset line data @ohri. Only
2946 * intended for use as an soc_ops function pointer. Passes along the
2947 * return value from am33xx_prminst_deassert_hardreset(). XXX This
2948 * function is scheduled for removal when the PRM code is moved into
2949 * drivers/.
2950 */
2951 static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
2952 struct omap_hwmod_rst_info *ohri)
2953 {
2954 if (ohri->st_shift)
2955 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2956 oh->name, ohri->name);
2957
2958 return am33xx_prm_deassert_hardreset(ohri->rst_shift,
2959 oh->clkdm->pwrdm.ptr->prcm_offs,
2960 oh->prcm.omap4.rstctrl_offs,
2961 oh->prcm.omap4.rstst_offs);
2962 }
2963
2964 /**
2965 * _am33xx_is_hardreset_asserted - call AM33XX PRM hardreset fn with hwmod args
2966 * @oh: struct omap_hwmod * to test hardreset
2967 * @ohri: hardreset line data
2968 *
2969 * Call am33xx_prminst_is_hardreset_asserted() with parameters
2970 * extracted from the hwmod @oh and the hardreset line data @ohri.
2971 * Only intended for use as an soc_ops function pointer. Passes along
2972 * the return value from am33xx_prminst_is_hardreset_asserted(). XXX
2973 * This function is scheduled for removal when the PRM code is moved
2974 * into drivers/.
2975 */
2976 static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
2977 struct omap_hwmod_rst_info *ohri)
2978 {
2979 return am33xx_prm_is_hardreset_asserted(ohri->rst_shift,
2980 oh->clkdm->pwrdm.ptr->prcm_offs,
2981 oh->prcm.omap4.rstctrl_offs);
2982 }
2983
2984 /* Public functions */
2985
2986 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2987 {
2988 if (oh->flags & HWMOD_16BIT_REG)
2989 return __raw_readw(oh->_mpu_rt_va + reg_offs);
2990 else
2991 return __raw_readl(oh->_mpu_rt_va + reg_offs);
2992 }
2993
2994 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2995 {
2996 if (oh->flags & HWMOD_16BIT_REG)
2997 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
2998 else
2999 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
3000 }
3001
3002 /**
3003 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
3004 * @oh: struct omap_hwmod *
3005 *
3006 * This is a public function exposed to drivers. Some drivers may need to do
3007 * some settings before and after resetting the device. Those drivers after
3008 * doing the necessary settings could use this function to start a reset by
3009 * setting the SYSCONFIG.SOFTRESET bit.
3010 */
3011 int omap_hwmod_softreset(struct omap_hwmod *oh)
3012 {
3013 u32 v;
3014 int ret;
3015
3016 if (!oh || !(oh->_sysc_cache))
3017 return -EINVAL;
3018
3019 v = oh->_sysc_cache;
3020 ret = _set_softreset(oh, &v);
3021 if (ret)
3022 goto error;
3023 _write_sysconfig(v, oh);
3024
3025 error:
3026 return ret;
3027 }
3028
3029 /**
3030 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
3031 * @oh: struct omap_hwmod *
3032 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
3033 *
3034 * Sets the IP block's OCP slave idlemode in hardware, and updates our
3035 * local copy. Intended to be used by drivers that have some erratum
3036 * that requires direct manipulation of the SIDLEMODE bits. Returns
3037 * -EINVAL if @oh is null, or passes along the return value from
3038 * _set_slave_idlemode().
3039 *
3040 * XXX Does this function have any current users? If not, we should
3041 * remove it; it is better to let the rest of the hwmod code handle this.
3042 * Any users of this function should be scrutinized carefully.
3043 */
3044 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
3045 {
3046 u32 v;
3047 int retval = 0;
3048
3049 if (!oh)
3050 return -EINVAL;
3051
3052 v = oh->_sysc_cache;
3053
3054 retval = _set_slave_idlemode(oh, idlemode, &v);
3055 if (!retval)
3056 _write_sysconfig(v, oh);
3057
3058 return retval;
3059 }
3060
3061 /**
3062 * omap_hwmod_lookup - look up a registered omap_hwmod by name
3063 * @name: name of the omap_hwmod to look up
3064 *
3065 * Given a @name of an omap_hwmod, return a pointer to the registered
3066 * struct omap_hwmod *, or NULL upon error.
3067 */
3068 struct omap_hwmod *omap_hwmod_lookup(const char *name)
3069 {
3070 struct omap_hwmod *oh;
3071
3072 if (!name)
3073 return NULL;
3074
3075 oh = _lookup(name);
3076
3077 return oh;
3078 }
3079
3080 /**
3081 * omap_hwmod_for_each - call function for each registered omap_hwmod
3082 * @fn: pointer to a callback function
3083 * @data: void * data to pass to callback function
3084 *
3085 * Call @fn for each registered omap_hwmod, passing @data to each
3086 * function. @fn must return 0 for success or any other value for
3087 * failure. If @fn returns non-zero, the iteration across omap_hwmods
3088 * will stop and the non-zero return value will be passed to the
3089 * caller of omap_hwmod_for_each(). @fn is called with
3090 * omap_hwmod_for_each() held.
3091 */
3092 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
3093 void *data)
3094 {
3095 struct omap_hwmod *temp_oh;
3096 int ret = 0;
3097
3098 if (!fn)
3099 return -EINVAL;
3100
3101 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3102 ret = (*fn)(temp_oh, data);
3103 if (ret)
3104 break;
3105 }
3106
3107 return ret;
3108 }
3109
3110 /**
3111 * omap_hwmod_register_links - register an array of hwmod links
3112 * @ois: pointer to an array of omap_hwmod_ocp_if to register
3113 *
3114 * Intended to be called early in boot before the clock framework is
3115 * initialized. If @ois is not null, will register all omap_hwmods
3116 * listed in @ois that are valid for this chip. Returns -EINVAL if
3117 * omap_hwmod_init() hasn't been called before calling this function,
3118 * -ENOMEM if the link memory area can't be allocated, or 0 upon
3119 * success.
3120 */
3121 int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3122 {
3123 int r, i;
3124
3125 if (!inited)
3126 return -EINVAL;
3127
3128 if (!ois)
3129 return 0;
3130
3131 if (!linkspace) {
3132 if (_alloc_linkspace(ois)) {
3133 pr_err("omap_hwmod: could not allocate link space\n");
3134 return -ENOMEM;
3135 }
3136 }
3137
3138 i = 0;
3139 do {
3140 r = _register_link(ois[i]);
3141 WARN(r && r != -EEXIST,
3142 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3143 ois[i]->master->name, ois[i]->slave->name, r);
3144 } while (ois[++i]);
3145
3146 return 0;
3147 }
3148
3149 /**
3150 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3151 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3152 *
3153 * If the hwmod data corresponding to the MPU subsystem IP block
3154 * hasn't been initialized and set up yet, do so now. This must be
3155 * done first since sleep dependencies may be added from other hwmods
3156 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
3157 * return value.
3158 */
3159 static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
3160 {
3161 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3162 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3163 __func__, MPU_INITIATOR_NAME);
3164 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3165 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
3166 }
3167
3168 /**
3169 * omap_hwmod_setup_one - set up a single hwmod
3170 * @oh_name: const char * name of the already-registered hwmod to set up
3171 *
3172 * Initialize and set up a single hwmod. Intended to be used for a
3173 * small number of early devices, such as the timer IP blocks used for
3174 * the scheduler clock. Must be called after omap2_clk_init().
3175 * Resolves the struct clk names to struct clk pointers for each
3176 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
3177 * -EINVAL upon error or 0 upon success.
3178 */
3179 int __init omap_hwmod_setup_one(const char *oh_name)
3180 {
3181 struct omap_hwmod *oh;
3182
3183 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3184
3185 oh = _lookup(oh_name);
3186 if (!oh) {
3187 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3188 return -EINVAL;
3189 }
3190
3191 _ensure_mpu_hwmod_is_setup(oh);
3192
3193 _init(oh, NULL);
3194 _setup(oh, NULL);
3195
3196 return 0;
3197 }
3198
3199 /**
3200 * omap_hwmod_setup_all - set up all registered IP blocks
3201 *
3202 * Initialize and set up all IP blocks registered with the hwmod code.
3203 * Must be called after omap2_clk_init(). Resolves the struct clk
3204 * names to struct clk pointers for each registered omap_hwmod. Also
3205 * calls _setup() on each hwmod. Returns 0 upon success.
3206 */
3207 static int __init omap_hwmod_setup_all(void)
3208 {
3209 _ensure_mpu_hwmod_is_setup(NULL);
3210
3211 omap_hwmod_for_each(_init, NULL);
3212 omap_hwmod_for_each(_setup, NULL);
3213
3214 return 0;
3215 }
3216 core_initcall(omap_hwmod_setup_all);
3217
3218 /**
3219 * omap_hwmod_enable - enable an omap_hwmod
3220 * @oh: struct omap_hwmod *
3221 *
3222 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
3223 * Returns -EINVAL on error or passes along the return value from _enable().
3224 */
3225 int omap_hwmod_enable(struct omap_hwmod *oh)
3226 {
3227 int r;
3228 unsigned long flags;
3229
3230 if (!oh)
3231 return -EINVAL;
3232
3233 spin_lock_irqsave(&oh->_lock, flags);
3234 r = _enable(oh);
3235 spin_unlock_irqrestore(&oh->_lock, flags);
3236
3237 return r;
3238 }
3239
3240 /**
3241 * omap_hwmod_idle - idle an omap_hwmod
3242 * @oh: struct omap_hwmod *
3243 *
3244 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
3245 * Returns -EINVAL on error or passes along the return value from _idle().
3246 */
3247 int omap_hwmod_idle(struct omap_hwmod *oh)
3248 {
3249 unsigned long flags;
3250
3251 if (!oh)
3252 return -EINVAL;
3253
3254 spin_lock_irqsave(&oh->_lock, flags);
3255 _idle(oh);
3256 spin_unlock_irqrestore(&oh->_lock, flags);
3257
3258 return 0;
3259 }
3260
3261 /**
3262 * omap_hwmod_shutdown - shutdown an omap_hwmod
3263 * @oh: struct omap_hwmod *
3264 *
3265 * Shutdown an omap_hwmod @oh. Intended to be called by
3266 * omap_device_shutdown(). Returns -EINVAL on error or passes along
3267 * the return value from _shutdown().
3268 */
3269 int omap_hwmod_shutdown(struct omap_hwmod *oh)
3270 {
3271 unsigned long flags;
3272
3273 if (!oh)
3274 return -EINVAL;
3275
3276 spin_lock_irqsave(&oh->_lock, flags);
3277 _shutdown(oh);
3278 spin_unlock_irqrestore(&oh->_lock, flags);
3279
3280 return 0;
3281 }
3282
3283 /**
3284 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
3285 * @oh: struct omap_hwmod *oh
3286 *
3287 * Intended to be called by the omap_device code.
3288 */
3289 int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
3290 {
3291 unsigned long flags;
3292
3293 spin_lock_irqsave(&oh->_lock, flags);
3294 _enable_clocks(oh);
3295 spin_unlock_irqrestore(&oh->_lock, flags);
3296
3297 return 0;
3298 }
3299
3300 /**
3301 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
3302 * @oh: struct omap_hwmod *oh
3303 *
3304 * Intended to be called by the omap_device code.
3305 */
3306 int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
3307 {
3308 unsigned long flags;
3309
3310 spin_lock_irqsave(&oh->_lock, flags);
3311 _disable_clocks(oh);
3312 spin_unlock_irqrestore(&oh->_lock, flags);
3313
3314 return 0;
3315 }
3316
3317 /**
3318 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
3319 * @oh: struct omap_hwmod *oh
3320 *
3321 * Intended to be called by drivers and core code when all posted
3322 * writes to a device must complete before continuing further
3323 * execution (for example, after clearing some device IRQSTATUS
3324 * register bits)
3325 *
3326 * XXX what about targets with multiple OCP threads?
3327 */
3328 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
3329 {
3330 BUG_ON(!oh);
3331
3332 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
3333 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
3334 oh->name);
3335 return;
3336 }
3337
3338 /*
3339 * Forces posted writes to complete on the OCP thread handling
3340 * register writes
3341 */
3342 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
3343 }
3344
3345 /**
3346 * omap_hwmod_reset - reset the hwmod
3347 * @oh: struct omap_hwmod *
3348 *
3349 * Under some conditions, a driver may wish to reset the entire device.
3350 * Called from omap_device code. Returns -EINVAL on error or passes along
3351 * the return value from _reset().
3352 */
3353 int omap_hwmod_reset(struct omap_hwmod *oh)
3354 {
3355 int r;
3356 unsigned long flags;
3357
3358 if (!oh)
3359 return -EINVAL;
3360
3361 spin_lock_irqsave(&oh->_lock, flags);
3362 r = _reset(oh);
3363 spin_unlock_irqrestore(&oh->_lock, flags);
3364
3365 return r;
3366 }
3367
3368 /*
3369 * IP block data retrieval functions
3370 */
3371
3372 /**
3373 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
3374 * @oh: struct omap_hwmod *
3375 * @res: pointer to the first element of an array of struct resource to fill
3376 *
3377 * Count the number of struct resource array elements necessary to
3378 * contain omap_hwmod @oh resources. Intended to be called by code
3379 * that registers omap_devices. Intended to be used to determine the
3380 * size of a dynamically-allocated struct resource array, before
3381 * calling omap_hwmod_fill_resources(). Returns the number of struct
3382 * resource array elements needed.
3383 *
3384 * XXX This code is not optimized. It could attempt to merge adjacent
3385 * resource IDs.
3386 *
3387 */
3388 int omap_hwmod_count_resources(struct omap_hwmod *oh)
3389 {
3390 struct omap_hwmod_ocp_if *os;
3391 struct list_head *p;
3392 int ret;
3393 int i = 0;
3394
3395 ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
3396
3397 p = oh->slave_ports.next;
3398
3399 while (i < oh->slaves_cnt) {
3400 os = _fetch_next_ocp_if(&p, &i);
3401 ret += _count_ocp_if_addr_spaces(os);
3402 }
3403
3404 return ret;
3405 }
3406
3407 /**
3408 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
3409 * @oh: struct omap_hwmod *
3410 * @res: pointer to the first element of an array of struct resource to fill
3411 *
3412 * Fill the struct resource array @res with resource data from the
3413 * omap_hwmod @oh. Intended to be called by code that registers
3414 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3415 * number of array elements filled.
3416 */
3417 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
3418 {
3419 struct omap_hwmod_ocp_if *os;
3420 struct list_head *p;
3421 int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
3422 int r = 0;
3423
3424 /* For each IRQ, DMA, memory area, fill in array.*/
3425
3426 mpu_irqs_cnt = _count_mpu_irqs(oh);
3427 for (i = 0; i < mpu_irqs_cnt; i++) {
3428 (res + r)->name = (oh->mpu_irqs + i)->name;
3429 (res + r)->start = (oh->mpu_irqs + i)->irq;
3430 (res + r)->end = (oh->mpu_irqs + i)->irq;
3431 (res + r)->flags = IORESOURCE_IRQ;
3432 r++;
3433 }
3434
3435 sdma_reqs_cnt = _count_sdma_reqs(oh);
3436 for (i = 0; i < sdma_reqs_cnt; i++) {
3437 (res + r)->name = (oh->sdma_reqs + i)->name;
3438 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3439 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
3440 (res + r)->flags = IORESOURCE_DMA;
3441 r++;
3442 }
3443
3444 p = oh->slave_ports.next;
3445
3446 i = 0;
3447 while (i < oh->slaves_cnt) {
3448 os = _fetch_next_ocp_if(&p, &i);
3449 addr_cnt = _count_ocp_if_addr_spaces(os);
3450
3451 for (j = 0; j < addr_cnt; j++) {
3452 (res + r)->name = (os->addr + j)->name;
3453 (res + r)->start = (os->addr + j)->pa_start;
3454 (res + r)->end = (os->addr + j)->pa_end;
3455 (res + r)->flags = IORESOURCE_MEM;
3456 r++;
3457 }
3458 }
3459
3460 return r;
3461 }
3462
3463 /**
3464 * omap_hwmod_fill_dma_resources - fill struct resource array with dma data
3465 * @oh: struct omap_hwmod *
3466 * @res: pointer to the array of struct resource to fill
3467 *
3468 * Fill the struct resource array @res with dma resource data from the
3469 * omap_hwmod @oh. Intended to be called by code that registers
3470 * omap_devices. See also omap_hwmod_count_resources(). Returns the
3471 * number of array elements filled.
3472 */
3473 int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res)
3474 {
3475 int i, sdma_reqs_cnt;
3476 int r = 0;
3477
3478 sdma_reqs_cnt = _count_sdma_reqs(oh);
3479 for (i = 0; i < sdma_reqs_cnt; i++) {
3480 (res + r)->name = (oh->sdma_reqs + i)->name;
3481 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
3482 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
3483 (res + r)->flags = IORESOURCE_DMA;
3484 r++;
3485 }
3486
3487 return r;
3488 }
3489
3490 /**
3491 * omap_hwmod_get_resource_byname - fetch IP block integration data by name
3492 * @oh: struct omap_hwmod * to operate on
3493 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
3494 * @name: pointer to the name of the data to fetch (optional)
3495 * @rsrc: pointer to a struct resource, allocated by the caller
3496 *
3497 * Retrieve MPU IRQ, SDMA request line, or address space start/end
3498 * data for the IP block pointed to by @oh. The data will be filled
3499 * into a struct resource record pointed to by @rsrc. The struct
3500 * resource must be allocated by the caller. When @name is non-null,
3501 * the data associated with the matching entry in the IRQ/SDMA/address
3502 * space hwmod data arrays will be returned. If @name is null, the
3503 * first array entry will be returned. Data order is not meaningful
3504 * in hwmod data, so callers are strongly encouraged to use a non-null
3505 * @name whenever possible to avoid unpredictable effects if hwmod
3506 * data is later added that causes data ordering to change. This
3507 * function is only intended for use by OMAP core code. Device
3508 * drivers should not call this function - the appropriate bus-related
3509 * data accessor functions should be used instead. Returns 0 upon
3510 * success or a negative error code upon error.
3511 */
3512 int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
3513 const char *name, struct resource *rsrc)
3514 {
3515 int r;
3516 unsigned int irq, dma;
3517 u32 pa_start, pa_end;
3518
3519 if (!oh || !rsrc)
3520 return -EINVAL;
3521
3522 if (type == IORESOURCE_IRQ) {
3523 r = _get_mpu_irq_by_name(oh, name, &irq);
3524 if (r)
3525 return r;
3526
3527 rsrc->start = irq;
3528 rsrc->end = irq;
3529 } else if (type == IORESOURCE_DMA) {
3530 r = _get_sdma_req_by_name(oh, name, &dma);
3531 if (r)
3532 return r;
3533
3534 rsrc->start = dma;
3535 rsrc->end = dma;
3536 } else if (type == IORESOURCE_MEM) {
3537 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
3538 if (r)
3539 return r;
3540
3541 rsrc->start = pa_start;
3542 rsrc->end = pa_end;
3543 } else {
3544 return -EINVAL;
3545 }
3546
3547 rsrc->flags = type;
3548 rsrc->name = name;
3549
3550 return 0;
3551 }
3552
3553 /**
3554 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3555 * @oh: struct omap_hwmod *
3556 *
3557 * Return the powerdomain pointer associated with the OMAP module
3558 * @oh's main clock. If @oh does not have a main clk, return the
3559 * powerdomain associated with the interface clock associated with the
3560 * module's MPU port. (XXX Perhaps this should use the SDMA port
3561 * instead?) Returns NULL on error, or a struct powerdomain * on
3562 * success.
3563 */
3564 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3565 {
3566 struct clk *c;
3567 struct omap_hwmod_ocp_if *oi;
3568
3569 if (!oh)
3570 return NULL;
3571
3572 if (oh->_clk) {
3573 c = oh->_clk;
3574 } else {
3575 oi = _find_mpu_rt_port(oh);
3576 if (!oi)
3577 return NULL;
3578 c = oi->_clk;
3579 }
3580
3581 if (!c->clkdm)
3582 return NULL;
3583
3584 return c->clkdm->pwrdm.ptr;
3585
3586 }
3587
3588 /**
3589 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3590 * @oh: struct omap_hwmod *
3591 *
3592 * Returns the virtual address corresponding to the beginning of the
3593 * module's register target, in the address range that is intended to
3594 * be used by the MPU. Returns the virtual address upon success or NULL
3595 * upon error.
3596 */
3597 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3598 {
3599 if (!oh)
3600 return NULL;
3601
3602 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3603 return NULL;
3604
3605 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3606 return NULL;
3607
3608 return oh->_mpu_rt_va;
3609 }
3610
3611 /**
3612 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
3613 * @oh: struct omap_hwmod *
3614 * @init_oh: struct omap_hwmod * (initiator)
3615 *
3616 * Add a sleep dependency between the initiator @init_oh and @oh.
3617 * Intended to be called by DSP/Bridge code via platform_data for the
3618 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3619 * code needs to add/del initiator dependencies dynamically
3620 * before/after accessing a device. Returns the return value from
3621 * _add_initiator_dep().
3622 *
3623 * XXX Keep a usecount in the clockdomain code
3624 */
3625 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
3626 struct omap_hwmod *init_oh)
3627 {
3628 return _add_initiator_dep(oh, init_oh);
3629 }
3630
3631 /*
3632 * XXX what about functions for drivers to save/restore ocp_sysconfig
3633 * for context save/restore operations?
3634 */
3635
3636 /**
3637 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
3638 * @oh: struct omap_hwmod *
3639 * @init_oh: struct omap_hwmod * (initiator)
3640 *
3641 * Remove a sleep dependency between the initiator @init_oh and @oh.
3642 * Intended to be called by DSP/Bridge code via platform_data for the
3643 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3644 * code needs to add/del initiator dependencies dynamically
3645 * before/after accessing a device. Returns the return value from
3646 * _del_initiator_dep().
3647 *
3648 * XXX Keep a usecount in the clockdomain code
3649 */
3650 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
3651 struct omap_hwmod *init_oh)
3652 {
3653 return _del_initiator_dep(oh, init_oh);
3654 }
3655
3656 /**
3657 * omap_hwmod_enable_wakeup - allow device to wake up the system
3658 * @oh: struct omap_hwmod *
3659 *
3660 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
3661 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3662 * this IP block if it has dynamic mux entries. Eventually this
3663 * should set PRCM wakeup registers to cause the PRCM to receive
3664 * wakeup events from the module. Does not set any wakeup routing
3665 * registers beyond this point - if the module is to wake up any other
3666 * module or subsystem, that must be set separately. Called by
3667 * omap_device code. Returns -EINVAL on error or 0 upon success.
3668 */
3669 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3670 {
3671 unsigned long flags;
3672 u32 v;
3673
3674 spin_lock_irqsave(&oh->_lock, flags);
3675
3676 if (oh->class->sysc &&
3677 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3678 v = oh->_sysc_cache;
3679 _enable_wakeup(oh, &v);
3680 _write_sysconfig(v, oh);
3681 }
3682
3683 _set_idle_ioring_wakeup(oh, true);
3684 spin_unlock_irqrestore(&oh->_lock, flags);
3685
3686 return 0;
3687 }
3688
3689 /**
3690 * omap_hwmod_disable_wakeup - prevent device from waking the system
3691 * @oh: struct omap_hwmod *
3692 *
3693 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
3694 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3695 * events for this IP block if it has dynamic mux entries. Eventually
3696 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3697 * wakeup events from the module. Does not set any wakeup routing
3698 * registers beyond this point - if the module is to wake up any other
3699 * module or subsystem, that must be set separately. Called by
3700 * omap_device code. Returns -EINVAL on error or 0 upon success.
3701 */
3702 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3703 {
3704 unsigned long flags;
3705 u32 v;
3706
3707 spin_lock_irqsave(&oh->_lock, flags);
3708
3709 if (oh->class->sysc &&
3710 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3711 v = oh->_sysc_cache;
3712 _disable_wakeup(oh, &v);
3713 _write_sysconfig(v, oh);
3714 }
3715
3716 _set_idle_ioring_wakeup(oh, false);
3717 spin_unlock_irqrestore(&oh->_lock, flags);
3718
3719 return 0;
3720 }
3721
3722 /**
3723 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3724 * contained in the hwmod module.
3725 * @oh: struct omap_hwmod *
3726 * @name: name of the reset line to lookup and assert
3727 *
3728 * Some IP like dsp, ipu or iva contain processor that require
3729 * an HW reset line to be assert / deassert in order to enable fully
3730 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3731 * yet supported on this OMAP; otherwise, passes along the return value
3732 * from _assert_hardreset().
3733 */
3734 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3735 {
3736 int ret;
3737 unsigned long flags;
3738
3739 if (!oh)
3740 return -EINVAL;
3741
3742 spin_lock_irqsave(&oh->_lock, flags);
3743 ret = _assert_hardreset(oh, name);
3744 spin_unlock_irqrestore(&oh->_lock, flags);
3745
3746 return ret;
3747 }
3748
3749 /**
3750 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3751 * contained in the hwmod module.
3752 * @oh: struct omap_hwmod *
3753 * @name: name of the reset line to look up and deassert
3754 *
3755 * Some IP like dsp, ipu or iva contain processor that require
3756 * an HW reset line to be assert / deassert in order to enable fully
3757 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3758 * yet supported on this OMAP; otherwise, passes along the return value
3759 * from _deassert_hardreset().
3760 */
3761 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3762 {
3763 int ret;
3764 unsigned long flags;
3765
3766 if (!oh)
3767 return -EINVAL;
3768
3769 spin_lock_irqsave(&oh->_lock, flags);
3770 ret = _deassert_hardreset(oh, name);
3771 spin_unlock_irqrestore(&oh->_lock, flags);
3772
3773 return ret;
3774 }
3775
3776 /**
3777 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
3778 * contained in the hwmod module
3779 * @oh: struct omap_hwmod *
3780 * @name: name of the reset line to look up and read
3781 *
3782 * Return the current state of the hwmod @oh's reset line named @name:
3783 * returns -EINVAL upon parameter error or if this operation
3784 * is unsupported on the current OMAP; otherwise, passes along the return
3785 * value from _read_hardreset().
3786 */
3787 int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
3788 {
3789 int ret;
3790 unsigned long flags;
3791
3792 if (!oh)
3793 return -EINVAL;
3794
3795 spin_lock_irqsave(&oh->_lock, flags);
3796 ret = _read_hardreset(oh, name);
3797 spin_unlock_irqrestore(&oh->_lock, flags);
3798
3799 return ret;
3800 }
3801
3802
3803 /**
3804 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3805 * @classname: struct omap_hwmod_class name to search for
3806 * @fn: callback function pointer to call for each hwmod in class @classname
3807 * @user: arbitrary context data to pass to the callback function
3808 *
3809 * For each omap_hwmod of class @classname, call @fn.
3810 * If the callback function returns something other than
3811 * zero, the iterator is terminated, and the callback function's return
3812 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3813 * if @classname or @fn are NULL, or passes back the error code from @fn.
3814 */
3815 int omap_hwmod_for_each_by_class(const char *classname,
3816 int (*fn)(struct omap_hwmod *oh,
3817 void *user),
3818 void *user)
3819 {
3820 struct omap_hwmod *temp_oh;
3821 int ret = 0;
3822
3823 if (!classname || !fn)
3824 return -EINVAL;
3825
3826 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3827 __func__, classname);
3828
3829 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3830 if (!strcmp(temp_oh->class->name, classname)) {
3831 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3832 __func__, temp_oh->name);
3833 ret = (*fn)(temp_oh, user);
3834 if (ret)
3835 break;
3836 }
3837 }
3838
3839 if (ret)
3840 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3841 __func__, ret);
3842
3843 return ret;
3844 }
3845
3846 /**
3847 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3848 * @oh: struct omap_hwmod *
3849 * @state: state that _setup() should leave the hwmod in
3850 *
3851 * Sets the hwmod state that @oh will enter at the end of _setup()
3852 * (called by omap_hwmod_setup_*()). See also the documentation
3853 * for _setup_postsetup(), above. Returns 0 upon success or
3854 * -EINVAL if there is a problem with the arguments or if the hwmod is
3855 * in the wrong state.
3856 */
3857 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3858 {
3859 int ret;
3860 unsigned long flags;
3861
3862 if (!oh)
3863 return -EINVAL;
3864
3865 if (state != _HWMOD_STATE_DISABLED &&
3866 state != _HWMOD_STATE_ENABLED &&
3867 state != _HWMOD_STATE_IDLE)
3868 return -EINVAL;
3869
3870 spin_lock_irqsave(&oh->_lock, flags);
3871
3872 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3873 ret = -EINVAL;
3874 goto ohsps_unlock;
3875 }
3876
3877 oh->_postsetup_state = state;
3878 ret = 0;
3879
3880 ohsps_unlock:
3881 spin_unlock_irqrestore(&oh->_lock, flags);
3882
3883 return ret;
3884 }
3885
3886 /**
3887 * omap_hwmod_get_context_loss_count - get lost context count
3888 * @oh: struct omap_hwmod *
3889 *
3890 * Query the powerdomain of of @oh to get the context loss
3891 * count for this device.
3892 *
3893 * Returns the context loss count of the powerdomain assocated with @oh
3894 * upon success, or zero if no powerdomain exists for @oh.
3895 */
3896 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
3897 {
3898 struct powerdomain *pwrdm;
3899 int ret = 0;
3900
3901 pwrdm = omap_hwmod_get_pwrdm(oh);
3902 if (pwrdm)
3903 ret = pwrdm_get_context_loss_count(pwrdm);
3904
3905 return ret;
3906 }
3907
3908 /**
3909 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
3910 * @oh: struct omap_hwmod *
3911 *
3912 * Prevent the hwmod @oh from being reset during the setup process.
3913 * Intended for use by board-*.c files on boards with devices that
3914 * cannot tolerate being reset. Must be called before the hwmod has
3915 * been set up. Returns 0 upon success or negative error code upon
3916 * failure.
3917 */
3918 int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
3919 {
3920 if (!oh)
3921 return -EINVAL;
3922
3923 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3924 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
3925 oh->name);
3926 return -EINVAL;
3927 }
3928
3929 oh->flags |= HWMOD_INIT_NO_RESET;
3930
3931 return 0;
3932 }
3933
3934 /**
3935 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
3936 * @oh: struct omap_hwmod * containing hwmod mux entries
3937 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
3938 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
3939 *
3940 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
3941 * entry number @pad_idx for the hwmod @oh, trigger the interrupt
3942 * service routine for the hwmod's mpu_irqs array index @irq_idx. If
3943 * this function is not called for a given pad_idx, then the ISR
3944 * associated with @oh's first MPU IRQ will be triggered when an I/O
3945 * pad wakeup occurs on that pad. Note that @pad_idx is the index of
3946 * the _dynamic or wakeup_ entry: if there are other entries not
3947 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
3948 * entries are NOT COUNTED in the dynamic pad index. This function
3949 * must be called separately for each pad that requires its interrupt
3950 * to be re-routed this way. Returns -EINVAL if there is an argument
3951 * problem or if @oh does not have hwmod mux entries or MPU IRQs;
3952 * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
3953 *
3954 * XXX This function interface is fragile. Rather than using array
3955 * indexes, which are subject to unpredictable change, it should be
3956 * using hwmod IRQ names, and some other stable key for the hwmod mux
3957 * pad records.
3958 */
3959 int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
3960 {
3961 int nr_irqs;
3962
3963 might_sleep();
3964
3965 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
3966 pad_idx >= oh->mux->nr_pads_dynamic)
3967 return -EINVAL;
3968
3969 /* Check the number of available mpu_irqs */
3970 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
3971 ;
3972
3973 if (irq_idx >= nr_irqs)
3974 return -EINVAL;
3975
3976 if (!oh->mux->irqs) {
3977 /* XXX What frees this? */
3978 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
3979 GFP_KERNEL);
3980 if (!oh->mux->irqs)
3981 return -ENOMEM;
3982 }
3983 oh->mux->irqs[pad_idx] = irq_idx;
3984
3985 return 0;
3986 }
3987
3988 /**
3989 * omap_hwmod_init - initialize the hwmod code
3990 *
3991 * Sets up some function pointers needed by the hwmod code to operate on the
3992 * currently-booted SoC. Intended to be called once during kernel init
3993 * before any hwmods are registered. No return value.
3994 */
3995 void __init omap_hwmod_init(void)
3996 {
3997 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
3998 soc_ops.wait_target_ready = _omap2_wait_target_ready;
3999 soc_ops.assert_hardreset = _omap2_assert_hardreset;
4000 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4001 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4002 } else if (cpu_is_omap44xx() || soc_is_omap54xx()) {
4003 soc_ops.enable_module = _omap4_enable_module;
4004 soc_ops.disable_module = _omap4_disable_module;
4005 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4006 soc_ops.assert_hardreset = _omap4_assert_hardreset;
4007 soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
4008 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4009 soc_ops.init_clkdm = _init_clkdm;
4010 } else if (soc_is_am33xx()) {
4011 soc_ops.enable_module = _am33xx_enable_module;
4012 soc_ops.disable_module = _am33xx_disable_module;
4013 soc_ops.wait_target_ready = _am33xx_wait_target_ready;
4014 soc_ops.assert_hardreset = _am33xx_assert_hardreset;
4015 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
4016 soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
4017 soc_ops.init_clkdm = _init_clkdm;
4018 } else {
4019 WARN(1, "omap_hwmod: unknown SoC type\n");
4020 }
4021
4022 inited = true;
4023 }
4024
4025 /**
4026 * omap_hwmod_get_main_clk - get pointer to main clock name
4027 * @oh: struct omap_hwmod *
4028 *
4029 * Returns the main clock name assocated with @oh upon success,
4030 * or NULL if @oh is NULL.
4031 */
4032 const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
4033 {
4034 if (!oh)
4035 return NULL;
4036
4037 return oh->main_clk;
4038 }
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