arch/arm/mach-omap2/vc.h

   1 /*
   2  * OMAP3/4 Voltage Controller (VC) structure and macro definitions
   3  *
   4  * Copyright (C) 2007, 2010 Texas Instruments, Inc.
   5  * Rajendra Nayak <rnayak@ti.com>
   6  * Lesly A M <x0080970@ti.com>
   7  * Thara Gopinath <thara@ti.com>
   8  *
   9  * Copyright (C) 2008, 2011 Nokia Corporation
  10  * Kalle Jokiniemi
  11  * Paul Walmsley
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License version
  15  * 2 as published by the Free Software Foundation.
  16  */
  17 #ifndef __ARCH_ARM_MACH_OMAP2_VC_H
  18 #define __ARCH_ARM_MACH_OMAP2_VC_H
  19
  20 #include <linux/kernel.h>
  21
  22 struct voltagedomain;
  23
  24 /**
  25  * struct omap_vc_common - per-VC register/bitfield data
  26  * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register
  27  * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register
  28  * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start
  29  * @data_shift: DATA field shift in PRM_VC_BYPASS_VAL register
  30  * @slaveaddr_shift: SLAVEADDR field shift in PRM_VC_BYPASS_VAL register
  31  * @regaddr_shift: REGADDR field shift in PRM_VC_BYPASS_VAL register
  32  * @cmd_on_shift: ON field shift in PRM_VC_CMD_VAL_* register
  33  * @cmd_onlp_shift: ONLP field shift in PRM_VC_CMD_VAL_* register
  34  * @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register
  35  * @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register
  36  * @i2c_cfg_reg: I2C configuration register offset
  37  * @i2c_cfg_hsen_mask: high-speed mode bit field mask in I2C config register
  38  * @i2c_mcode_mask: MCODE field mask for I2C config register
  39  *
  40  * XXX One of cmd_on_mask and cmd_on_shift are not needed
  41  * XXX VALID should probably be a shift, not a mask
  42  */
  43 struct omap_vc_common {
  44         u32 cmd_on_mask;
  45         u32 valid;
  46         u8 bypass_val_reg;
  47         u8 data_shift;
  48         u8 slaveaddr_shift;
  49         u8 regaddr_shift;
  50         u8 cmd_on_shift;
  51         u8 cmd_onlp_shift;
  52         u8 cmd_ret_shift;
  53         u8 cmd_off_shift;
  54         u8 i2c_cfg_reg;
  55         u8 i2c_cfg_hsen_mask;
  56         u8 i2c_mcode_mask;
  57 };
  58
  59 /* omap_vc_channel.flags values */
  60 #define OMAP_VC_CHANNEL_DEFAULT BIT(0)
  61 #define OMAP_VC_CHANNEL_CFG_MUTANT BIT(1)
  62
  63 /**
  64  * struct omap_vc_channel - VC per-instance data
  65  * @i2c_slave_addr: I2C slave address of PMIC for this VC channel
  66  * @volt_reg_addr: voltage configuration register address
  67  * @cmd_reg_addr: command configuration register address
  68  * @setup_time: setup time (in sys_clk cycles) of regulator for this channel
  69  * @cfg_channel: current value of VC channel configuration register
  70  * @i2c_high_speed: whether or not to use I2C high-speed mode
  71  *
  72  * @common: pointer to VC common data for this platform
  73  * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register
  74  * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register
  75  * @smps_cmdra_mask: CMDRA* bitmask in the PRM_VC_CMD_RA register
  76  * @cmdval_reg: register for on/ret/off voltage level values for this channel
  77  * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start
  78  * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start
  79  * @smps_cmdra_reg: Offset of PRM_VC_SMPS_CMD_RA reg from PRM start
  80  * @cfg_channel_reg: VC channel configuration register
  81  * @cfg_channel_sa_shift: bit shift for slave address cfg_channel register
  82  * @flags: VC channel-specific flags (optional)
  83  */
  84 struct omap_vc_channel {
  85         /* channel state */
  86         u16 i2c_slave_addr;
  87         u16 volt_reg_addr;
  88         u16 cmd_reg_addr;
  89         u8 cfg_channel;
  90         bool i2c_high_speed;
  91
  92         /* register access data */
  93         const struct omap_vc_common *common;
  94         u32 smps_sa_mask;
  95         u32 smps_volra_mask;
  96         u32 smps_cmdra_mask;
  97         u8 cmdval_reg;
  98         u8 smps_sa_reg;
  99         u8 smps_volra_reg;
 100         u8 smps_cmdra_reg;
 101         u8 cfg_channel_reg;
 102         u8 cfg_channel_sa_shift;
 103         u8 flags;
 104 };
 105
 106 extern struct omap_vc_channel omap3_vc_mpu;
 107 extern struct omap_vc_channel omap3_vc_core;
 108
 109 extern struct omap_vc_channel omap4_vc_mpu;
 110 extern struct omap_vc_channel omap4_vc_iva;
 111 extern struct omap_vc_channel omap4_vc_core;
 112
 113 extern struct omap_vc_param omap3_mpu_vc_data;
 114 extern struct omap_vc_param omap3_core_vc_data;
 115
 116 extern struct omap_vc_param omap4_mpu_vc_data;
 117 extern struct omap_vc_param omap4_iva_vc_data;
 118 extern struct omap_vc_param omap4_core_vc_data;
 119
 120 void omap_vc_init_channel(struct voltagedomain *voltdm);
 121 int omap_vc_pre_scale(struct voltagedomain *voltdm,
 122                       unsigned long target_volt,
 123                       u8 *target_vsel, u8 *current_vsel);
 124 void omap_vc_post_scale(struct voltagedomain *voltdm,
 125                         unsigned long target_volt,
 126                         u8 target_vsel, u8 current_vsel);
 127 int omap_vc_bypass_scale(struct voltagedomain *voltdm,
 128                          unsigned long target_volt);
 129
 130 #endif
 131