Merge branch 'nfs-for-2.6.37' of git://git.linux-nfs.org/projects/trondmy/nfs-2.6
[deliverable/linux.git] / arch / arm / mach-pxa / devices.c
1 #include <linux/module.h>
2 #include <linux/kernel.h>
3 #include <linux/init.h>
4 #include <linux/platform_device.h>
5 #include <linux/dma-mapping.h>
6
7 #include <asm/pmu.h>
8 #include <mach/udc.h>
9 #include <mach/pxa3xx-u2d.h>
10 #include <mach/pxafb.h>
11 #include <mach/mmc.h>
12 #include <mach/irda.h>
13 #include <mach/ohci.h>
14 #include <plat/pxa27x_keypad.h>
15 #include <mach/pxa2xx_spi.h>
16 #include <mach/camera.h>
17 #include <mach/audio.h>
18 #include <mach/hardware.h>
19 #include <plat/i2c.h>
20 #include <plat/pxa3xx_nand.h>
21
22 #include "devices.h"
23 #include "generic.h"
24
25 void __init pxa_register_device(struct platform_device *dev, void *data)
26 {
27 int ret;
28
29 dev->dev.platform_data = data;
30
31 ret = platform_device_register(dev);
32 if (ret)
33 dev_err(&dev->dev, "unable to register device: %d\n", ret);
34 }
35
36 static struct resource pxa_resource_pmu = {
37 .start = IRQ_PMU,
38 .end = IRQ_PMU,
39 .flags = IORESOURCE_IRQ,
40 };
41
42 struct platform_device pxa_device_pmu = {
43 .name = "arm-pmu",
44 .id = ARM_PMU_DEVICE_CPU,
45 .resource = &pxa_resource_pmu,
46 .num_resources = 1,
47 };
48
49 static struct resource pxamci_resources[] = {
50 [0] = {
51 .start = 0x41100000,
52 .end = 0x41100fff,
53 .flags = IORESOURCE_MEM,
54 },
55 [1] = {
56 .start = IRQ_MMC,
57 .end = IRQ_MMC,
58 .flags = IORESOURCE_IRQ,
59 },
60 [2] = {
61 .start = 21,
62 .end = 21,
63 .flags = IORESOURCE_DMA,
64 },
65 [3] = {
66 .start = 22,
67 .end = 22,
68 .flags = IORESOURCE_DMA,
69 },
70 };
71
72 static u64 pxamci_dmamask = 0xffffffffUL;
73
74 struct platform_device pxa_device_mci = {
75 .name = "pxa2xx-mci",
76 .id = 0,
77 .dev = {
78 .dma_mask = &pxamci_dmamask,
79 .coherent_dma_mask = 0xffffffff,
80 },
81 .num_resources = ARRAY_SIZE(pxamci_resources),
82 .resource = pxamci_resources,
83 };
84
85 void __init pxa_set_mci_info(struct pxamci_platform_data *info)
86 {
87 pxa_register_device(&pxa_device_mci, info);
88 }
89
90
91 static struct pxa2xx_udc_mach_info pxa_udc_info = {
92 .gpio_pullup = -1,
93 .gpio_vbus = -1,
94 };
95
96 void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
97 {
98 memcpy(&pxa_udc_info, info, sizeof *info);
99 }
100
101 static struct resource pxa2xx_udc_resources[] = {
102 [0] = {
103 .start = 0x40600000,
104 .end = 0x4060ffff,
105 .flags = IORESOURCE_MEM,
106 },
107 [1] = {
108 .start = IRQ_USB,
109 .end = IRQ_USB,
110 .flags = IORESOURCE_IRQ,
111 },
112 };
113
114 static u64 udc_dma_mask = ~(u32)0;
115
116 struct platform_device pxa25x_device_udc = {
117 .name = "pxa25x-udc",
118 .id = -1,
119 .resource = pxa2xx_udc_resources,
120 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
121 .dev = {
122 .platform_data = &pxa_udc_info,
123 .dma_mask = &udc_dma_mask,
124 }
125 };
126
127 struct platform_device pxa27x_device_udc = {
128 .name = "pxa27x-udc",
129 .id = -1,
130 .resource = pxa2xx_udc_resources,
131 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
132 .dev = {
133 .platform_data = &pxa_udc_info,
134 .dma_mask = &udc_dma_mask,
135 }
136 };
137
138 #ifdef CONFIG_PXA3xx
139 static struct resource pxa3xx_u2d_resources[] = {
140 [0] = {
141 .start = 0x54100000,
142 .end = 0x54100fff,
143 .flags = IORESOURCE_MEM,
144 },
145 [1] = {
146 .start = IRQ_USB2,
147 .end = IRQ_USB2,
148 .flags = IORESOURCE_IRQ,
149 },
150 };
151
152 struct platform_device pxa3xx_device_u2d = {
153 .name = "pxa3xx-u2d",
154 .id = -1,
155 .resource = pxa3xx_u2d_resources,
156 .num_resources = ARRAY_SIZE(pxa3xx_u2d_resources),
157 };
158
159 void __init pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info)
160 {
161 pxa_register_device(&pxa3xx_device_u2d, info);
162 }
163 #endif /* CONFIG_PXA3xx */
164
165 static struct resource pxafb_resources[] = {
166 [0] = {
167 .start = 0x44000000,
168 .end = 0x4400ffff,
169 .flags = IORESOURCE_MEM,
170 },
171 [1] = {
172 .start = IRQ_LCD,
173 .end = IRQ_LCD,
174 .flags = IORESOURCE_IRQ,
175 },
176 };
177
178 static u64 fb_dma_mask = ~(u64)0;
179
180 struct platform_device pxa_device_fb = {
181 .name = "pxa2xx-fb",
182 .id = -1,
183 .dev = {
184 .dma_mask = &fb_dma_mask,
185 .coherent_dma_mask = 0xffffffff,
186 },
187 .num_resources = ARRAY_SIZE(pxafb_resources),
188 .resource = pxafb_resources,
189 };
190
191 void __init set_pxa_fb_info(struct pxafb_mach_info *info)
192 {
193 pxa_register_device(&pxa_device_fb, info);
194 }
195
196 void __init set_pxa_fb_parent(struct device *parent_dev)
197 {
198 pxa_device_fb.dev.parent = parent_dev;
199 }
200
201 static struct resource pxa_resource_ffuart[] = {
202 {
203 .start = 0x40100000,
204 .end = 0x40100023,
205 .flags = IORESOURCE_MEM,
206 }, {
207 .start = IRQ_FFUART,
208 .end = IRQ_FFUART,
209 .flags = IORESOURCE_IRQ,
210 }
211 };
212
213 struct platform_device pxa_device_ffuart = {
214 .name = "pxa2xx-uart",
215 .id = 0,
216 .resource = pxa_resource_ffuart,
217 .num_resources = ARRAY_SIZE(pxa_resource_ffuart),
218 };
219
220 void __init pxa_set_ffuart_info(void *info)
221 {
222 pxa_register_device(&pxa_device_ffuart, info);
223 }
224
225 static struct resource pxa_resource_btuart[] = {
226 {
227 .start = 0x40200000,
228 .end = 0x40200023,
229 .flags = IORESOURCE_MEM,
230 }, {
231 .start = IRQ_BTUART,
232 .end = IRQ_BTUART,
233 .flags = IORESOURCE_IRQ,
234 }
235 };
236
237 struct platform_device pxa_device_btuart = {
238 .name = "pxa2xx-uart",
239 .id = 1,
240 .resource = pxa_resource_btuart,
241 .num_resources = ARRAY_SIZE(pxa_resource_btuart),
242 };
243
244 void __init pxa_set_btuart_info(void *info)
245 {
246 pxa_register_device(&pxa_device_btuart, info);
247 }
248
249 static struct resource pxa_resource_stuart[] = {
250 {
251 .start = 0x40700000,
252 .end = 0x40700023,
253 .flags = IORESOURCE_MEM,
254 }, {
255 .start = IRQ_STUART,
256 .end = IRQ_STUART,
257 .flags = IORESOURCE_IRQ,
258 }
259 };
260
261 struct platform_device pxa_device_stuart = {
262 .name = "pxa2xx-uart",
263 .id = 2,
264 .resource = pxa_resource_stuart,
265 .num_resources = ARRAY_SIZE(pxa_resource_stuart),
266 };
267
268 void __init pxa_set_stuart_info(void *info)
269 {
270 pxa_register_device(&pxa_device_stuart, info);
271 }
272
273 static struct resource pxa_resource_hwuart[] = {
274 {
275 .start = 0x41600000,
276 .end = 0x4160002F,
277 .flags = IORESOURCE_MEM,
278 }, {
279 .start = IRQ_HWUART,
280 .end = IRQ_HWUART,
281 .flags = IORESOURCE_IRQ,
282 }
283 };
284
285 struct platform_device pxa_device_hwuart = {
286 .name = "pxa2xx-uart",
287 .id = 3,
288 .resource = pxa_resource_hwuart,
289 .num_resources = ARRAY_SIZE(pxa_resource_hwuart),
290 };
291
292 void __init pxa_set_hwuart_info(void *info)
293 {
294 if (cpu_is_pxa255())
295 pxa_register_device(&pxa_device_hwuart, info);
296 else
297 pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
298 }
299
300 static struct resource pxai2c_resources[] = {
301 {
302 .start = 0x40301680,
303 .end = 0x403016a3,
304 .flags = IORESOURCE_MEM,
305 }, {
306 .start = IRQ_I2C,
307 .end = IRQ_I2C,
308 .flags = IORESOURCE_IRQ,
309 },
310 };
311
312 struct platform_device pxa_device_i2c = {
313 .name = "pxa2xx-i2c",
314 .id = 0,
315 .resource = pxai2c_resources,
316 .num_resources = ARRAY_SIZE(pxai2c_resources),
317 };
318
319 void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
320 {
321 pxa_register_device(&pxa_device_i2c, info);
322 }
323
324 #ifdef CONFIG_PXA27x
325 static struct resource pxa27x_resources_i2c_power[] = {
326 {
327 .start = 0x40f00180,
328 .end = 0x40f001a3,
329 .flags = IORESOURCE_MEM,
330 }, {
331 .start = IRQ_PWRI2C,
332 .end = IRQ_PWRI2C,
333 .flags = IORESOURCE_IRQ,
334 },
335 };
336
337 struct platform_device pxa27x_device_i2c_power = {
338 .name = "pxa2xx-i2c",
339 .id = 1,
340 .resource = pxa27x_resources_i2c_power,
341 .num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power),
342 };
343 #endif
344
345 #ifdef CONFIG_PXA3xx
346 static struct resource pxa3xx_resources_i2c_power[] = {
347 {
348 .start = 0x40f500c0,
349 .end = 0x40f500d3,
350 .flags = IORESOURCE_MEM,
351 }, {
352 .start = IRQ_PWRI2C,
353 .end = IRQ_PWRI2C,
354 .flags = IORESOURCE_IRQ,
355 },
356 };
357
358 struct platform_device pxa3xx_device_i2c_power = {
359 .name = "pxa3xx-pwri2c",
360 .id = 1,
361 .resource = pxa3xx_resources_i2c_power,
362 .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power),
363 };
364 #endif
365
366 static struct resource pxai2s_resources[] = {
367 {
368 .start = 0x40400000,
369 .end = 0x40400083,
370 .flags = IORESOURCE_MEM,
371 }, {
372 .start = IRQ_I2S,
373 .end = IRQ_I2S,
374 .flags = IORESOURCE_IRQ,
375 },
376 };
377
378 struct platform_device pxa_device_i2s = {
379 .name = "pxa2xx-i2s",
380 .id = -1,
381 .resource = pxai2s_resources,
382 .num_resources = ARRAY_SIZE(pxai2s_resources),
383 };
384
385 struct platform_device pxa_device_asoc_ssp1 = {
386 .name = "pxa-ssp-dai",
387 .id = 0,
388 };
389
390 struct platform_device pxa_device_asoc_ssp2= {
391 .name = "pxa-ssp-dai",
392 .id = 1,
393 };
394
395 struct platform_device pxa_device_asoc_ssp3 = {
396 .name = "pxa-ssp-dai",
397 .id = 2,
398 };
399
400 struct platform_device pxa_device_asoc_ssp4 = {
401 .name = "pxa-ssp-dai",
402 .id = 3,
403 };
404
405 struct platform_device pxa_device_asoc_platform = {
406 .name = "pxa-pcm-audio",
407 .id = -1,
408 };
409
410 static u64 pxaficp_dmamask = ~(u32)0;
411
412 struct platform_device pxa_device_ficp = {
413 .name = "pxa2xx-ir",
414 .id = -1,
415 .dev = {
416 .dma_mask = &pxaficp_dmamask,
417 .coherent_dma_mask = 0xffffffff,
418 },
419 };
420
421 void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
422 {
423 pxa_register_device(&pxa_device_ficp, info);
424 }
425
426 static struct resource pxa_rtc_resources[] = {
427 [0] = {
428 .start = 0x40900000,
429 .end = 0x40900000 + 0x3b,
430 .flags = IORESOURCE_MEM,
431 },
432 [1] = {
433 .start = IRQ_RTC1Hz,
434 .end = IRQ_RTC1Hz,
435 .flags = IORESOURCE_IRQ,
436 },
437 [2] = {
438 .start = IRQ_RTCAlrm,
439 .end = IRQ_RTCAlrm,
440 .flags = IORESOURCE_IRQ,
441 },
442 };
443
444 struct platform_device sa1100_device_rtc = {
445 .name = "sa1100-rtc",
446 .id = -1,
447 };
448
449 struct platform_device pxa_device_rtc = {
450 .name = "pxa-rtc",
451 .id = -1,
452 .num_resources = ARRAY_SIZE(pxa_rtc_resources),
453 .resource = pxa_rtc_resources,
454 };
455
456 static struct resource pxa_ac97_resources[] = {
457 [0] = {
458 .start = 0x40500000,
459 .end = 0x40500000 + 0xfff,
460 .flags = IORESOURCE_MEM,
461 },
462 [1] = {
463 .start = IRQ_AC97,
464 .end = IRQ_AC97,
465 .flags = IORESOURCE_IRQ,
466 },
467 };
468
469 static u64 pxa_ac97_dmamask = 0xffffffffUL;
470
471 struct platform_device pxa_device_ac97 = {
472 .name = "pxa2xx-ac97",
473 .id = -1,
474 .dev = {
475 .dma_mask = &pxa_ac97_dmamask,
476 .coherent_dma_mask = 0xffffffff,
477 },
478 .num_resources = ARRAY_SIZE(pxa_ac97_resources),
479 .resource = pxa_ac97_resources,
480 };
481
482 void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
483 {
484 pxa_register_device(&pxa_device_ac97, ops);
485 }
486
487 #ifdef CONFIG_PXA25x
488
489 static struct resource pxa25x_resource_pwm0[] = {
490 [0] = {
491 .start = 0x40b00000,
492 .end = 0x40b0000f,
493 .flags = IORESOURCE_MEM,
494 },
495 };
496
497 struct platform_device pxa25x_device_pwm0 = {
498 .name = "pxa25x-pwm",
499 .id = 0,
500 .resource = pxa25x_resource_pwm0,
501 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
502 };
503
504 static struct resource pxa25x_resource_pwm1[] = {
505 [0] = {
506 .start = 0x40c00000,
507 .end = 0x40c0000f,
508 .flags = IORESOURCE_MEM,
509 },
510 };
511
512 struct platform_device pxa25x_device_pwm1 = {
513 .name = "pxa25x-pwm",
514 .id = 1,
515 .resource = pxa25x_resource_pwm1,
516 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
517 };
518
519 static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
520
521 static struct resource pxa25x_resource_ssp[] = {
522 [0] = {
523 .start = 0x41000000,
524 .end = 0x4100001f,
525 .flags = IORESOURCE_MEM,
526 },
527 [1] = {
528 .start = IRQ_SSP,
529 .end = IRQ_SSP,
530 .flags = IORESOURCE_IRQ,
531 },
532 [2] = {
533 /* DRCMR for RX */
534 .start = 13,
535 .end = 13,
536 .flags = IORESOURCE_DMA,
537 },
538 [3] = {
539 /* DRCMR for TX */
540 .start = 14,
541 .end = 14,
542 .flags = IORESOURCE_DMA,
543 },
544 };
545
546 struct platform_device pxa25x_device_ssp = {
547 .name = "pxa25x-ssp",
548 .id = 0,
549 .dev = {
550 .dma_mask = &pxa25x_ssp_dma_mask,
551 .coherent_dma_mask = DMA_BIT_MASK(32),
552 },
553 .resource = pxa25x_resource_ssp,
554 .num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
555 };
556
557 static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
558
559 static struct resource pxa25x_resource_nssp[] = {
560 [0] = {
561 .start = 0x41400000,
562 .end = 0x4140002f,
563 .flags = IORESOURCE_MEM,
564 },
565 [1] = {
566 .start = IRQ_NSSP,
567 .end = IRQ_NSSP,
568 .flags = IORESOURCE_IRQ,
569 },
570 [2] = {
571 /* DRCMR for RX */
572 .start = 15,
573 .end = 15,
574 .flags = IORESOURCE_DMA,
575 },
576 [3] = {
577 /* DRCMR for TX */
578 .start = 16,
579 .end = 16,
580 .flags = IORESOURCE_DMA,
581 },
582 };
583
584 struct platform_device pxa25x_device_nssp = {
585 .name = "pxa25x-nssp",
586 .id = 1,
587 .dev = {
588 .dma_mask = &pxa25x_nssp_dma_mask,
589 .coherent_dma_mask = DMA_BIT_MASK(32),
590 },
591 .resource = pxa25x_resource_nssp,
592 .num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
593 };
594
595 static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
596
597 static struct resource pxa25x_resource_assp[] = {
598 [0] = {
599 .start = 0x41500000,
600 .end = 0x4150002f,
601 .flags = IORESOURCE_MEM,
602 },
603 [1] = {
604 .start = IRQ_ASSP,
605 .end = IRQ_ASSP,
606 .flags = IORESOURCE_IRQ,
607 },
608 [2] = {
609 /* DRCMR for RX */
610 .start = 23,
611 .end = 23,
612 .flags = IORESOURCE_DMA,
613 },
614 [3] = {
615 /* DRCMR for TX */
616 .start = 24,
617 .end = 24,
618 .flags = IORESOURCE_DMA,
619 },
620 };
621
622 struct platform_device pxa25x_device_assp = {
623 /* ASSP is basically equivalent to NSSP */
624 .name = "pxa25x-nssp",
625 .id = 2,
626 .dev = {
627 .dma_mask = &pxa25x_assp_dma_mask,
628 .coherent_dma_mask = DMA_BIT_MASK(32),
629 },
630 .resource = pxa25x_resource_assp,
631 .num_resources = ARRAY_SIZE(pxa25x_resource_assp),
632 };
633 #endif /* CONFIG_PXA25x */
634
635 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
636
637 static struct resource pxa27x_resource_keypad[] = {
638 [0] = {
639 .start = 0x41500000,
640 .end = 0x4150004c,
641 .flags = IORESOURCE_MEM,
642 },
643 [1] = {
644 .start = IRQ_KEYPAD,
645 .end = IRQ_KEYPAD,
646 .flags = IORESOURCE_IRQ,
647 },
648 };
649
650 struct platform_device pxa27x_device_keypad = {
651 .name = "pxa27x-keypad",
652 .id = -1,
653 .resource = pxa27x_resource_keypad,
654 .num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
655 };
656
657 void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
658 {
659 pxa_register_device(&pxa27x_device_keypad, info);
660 }
661
662 static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
663
664 static struct resource pxa27x_resource_ohci[] = {
665 [0] = {
666 .start = 0x4C000000,
667 .end = 0x4C00ff6f,
668 .flags = IORESOURCE_MEM,
669 },
670 [1] = {
671 .start = IRQ_USBH1,
672 .end = IRQ_USBH1,
673 .flags = IORESOURCE_IRQ,
674 },
675 };
676
677 struct platform_device pxa27x_device_ohci = {
678 .name = "pxa27x-ohci",
679 .id = -1,
680 .dev = {
681 .dma_mask = &pxa27x_ohci_dma_mask,
682 .coherent_dma_mask = DMA_BIT_MASK(32),
683 },
684 .num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
685 .resource = pxa27x_resource_ohci,
686 };
687
688 void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
689 {
690 pxa_register_device(&pxa27x_device_ohci, info);
691 }
692
693 static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
694
695 static struct resource pxa27x_resource_ssp1[] = {
696 [0] = {
697 .start = 0x41000000,
698 .end = 0x4100003f,
699 .flags = IORESOURCE_MEM,
700 },
701 [1] = {
702 .start = IRQ_SSP,
703 .end = IRQ_SSP,
704 .flags = IORESOURCE_IRQ,
705 },
706 [2] = {
707 /* DRCMR for RX */
708 .start = 13,
709 .end = 13,
710 .flags = IORESOURCE_DMA,
711 },
712 [3] = {
713 /* DRCMR for TX */
714 .start = 14,
715 .end = 14,
716 .flags = IORESOURCE_DMA,
717 },
718 };
719
720 struct platform_device pxa27x_device_ssp1 = {
721 .name = "pxa27x-ssp",
722 .id = 0,
723 .dev = {
724 .dma_mask = &pxa27x_ssp1_dma_mask,
725 .coherent_dma_mask = DMA_BIT_MASK(32),
726 },
727 .resource = pxa27x_resource_ssp1,
728 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
729 };
730
731 static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
732
733 static struct resource pxa27x_resource_ssp2[] = {
734 [0] = {
735 .start = 0x41700000,
736 .end = 0x4170003f,
737 .flags = IORESOURCE_MEM,
738 },
739 [1] = {
740 .start = IRQ_SSP2,
741 .end = IRQ_SSP2,
742 .flags = IORESOURCE_IRQ,
743 },
744 [2] = {
745 /* DRCMR for RX */
746 .start = 15,
747 .end = 15,
748 .flags = IORESOURCE_DMA,
749 },
750 [3] = {
751 /* DRCMR for TX */
752 .start = 16,
753 .end = 16,
754 .flags = IORESOURCE_DMA,
755 },
756 };
757
758 struct platform_device pxa27x_device_ssp2 = {
759 .name = "pxa27x-ssp",
760 .id = 1,
761 .dev = {
762 .dma_mask = &pxa27x_ssp2_dma_mask,
763 .coherent_dma_mask = DMA_BIT_MASK(32),
764 },
765 .resource = pxa27x_resource_ssp2,
766 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
767 };
768
769 static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
770
771 static struct resource pxa27x_resource_ssp3[] = {
772 [0] = {
773 .start = 0x41900000,
774 .end = 0x4190003f,
775 .flags = IORESOURCE_MEM,
776 },
777 [1] = {
778 .start = IRQ_SSP3,
779 .end = IRQ_SSP3,
780 .flags = IORESOURCE_IRQ,
781 },
782 [2] = {
783 /* DRCMR for RX */
784 .start = 66,
785 .end = 66,
786 .flags = IORESOURCE_DMA,
787 },
788 [3] = {
789 /* DRCMR for TX */
790 .start = 67,
791 .end = 67,
792 .flags = IORESOURCE_DMA,
793 },
794 };
795
796 struct platform_device pxa27x_device_ssp3 = {
797 .name = "pxa27x-ssp",
798 .id = 2,
799 .dev = {
800 .dma_mask = &pxa27x_ssp3_dma_mask,
801 .coherent_dma_mask = DMA_BIT_MASK(32),
802 },
803 .resource = pxa27x_resource_ssp3,
804 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
805 };
806
807 static struct resource pxa27x_resource_pwm0[] = {
808 [0] = {
809 .start = 0x40b00000,
810 .end = 0x40b0001f,
811 .flags = IORESOURCE_MEM,
812 },
813 };
814
815 struct platform_device pxa27x_device_pwm0 = {
816 .name = "pxa27x-pwm",
817 .id = 0,
818 .resource = pxa27x_resource_pwm0,
819 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
820 };
821
822 static struct resource pxa27x_resource_pwm1[] = {
823 [0] = {
824 .start = 0x40c00000,
825 .end = 0x40c0001f,
826 .flags = IORESOURCE_MEM,
827 },
828 };
829
830 struct platform_device pxa27x_device_pwm1 = {
831 .name = "pxa27x-pwm",
832 .id = 1,
833 .resource = pxa27x_resource_pwm1,
834 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
835 };
836
837 static struct resource pxa27x_resource_camera[] = {
838 [0] = {
839 .start = 0x50000000,
840 .end = 0x50000fff,
841 .flags = IORESOURCE_MEM,
842 },
843 [1] = {
844 .start = IRQ_CAMERA,
845 .end = IRQ_CAMERA,
846 .flags = IORESOURCE_IRQ,
847 },
848 };
849
850 static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
851
852 static struct platform_device pxa27x_device_camera = {
853 .name = "pxa27x-camera",
854 .id = 0, /* This is used to put cameras on this interface */
855 .dev = {
856 .dma_mask = &pxa27x_dma_mask_camera,
857 .coherent_dma_mask = 0xffffffff,
858 },
859 .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
860 .resource = pxa27x_resource_camera,
861 };
862
863 void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
864 {
865 pxa_register_device(&pxa27x_device_camera, info);
866 }
867 #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
868
869 #ifdef CONFIG_PXA3xx
870 static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
871
872 static struct resource pxa3xx_resource_ssp4[] = {
873 [0] = {
874 .start = 0x41a00000,
875 .end = 0x41a0003f,
876 .flags = IORESOURCE_MEM,
877 },
878 [1] = {
879 .start = IRQ_SSP4,
880 .end = IRQ_SSP4,
881 .flags = IORESOURCE_IRQ,
882 },
883 [2] = {
884 /* DRCMR for RX */
885 .start = 2,
886 .end = 2,
887 .flags = IORESOURCE_DMA,
888 },
889 [3] = {
890 /* DRCMR for TX */
891 .start = 3,
892 .end = 3,
893 .flags = IORESOURCE_DMA,
894 },
895 };
896
897 struct platform_device pxa3xx_device_ssp4 = {
898 /* PXA3xx SSP is basically equivalent to PXA27x */
899 .name = "pxa27x-ssp",
900 .id = 3,
901 .dev = {
902 .dma_mask = &pxa3xx_ssp4_dma_mask,
903 .coherent_dma_mask = DMA_BIT_MASK(32),
904 },
905 .resource = pxa3xx_resource_ssp4,
906 .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
907 };
908
909 static struct resource pxa3xx_resources_mci2[] = {
910 [0] = {
911 .start = 0x42000000,
912 .end = 0x42000fff,
913 .flags = IORESOURCE_MEM,
914 },
915 [1] = {
916 .start = IRQ_MMC2,
917 .end = IRQ_MMC2,
918 .flags = IORESOURCE_IRQ,
919 },
920 [2] = {
921 .start = 93,
922 .end = 93,
923 .flags = IORESOURCE_DMA,
924 },
925 [3] = {
926 .start = 94,
927 .end = 94,
928 .flags = IORESOURCE_DMA,
929 },
930 };
931
932 struct platform_device pxa3xx_device_mci2 = {
933 .name = "pxa2xx-mci",
934 .id = 1,
935 .dev = {
936 .dma_mask = &pxamci_dmamask,
937 .coherent_dma_mask = 0xffffffff,
938 },
939 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
940 .resource = pxa3xx_resources_mci2,
941 };
942
943 void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
944 {
945 pxa_register_device(&pxa3xx_device_mci2, info);
946 }
947
948 static struct resource pxa3xx_resources_mci3[] = {
949 [0] = {
950 .start = 0x42500000,
951 .end = 0x42500fff,
952 .flags = IORESOURCE_MEM,
953 },
954 [1] = {
955 .start = IRQ_MMC3,
956 .end = IRQ_MMC3,
957 .flags = IORESOURCE_IRQ,
958 },
959 [2] = {
960 .start = 100,
961 .end = 100,
962 .flags = IORESOURCE_DMA,
963 },
964 [3] = {
965 .start = 101,
966 .end = 101,
967 .flags = IORESOURCE_DMA,
968 },
969 };
970
971 struct platform_device pxa3xx_device_mci3 = {
972 .name = "pxa2xx-mci",
973 .id = 2,
974 .dev = {
975 .dma_mask = &pxamci_dmamask,
976 .coherent_dma_mask = 0xffffffff,
977 },
978 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
979 .resource = pxa3xx_resources_mci3,
980 };
981
982 void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
983 {
984 pxa_register_device(&pxa3xx_device_mci3, info);
985 }
986
987 static struct resource pxa3xx_resources_nand[] = {
988 [0] = {
989 .start = 0x43100000,
990 .end = 0x43100053,
991 .flags = IORESOURCE_MEM,
992 },
993 [1] = {
994 .start = IRQ_NAND,
995 .end = IRQ_NAND,
996 .flags = IORESOURCE_IRQ,
997 },
998 [2] = {
999 /* DRCMR for Data DMA */
1000 .start = 97,
1001 .end = 97,
1002 .flags = IORESOURCE_DMA,
1003 },
1004 [3] = {
1005 /* DRCMR for Command DMA */
1006 .start = 99,
1007 .end = 99,
1008 .flags = IORESOURCE_DMA,
1009 },
1010 };
1011
1012 static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
1013
1014 struct platform_device pxa3xx_device_nand = {
1015 .name = "pxa3xx-nand",
1016 .id = -1,
1017 .dev = {
1018 .dma_mask = &pxa3xx_nand_dma_mask,
1019 .coherent_dma_mask = DMA_BIT_MASK(32),
1020 },
1021 .num_resources = ARRAY_SIZE(pxa3xx_resources_nand),
1022 .resource = pxa3xx_resources_nand,
1023 };
1024
1025 void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
1026 {
1027 pxa_register_device(&pxa3xx_device_nand, info);
1028 }
1029
1030 static struct resource pxa3xx_resources_gcu[] = {
1031 {
1032 .start = 0x54000000,
1033 .end = 0x54000fff,
1034 .flags = IORESOURCE_MEM,
1035 },
1036 {
1037 .start = IRQ_GCU,
1038 .end = IRQ_GCU,
1039 .flags = IORESOURCE_IRQ,
1040 },
1041 };
1042
1043 static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
1044
1045 struct platform_device pxa3xx_device_gcu = {
1046 .name = "pxa3xx-gcu",
1047 .id = -1,
1048 .num_resources = ARRAY_SIZE(pxa3xx_resources_gcu),
1049 .resource = pxa3xx_resources_gcu,
1050 .dev = {
1051 .dma_mask = &pxa3xx_gcu_dmamask,
1052 .coherent_dma_mask = 0xffffffff,
1053 },
1054 };
1055
1056 #endif /* CONFIG_PXA3xx */
1057
1058 /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1059 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
1060 void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
1061 {
1062 struct platform_device *pd;
1063
1064 pd = platform_device_alloc("pxa2xx-spi", id);
1065 if (pd == NULL) {
1066 printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
1067 id);
1068 return;
1069 }
1070
1071 pd->dev.platform_data = info;
1072 platform_device_add(pd);
1073 }
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