Merge branch 'message-callback' into kbuild/kconfig
[deliverable/linux.git] / arch / arm / mach-pxa / devices.c
1 #include <linux/module.h>
2 #include <linux/kernel.h>
3 #include <linux/init.h>
4 #include <linux/platform_device.h>
5 #include <linux/dma-mapping.h>
6
7 #include <asm/pmu.h>
8 #include <mach/udc.h>
9 #include <mach/pxafb.h>
10 #include <mach/mmc.h>
11 #include <mach/irda.h>
12 #include <mach/ohci.h>
13 #include <mach/pxa27x_keypad.h>
14 #include <mach/pxa2xx_spi.h>
15 #include <mach/camera.h>
16 #include <mach/audio.h>
17 #include <mach/hardware.h>
18 #include <plat/i2c.h>
19 #include <plat/pxa3xx_nand.h>
20
21 #include "devices.h"
22 #include "generic.h"
23
24 void __init pxa_register_device(struct platform_device *dev, void *data)
25 {
26 int ret;
27
28 dev->dev.platform_data = data;
29
30 ret = platform_device_register(dev);
31 if (ret)
32 dev_err(&dev->dev, "unable to register device: %d\n", ret);
33 }
34
35 static struct resource pxa_resource_pmu = {
36 .start = IRQ_PMU,
37 .end = IRQ_PMU,
38 .flags = IORESOURCE_IRQ,
39 };
40
41 struct platform_device pxa_device_pmu = {
42 .name = "arm-pmu",
43 .id = ARM_PMU_DEVICE_CPU,
44 .resource = &pxa_resource_pmu,
45 .num_resources = 1,
46 };
47
48 static struct resource pxamci_resources[] = {
49 [0] = {
50 .start = 0x41100000,
51 .end = 0x41100fff,
52 .flags = IORESOURCE_MEM,
53 },
54 [1] = {
55 .start = IRQ_MMC,
56 .end = IRQ_MMC,
57 .flags = IORESOURCE_IRQ,
58 },
59 [2] = {
60 .start = 21,
61 .end = 21,
62 .flags = IORESOURCE_DMA,
63 },
64 [3] = {
65 .start = 22,
66 .end = 22,
67 .flags = IORESOURCE_DMA,
68 },
69 };
70
71 static u64 pxamci_dmamask = 0xffffffffUL;
72
73 struct platform_device pxa_device_mci = {
74 .name = "pxa2xx-mci",
75 .id = 0,
76 .dev = {
77 .dma_mask = &pxamci_dmamask,
78 .coherent_dma_mask = 0xffffffff,
79 },
80 .num_resources = ARRAY_SIZE(pxamci_resources),
81 .resource = pxamci_resources,
82 };
83
84 void __init pxa_set_mci_info(struct pxamci_platform_data *info)
85 {
86 pxa_register_device(&pxa_device_mci, info);
87 }
88
89
90 static struct pxa2xx_udc_mach_info pxa_udc_info = {
91 .gpio_pullup = -1,
92 .gpio_vbus = -1,
93 };
94
95 void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
96 {
97 memcpy(&pxa_udc_info, info, sizeof *info);
98 }
99
100 static struct resource pxa2xx_udc_resources[] = {
101 [0] = {
102 .start = 0x40600000,
103 .end = 0x4060ffff,
104 .flags = IORESOURCE_MEM,
105 },
106 [1] = {
107 .start = IRQ_USB,
108 .end = IRQ_USB,
109 .flags = IORESOURCE_IRQ,
110 },
111 };
112
113 static u64 udc_dma_mask = ~(u32)0;
114
115 struct platform_device pxa25x_device_udc = {
116 .name = "pxa25x-udc",
117 .id = -1,
118 .resource = pxa2xx_udc_resources,
119 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
120 .dev = {
121 .platform_data = &pxa_udc_info,
122 .dma_mask = &udc_dma_mask,
123 }
124 };
125
126 struct platform_device pxa27x_device_udc = {
127 .name = "pxa27x-udc",
128 .id = -1,
129 .resource = pxa2xx_udc_resources,
130 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
131 .dev = {
132 .platform_data = &pxa_udc_info,
133 .dma_mask = &udc_dma_mask,
134 }
135 };
136
137 static struct resource pxafb_resources[] = {
138 [0] = {
139 .start = 0x44000000,
140 .end = 0x4400ffff,
141 .flags = IORESOURCE_MEM,
142 },
143 [1] = {
144 .start = IRQ_LCD,
145 .end = IRQ_LCD,
146 .flags = IORESOURCE_IRQ,
147 },
148 };
149
150 static u64 fb_dma_mask = ~(u64)0;
151
152 struct platform_device pxa_device_fb = {
153 .name = "pxa2xx-fb",
154 .id = -1,
155 .dev = {
156 .dma_mask = &fb_dma_mask,
157 .coherent_dma_mask = 0xffffffff,
158 },
159 .num_resources = ARRAY_SIZE(pxafb_resources),
160 .resource = pxafb_resources,
161 };
162
163 void __init set_pxa_fb_info(struct pxafb_mach_info *info)
164 {
165 pxa_register_device(&pxa_device_fb, info);
166 }
167
168 void __init set_pxa_fb_parent(struct device *parent_dev)
169 {
170 pxa_device_fb.dev.parent = parent_dev;
171 }
172
173 static struct resource pxa_resource_ffuart[] = {
174 {
175 .start = 0x40100000,
176 .end = 0x40100023,
177 .flags = IORESOURCE_MEM,
178 }, {
179 .start = IRQ_FFUART,
180 .end = IRQ_FFUART,
181 .flags = IORESOURCE_IRQ,
182 }
183 };
184
185 struct platform_device pxa_device_ffuart = {
186 .name = "pxa2xx-uart",
187 .id = 0,
188 .resource = pxa_resource_ffuart,
189 .num_resources = ARRAY_SIZE(pxa_resource_ffuart),
190 };
191
192 void __init pxa_set_ffuart_info(void *info)
193 {
194 pxa_register_device(&pxa_device_ffuart, info);
195 }
196
197 static struct resource pxa_resource_btuart[] = {
198 {
199 .start = 0x40200000,
200 .end = 0x40200023,
201 .flags = IORESOURCE_MEM,
202 }, {
203 .start = IRQ_BTUART,
204 .end = IRQ_BTUART,
205 .flags = IORESOURCE_IRQ,
206 }
207 };
208
209 struct platform_device pxa_device_btuart = {
210 .name = "pxa2xx-uart",
211 .id = 1,
212 .resource = pxa_resource_btuart,
213 .num_resources = ARRAY_SIZE(pxa_resource_btuart),
214 };
215
216 void __init pxa_set_btuart_info(void *info)
217 {
218 pxa_register_device(&pxa_device_btuart, info);
219 }
220
221 static struct resource pxa_resource_stuart[] = {
222 {
223 .start = 0x40700000,
224 .end = 0x40700023,
225 .flags = IORESOURCE_MEM,
226 }, {
227 .start = IRQ_STUART,
228 .end = IRQ_STUART,
229 .flags = IORESOURCE_IRQ,
230 }
231 };
232
233 struct platform_device pxa_device_stuart = {
234 .name = "pxa2xx-uart",
235 .id = 2,
236 .resource = pxa_resource_stuart,
237 .num_resources = ARRAY_SIZE(pxa_resource_stuart),
238 };
239
240 void __init pxa_set_stuart_info(void *info)
241 {
242 pxa_register_device(&pxa_device_stuart, info);
243 }
244
245 static struct resource pxa_resource_hwuart[] = {
246 {
247 .start = 0x41600000,
248 .end = 0x4160002F,
249 .flags = IORESOURCE_MEM,
250 }, {
251 .start = IRQ_HWUART,
252 .end = IRQ_HWUART,
253 .flags = IORESOURCE_IRQ,
254 }
255 };
256
257 struct platform_device pxa_device_hwuart = {
258 .name = "pxa2xx-uart",
259 .id = 3,
260 .resource = pxa_resource_hwuart,
261 .num_resources = ARRAY_SIZE(pxa_resource_hwuart),
262 };
263
264 void __init pxa_set_hwuart_info(void *info)
265 {
266 if (cpu_is_pxa255())
267 pxa_register_device(&pxa_device_hwuart, info);
268 else
269 pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
270 }
271
272 static struct resource pxai2c_resources[] = {
273 {
274 .start = 0x40301680,
275 .end = 0x403016a3,
276 .flags = IORESOURCE_MEM,
277 }, {
278 .start = IRQ_I2C,
279 .end = IRQ_I2C,
280 .flags = IORESOURCE_IRQ,
281 },
282 };
283
284 struct platform_device pxa_device_i2c = {
285 .name = "pxa2xx-i2c",
286 .id = 0,
287 .resource = pxai2c_resources,
288 .num_resources = ARRAY_SIZE(pxai2c_resources),
289 };
290
291 void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
292 {
293 pxa_register_device(&pxa_device_i2c, info);
294 }
295
296 #ifdef CONFIG_PXA27x
297 static struct resource pxa27x_resources_i2c_power[] = {
298 {
299 .start = 0x40f00180,
300 .end = 0x40f001a3,
301 .flags = IORESOURCE_MEM,
302 }, {
303 .start = IRQ_PWRI2C,
304 .end = IRQ_PWRI2C,
305 .flags = IORESOURCE_IRQ,
306 },
307 };
308
309 struct platform_device pxa27x_device_i2c_power = {
310 .name = "pxa2xx-i2c",
311 .id = 1,
312 .resource = pxa27x_resources_i2c_power,
313 .num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power),
314 };
315 #endif
316
317 #ifdef CONFIG_PXA3xx
318 static struct resource pxa3xx_resources_i2c_power[] = {
319 {
320 .start = 0x40f500c0,
321 .end = 0x40f500d3,
322 .flags = IORESOURCE_MEM,
323 }, {
324 .start = IRQ_PWRI2C,
325 .end = IRQ_PWRI2C,
326 .flags = IORESOURCE_IRQ,
327 },
328 };
329
330 struct platform_device pxa3xx_device_i2c_power = {
331 .name = "pxa3xx-pwri2c",
332 .id = 1,
333 .resource = pxa3xx_resources_i2c_power,
334 .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power),
335 };
336 #endif
337
338 static struct resource pxai2s_resources[] = {
339 {
340 .start = 0x40400000,
341 .end = 0x40400083,
342 .flags = IORESOURCE_MEM,
343 }, {
344 .start = IRQ_I2S,
345 .end = IRQ_I2S,
346 .flags = IORESOURCE_IRQ,
347 },
348 };
349
350 struct platform_device pxa_device_i2s = {
351 .name = "pxa2xx-i2s",
352 .id = -1,
353 .resource = pxai2s_resources,
354 .num_resources = ARRAY_SIZE(pxai2s_resources),
355 };
356
357 static u64 pxaficp_dmamask = ~(u32)0;
358
359 struct platform_device pxa_device_ficp = {
360 .name = "pxa2xx-ir",
361 .id = -1,
362 .dev = {
363 .dma_mask = &pxaficp_dmamask,
364 .coherent_dma_mask = 0xffffffff,
365 },
366 };
367
368 void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
369 {
370 pxa_register_device(&pxa_device_ficp, info);
371 }
372
373 static struct resource pxa_rtc_resources[] = {
374 [0] = {
375 .start = 0x40900000,
376 .end = 0x40900000 + 0x3b,
377 .flags = IORESOURCE_MEM,
378 },
379 [1] = {
380 .start = IRQ_RTC1Hz,
381 .end = IRQ_RTC1Hz,
382 .flags = IORESOURCE_IRQ,
383 },
384 [2] = {
385 .start = IRQ_RTCAlrm,
386 .end = IRQ_RTCAlrm,
387 .flags = IORESOURCE_IRQ,
388 },
389 };
390
391 struct platform_device sa1100_device_rtc = {
392 .name = "sa1100-rtc",
393 .id = -1,
394 };
395
396 struct platform_device pxa_device_rtc = {
397 .name = "pxa-rtc",
398 .id = -1,
399 .num_resources = ARRAY_SIZE(pxa_rtc_resources),
400 .resource = pxa_rtc_resources,
401 };
402
403 static struct resource pxa_ac97_resources[] = {
404 [0] = {
405 .start = 0x40500000,
406 .end = 0x40500000 + 0xfff,
407 .flags = IORESOURCE_MEM,
408 },
409 [1] = {
410 .start = IRQ_AC97,
411 .end = IRQ_AC97,
412 .flags = IORESOURCE_IRQ,
413 },
414 };
415
416 static u64 pxa_ac97_dmamask = 0xffffffffUL;
417
418 struct platform_device pxa_device_ac97 = {
419 .name = "pxa2xx-ac97",
420 .id = -1,
421 .dev = {
422 .dma_mask = &pxa_ac97_dmamask,
423 .coherent_dma_mask = 0xffffffff,
424 },
425 .num_resources = ARRAY_SIZE(pxa_ac97_resources),
426 .resource = pxa_ac97_resources,
427 };
428
429 void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
430 {
431 pxa_register_device(&pxa_device_ac97, ops);
432 }
433
434 #ifdef CONFIG_PXA25x
435
436 static struct resource pxa25x_resource_pwm0[] = {
437 [0] = {
438 .start = 0x40b00000,
439 .end = 0x40b0000f,
440 .flags = IORESOURCE_MEM,
441 },
442 };
443
444 struct platform_device pxa25x_device_pwm0 = {
445 .name = "pxa25x-pwm",
446 .id = 0,
447 .resource = pxa25x_resource_pwm0,
448 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
449 };
450
451 static struct resource pxa25x_resource_pwm1[] = {
452 [0] = {
453 .start = 0x40c00000,
454 .end = 0x40c0000f,
455 .flags = IORESOURCE_MEM,
456 },
457 };
458
459 struct platform_device pxa25x_device_pwm1 = {
460 .name = "pxa25x-pwm",
461 .id = 1,
462 .resource = pxa25x_resource_pwm1,
463 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
464 };
465
466 static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
467
468 static struct resource pxa25x_resource_ssp[] = {
469 [0] = {
470 .start = 0x41000000,
471 .end = 0x4100001f,
472 .flags = IORESOURCE_MEM,
473 },
474 [1] = {
475 .start = IRQ_SSP,
476 .end = IRQ_SSP,
477 .flags = IORESOURCE_IRQ,
478 },
479 [2] = {
480 /* DRCMR for RX */
481 .start = 13,
482 .end = 13,
483 .flags = IORESOURCE_DMA,
484 },
485 [3] = {
486 /* DRCMR for TX */
487 .start = 14,
488 .end = 14,
489 .flags = IORESOURCE_DMA,
490 },
491 };
492
493 struct platform_device pxa25x_device_ssp = {
494 .name = "pxa25x-ssp",
495 .id = 0,
496 .dev = {
497 .dma_mask = &pxa25x_ssp_dma_mask,
498 .coherent_dma_mask = DMA_BIT_MASK(32),
499 },
500 .resource = pxa25x_resource_ssp,
501 .num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
502 };
503
504 static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
505
506 static struct resource pxa25x_resource_nssp[] = {
507 [0] = {
508 .start = 0x41400000,
509 .end = 0x4140002f,
510 .flags = IORESOURCE_MEM,
511 },
512 [1] = {
513 .start = IRQ_NSSP,
514 .end = IRQ_NSSP,
515 .flags = IORESOURCE_IRQ,
516 },
517 [2] = {
518 /* DRCMR for RX */
519 .start = 15,
520 .end = 15,
521 .flags = IORESOURCE_DMA,
522 },
523 [3] = {
524 /* DRCMR for TX */
525 .start = 16,
526 .end = 16,
527 .flags = IORESOURCE_DMA,
528 },
529 };
530
531 struct platform_device pxa25x_device_nssp = {
532 .name = "pxa25x-nssp",
533 .id = 1,
534 .dev = {
535 .dma_mask = &pxa25x_nssp_dma_mask,
536 .coherent_dma_mask = DMA_BIT_MASK(32),
537 },
538 .resource = pxa25x_resource_nssp,
539 .num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
540 };
541
542 static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
543
544 static struct resource pxa25x_resource_assp[] = {
545 [0] = {
546 .start = 0x41500000,
547 .end = 0x4150002f,
548 .flags = IORESOURCE_MEM,
549 },
550 [1] = {
551 .start = IRQ_ASSP,
552 .end = IRQ_ASSP,
553 .flags = IORESOURCE_IRQ,
554 },
555 [2] = {
556 /* DRCMR for RX */
557 .start = 23,
558 .end = 23,
559 .flags = IORESOURCE_DMA,
560 },
561 [3] = {
562 /* DRCMR for TX */
563 .start = 24,
564 .end = 24,
565 .flags = IORESOURCE_DMA,
566 },
567 };
568
569 struct platform_device pxa25x_device_assp = {
570 /* ASSP is basically equivalent to NSSP */
571 .name = "pxa25x-nssp",
572 .id = 2,
573 .dev = {
574 .dma_mask = &pxa25x_assp_dma_mask,
575 .coherent_dma_mask = DMA_BIT_MASK(32),
576 },
577 .resource = pxa25x_resource_assp,
578 .num_resources = ARRAY_SIZE(pxa25x_resource_assp),
579 };
580 #endif /* CONFIG_PXA25x */
581
582 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
583
584 static struct resource pxa27x_resource_keypad[] = {
585 [0] = {
586 .start = 0x41500000,
587 .end = 0x4150004c,
588 .flags = IORESOURCE_MEM,
589 },
590 [1] = {
591 .start = IRQ_KEYPAD,
592 .end = IRQ_KEYPAD,
593 .flags = IORESOURCE_IRQ,
594 },
595 };
596
597 struct platform_device pxa27x_device_keypad = {
598 .name = "pxa27x-keypad",
599 .id = -1,
600 .resource = pxa27x_resource_keypad,
601 .num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
602 };
603
604 void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
605 {
606 pxa_register_device(&pxa27x_device_keypad, info);
607 }
608
609 static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
610
611 static struct resource pxa27x_resource_ohci[] = {
612 [0] = {
613 .start = 0x4C000000,
614 .end = 0x4C00ff6f,
615 .flags = IORESOURCE_MEM,
616 },
617 [1] = {
618 .start = IRQ_USBH1,
619 .end = IRQ_USBH1,
620 .flags = IORESOURCE_IRQ,
621 },
622 };
623
624 struct platform_device pxa27x_device_ohci = {
625 .name = "pxa27x-ohci",
626 .id = -1,
627 .dev = {
628 .dma_mask = &pxa27x_ohci_dma_mask,
629 .coherent_dma_mask = DMA_BIT_MASK(32),
630 },
631 .num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
632 .resource = pxa27x_resource_ohci,
633 };
634
635 void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
636 {
637 pxa_register_device(&pxa27x_device_ohci, info);
638 }
639
640 static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
641
642 static struct resource pxa27x_resource_ssp1[] = {
643 [0] = {
644 .start = 0x41000000,
645 .end = 0x4100003f,
646 .flags = IORESOURCE_MEM,
647 },
648 [1] = {
649 .start = IRQ_SSP,
650 .end = IRQ_SSP,
651 .flags = IORESOURCE_IRQ,
652 },
653 [2] = {
654 /* DRCMR for RX */
655 .start = 13,
656 .end = 13,
657 .flags = IORESOURCE_DMA,
658 },
659 [3] = {
660 /* DRCMR for TX */
661 .start = 14,
662 .end = 14,
663 .flags = IORESOURCE_DMA,
664 },
665 };
666
667 struct platform_device pxa27x_device_ssp1 = {
668 .name = "pxa27x-ssp",
669 .id = 0,
670 .dev = {
671 .dma_mask = &pxa27x_ssp1_dma_mask,
672 .coherent_dma_mask = DMA_BIT_MASK(32),
673 },
674 .resource = pxa27x_resource_ssp1,
675 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
676 };
677
678 static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
679
680 static struct resource pxa27x_resource_ssp2[] = {
681 [0] = {
682 .start = 0x41700000,
683 .end = 0x4170003f,
684 .flags = IORESOURCE_MEM,
685 },
686 [1] = {
687 .start = IRQ_SSP2,
688 .end = IRQ_SSP2,
689 .flags = IORESOURCE_IRQ,
690 },
691 [2] = {
692 /* DRCMR for RX */
693 .start = 15,
694 .end = 15,
695 .flags = IORESOURCE_DMA,
696 },
697 [3] = {
698 /* DRCMR for TX */
699 .start = 16,
700 .end = 16,
701 .flags = IORESOURCE_DMA,
702 },
703 };
704
705 struct platform_device pxa27x_device_ssp2 = {
706 .name = "pxa27x-ssp",
707 .id = 1,
708 .dev = {
709 .dma_mask = &pxa27x_ssp2_dma_mask,
710 .coherent_dma_mask = DMA_BIT_MASK(32),
711 },
712 .resource = pxa27x_resource_ssp2,
713 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
714 };
715
716 static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
717
718 static struct resource pxa27x_resource_ssp3[] = {
719 [0] = {
720 .start = 0x41900000,
721 .end = 0x4190003f,
722 .flags = IORESOURCE_MEM,
723 },
724 [1] = {
725 .start = IRQ_SSP3,
726 .end = IRQ_SSP3,
727 .flags = IORESOURCE_IRQ,
728 },
729 [2] = {
730 /* DRCMR for RX */
731 .start = 66,
732 .end = 66,
733 .flags = IORESOURCE_DMA,
734 },
735 [3] = {
736 /* DRCMR for TX */
737 .start = 67,
738 .end = 67,
739 .flags = IORESOURCE_DMA,
740 },
741 };
742
743 struct platform_device pxa27x_device_ssp3 = {
744 .name = "pxa27x-ssp",
745 .id = 2,
746 .dev = {
747 .dma_mask = &pxa27x_ssp3_dma_mask,
748 .coherent_dma_mask = DMA_BIT_MASK(32),
749 },
750 .resource = pxa27x_resource_ssp3,
751 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
752 };
753
754 static struct resource pxa27x_resource_pwm0[] = {
755 [0] = {
756 .start = 0x40b00000,
757 .end = 0x40b0001f,
758 .flags = IORESOURCE_MEM,
759 },
760 };
761
762 struct platform_device pxa27x_device_pwm0 = {
763 .name = "pxa27x-pwm",
764 .id = 0,
765 .resource = pxa27x_resource_pwm0,
766 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
767 };
768
769 static struct resource pxa27x_resource_pwm1[] = {
770 [0] = {
771 .start = 0x40c00000,
772 .end = 0x40c0001f,
773 .flags = IORESOURCE_MEM,
774 },
775 };
776
777 struct platform_device pxa27x_device_pwm1 = {
778 .name = "pxa27x-pwm",
779 .id = 1,
780 .resource = pxa27x_resource_pwm1,
781 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
782 };
783
784 static struct resource pxa27x_resource_camera[] = {
785 [0] = {
786 .start = 0x50000000,
787 .end = 0x50000fff,
788 .flags = IORESOURCE_MEM,
789 },
790 [1] = {
791 .start = IRQ_CAMERA,
792 .end = IRQ_CAMERA,
793 .flags = IORESOURCE_IRQ,
794 },
795 };
796
797 static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
798
799 static struct platform_device pxa27x_device_camera = {
800 .name = "pxa27x-camera",
801 .id = 0, /* This is used to put cameras on this interface */
802 .dev = {
803 .dma_mask = &pxa27x_dma_mask_camera,
804 .coherent_dma_mask = 0xffffffff,
805 },
806 .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
807 .resource = pxa27x_resource_camera,
808 };
809
810 void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
811 {
812 pxa_register_device(&pxa27x_device_camera, info);
813 }
814 #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
815
816 #ifdef CONFIG_PXA3xx
817 static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
818
819 static struct resource pxa3xx_resource_ssp4[] = {
820 [0] = {
821 .start = 0x41a00000,
822 .end = 0x41a0003f,
823 .flags = IORESOURCE_MEM,
824 },
825 [1] = {
826 .start = IRQ_SSP4,
827 .end = IRQ_SSP4,
828 .flags = IORESOURCE_IRQ,
829 },
830 [2] = {
831 /* DRCMR for RX */
832 .start = 2,
833 .end = 2,
834 .flags = IORESOURCE_DMA,
835 },
836 [3] = {
837 /* DRCMR for TX */
838 .start = 3,
839 .end = 3,
840 .flags = IORESOURCE_DMA,
841 },
842 };
843
844 struct platform_device pxa3xx_device_ssp4 = {
845 /* PXA3xx SSP is basically equivalent to PXA27x */
846 .name = "pxa27x-ssp",
847 .id = 3,
848 .dev = {
849 .dma_mask = &pxa3xx_ssp4_dma_mask,
850 .coherent_dma_mask = DMA_BIT_MASK(32),
851 },
852 .resource = pxa3xx_resource_ssp4,
853 .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
854 };
855
856 static struct resource pxa3xx_resources_mci2[] = {
857 [0] = {
858 .start = 0x42000000,
859 .end = 0x42000fff,
860 .flags = IORESOURCE_MEM,
861 },
862 [1] = {
863 .start = IRQ_MMC2,
864 .end = IRQ_MMC2,
865 .flags = IORESOURCE_IRQ,
866 },
867 [2] = {
868 .start = 93,
869 .end = 93,
870 .flags = IORESOURCE_DMA,
871 },
872 [3] = {
873 .start = 94,
874 .end = 94,
875 .flags = IORESOURCE_DMA,
876 },
877 };
878
879 struct platform_device pxa3xx_device_mci2 = {
880 .name = "pxa2xx-mci",
881 .id = 1,
882 .dev = {
883 .dma_mask = &pxamci_dmamask,
884 .coherent_dma_mask = 0xffffffff,
885 },
886 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
887 .resource = pxa3xx_resources_mci2,
888 };
889
890 void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
891 {
892 pxa_register_device(&pxa3xx_device_mci2, info);
893 }
894
895 static struct resource pxa3xx_resources_mci3[] = {
896 [0] = {
897 .start = 0x42500000,
898 .end = 0x42500fff,
899 .flags = IORESOURCE_MEM,
900 },
901 [1] = {
902 .start = IRQ_MMC3,
903 .end = IRQ_MMC3,
904 .flags = IORESOURCE_IRQ,
905 },
906 [2] = {
907 .start = 100,
908 .end = 100,
909 .flags = IORESOURCE_DMA,
910 },
911 [3] = {
912 .start = 101,
913 .end = 101,
914 .flags = IORESOURCE_DMA,
915 },
916 };
917
918 struct platform_device pxa3xx_device_mci3 = {
919 .name = "pxa2xx-mci",
920 .id = 2,
921 .dev = {
922 .dma_mask = &pxamci_dmamask,
923 .coherent_dma_mask = 0xffffffff,
924 },
925 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
926 .resource = pxa3xx_resources_mci3,
927 };
928
929 void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
930 {
931 pxa_register_device(&pxa3xx_device_mci3, info);
932 }
933
934 static struct resource pxa3xx_resources_nand[] = {
935 [0] = {
936 .start = 0x43100000,
937 .end = 0x43100053,
938 .flags = IORESOURCE_MEM,
939 },
940 [1] = {
941 .start = IRQ_NAND,
942 .end = IRQ_NAND,
943 .flags = IORESOURCE_IRQ,
944 },
945 [2] = {
946 /* DRCMR for Data DMA */
947 .start = 97,
948 .end = 97,
949 .flags = IORESOURCE_DMA,
950 },
951 [3] = {
952 /* DRCMR for Command DMA */
953 .start = 99,
954 .end = 99,
955 .flags = IORESOURCE_DMA,
956 },
957 };
958
959 static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
960
961 struct platform_device pxa3xx_device_nand = {
962 .name = "pxa3xx-nand",
963 .id = -1,
964 .dev = {
965 .dma_mask = &pxa3xx_nand_dma_mask,
966 .coherent_dma_mask = DMA_BIT_MASK(32),
967 },
968 .num_resources = ARRAY_SIZE(pxa3xx_resources_nand),
969 .resource = pxa3xx_resources_nand,
970 };
971
972 void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
973 {
974 pxa_register_device(&pxa3xx_device_nand, info);
975 }
976
977 static struct resource pxa3xx_resources_gcu[] = {
978 {
979 .start = 0x54000000,
980 .end = 0x54000fff,
981 .flags = IORESOURCE_MEM,
982 },
983 {
984 .start = IRQ_GCU,
985 .end = IRQ_GCU,
986 .flags = IORESOURCE_IRQ,
987 },
988 };
989
990 static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
991
992 struct platform_device pxa3xx_device_gcu = {
993 .name = "pxa3xx-gcu",
994 .id = -1,
995 .num_resources = ARRAY_SIZE(pxa3xx_resources_gcu),
996 .resource = pxa3xx_resources_gcu,
997 .dev = {
998 .dma_mask = &pxa3xx_gcu_dmamask,
999 .coherent_dma_mask = 0xffffffff,
1000 },
1001 };
1002
1003 #endif /* CONFIG_PXA3xx */
1004
1005 /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1006 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
1007 void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
1008 {
1009 struct platform_device *pd;
1010
1011 pd = platform_device_alloc("pxa2xx-spi", id);
1012 if (pd == NULL) {
1013 printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
1014 id);
1015 return;
1016 }
1017
1018 pd->dev.platform_data = info;
1019 platform_device_add(pd);
1020 }
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