arch/arm/mach-pxa/em-x270.c

   1 /*
   2  * Support for CompuLab EM-x270 platform
   3  *
   4  * Copyright (C) 2007 CompuLab, Ltd.
   5  * Author: Mike Rapoport <mike@compulab.co.il>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/irq.h>
  13 #include <linux/platform_device.h>
  14
  15 #include <linux/dm9000.h>
  16 #include <linux/rtc-v3020.h>
  17
  18 #include <linux/mtd/nand.h>
  19 #include <linux/mtd/partitions.h>
  20
  21 #include <asm/mach-types.h>
  22
  23 #include <asm/mach/arch.h>
  24
  25 #include <asm/arch/pxa-regs.h>
  26 #include <asm/arch/pxa2xx-gpio.h>
  27 #include <asm/arch/pxa27x-udc.h>
  28 #include <asm/arch/audio.h>
  29 #include <asm/arch/pxafb.h>
  30 #include <asm/arch/ohci.h>
  31 #include <asm/arch/mmc.h>
  32 #include <asm/arch/bitfield.h>
  33
  34 #include "generic.h"
  35
  36 /* GPIO IRQ usage */
  37 #define EM_X270_MMC_PD          (105)
  38 #define EM_X270_ETHIRQ          IRQ_GPIO(41)
  39 #define EM_X270_MMC_IRQ         IRQ_GPIO(13)
  40
  41 static struct resource em_x270_dm9k_resource[] = {
  42         [0] = {
  43                 .start = PXA_CS2_PHYS,
  44                 .end   = PXA_CS2_PHYS + 3,
  45                 .flags = IORESOURCE_MEM,
  46         },
  47         [1] = {
  48                 .start = PXA_CS2_PHYS + 8,
  49                 .end   = PXA_CS2_PHYS + 8 + 0x3f,
  50                 .flags = IORESOURCE_MEM,
  51         },
  52         [2] = {
  53                 .start = EM_X270_ETHIRQ,
  54                 .end   = EM_X270_ETHIRQ,
  55                 .flags = IORESOURCE_IRQ,
  56         }
  57 };
  58
  59 /* for the moment we limit ourselves to 32bit IO until some
  60  * better IO routines can be written and tested
  61  */
  62 static struct dm9000_plat_data em_x270_dm9k_platdata = {
  63         .flags          = DM9000_PLATF_32BITONLY,
  64 };
  65
  66 /* Ethernet device */
  67 static struct platform_device em_x270_dm9k = {
  68         .name           = "dm9000",
  69         .id             = 0,
  70         .num_resources  = ARRAY_SIZE(em_x270_dm9k_resource),
  71         .resource       = em_x270_dm9k_resource,
  72         .dev            = {
  73                 .platform_data = &em_x270_dm9k_platdata,
  74         }
  75 };
  76
  77 /* WM9712 touchscreen controller. Hopefully the driver will make it to
  78  * the mainstream sometime */
  79 static struct platform_device em_x270_ts = {
  80         .name           = "wm97xx-ts",
  81         .id             = -1,
  82 };
  83
  84 /* RTC */
  85 static struct resource em_x270_v3020_resource[] = {
  86         [0] = {
  87                 .start = PXA_CS4_PHYS,
  88                 .end   = PXA_CS4_PHYS + 3,
  89                 .flags = IORESOURCE_MEM,
  90         },
  91 };
  92
  93 static struct v3020_platform_data em_x270_v3020_platdata = {
  94         .leftshift = 0,
  95 };
  96
  97 static struct platform_device em_x270_rtc = {
  98         .name           = "v3020",
  99         .num_resources  = ARRAY_SIZE(em_x270_v3020_resource),
 100         .resource       = em_x270_v3020_resource,
 101         .id             = -1,
 102         .dev            = {
 103                 .platform_data = &em_x270_v3020_platdata,
 104         }
 105 };
 106
 107 /* NAND flash */
 108 #define GPIO_NAND_CS    (11)
 109 #define GPIO_NAND_RB    (56)
 110
 111 static inline void nand_cs_on(void)
 112 {
 113         GPCR(GPIO_NAND_CS) = GPIO_bit(GPIO_NAND_CS);
 114 }
 115
 116 static void nand_cs_off(void)
 117 {
 118         dsb();
 119
 120         GPSR(GPIO_NAND_CS) = GPIO_bit(GPIO_NAND_CS);
 121 }
 122
 123 /* hardware specific access to control-lines */
 124 static void em_x270_nand_cmd_ctl(struct mtd_info *mtd, int dat,
 125                                  unsigned int ctrl)
 126 {
 127         struct nand_chip *this = mtd->priv;
 128         unsigned long nandaddr = (unsigned long)this->IO_ADDR_W;
 129
 130         dsb();
 131
 132         if (ctrl & NAND_CTRL_CHANGE) {
 133                 if (ctrl & NAND_ALE)
 134                         nandaddr |=  (1 << 3);
 135                 else
 136                         nandaddr &= ~(1 << 3);
 137                 if (ctrl & NAND_CLE)
 138                         nandaddr |=  (1 << 2);
 139                 else
 140                         nandaddr &= ~(1 << 2);
 141                 if (ctrl & NAND_NCE)
 142                         nand_cs_on();
 143                 else
 144                         nand_cs_off();
 145         }
 146
 147         dsb();
 148         this->IO_ADDR_W = (void __iomem *)nandaddr;
 149         if (dat != NAND_CMD_NONE)
 150                 writel(dat, this->IO_ADDR_W);
 151
 152         dsb();
 153 }
 154
 155 /* read device ready pin */
 156 static int em_x270_nand_device_ready(struct mtd_info *mtd)
 157 {
 158         dsb();
 159
 160         return GPLR(GPIO_NAND_RB) & GPIO_bit(GPIO_NAND_RB);
 161 }
 162
 163 static struct mtd_partition em_x270_partition_info[] = {
 164         [0] = {
 165                 .name   = "em_x270-0",
 166                 .offset = 0,
 167                 .size   = SZ_4M,
 168         },
 169         [1] = {
 170                 .name   = "em_x270-1",
 171                 .offset = MTDPART_OFS_APPEND,
 172                 .size   = MTDPART_SIZ_FULL
 173         },
 174 };
 175
 176 static const char *em_x270_part_probes[] = { "cmdlinepart", NULL };
 177
 178 struct platform_nand_data em_x270_nand_platdata = {
 179         .chip = {
 180                 .nr_chips = 1,
 181                 .chip_offset = 0,
 182                 .nr_partitions = ARRAY_SIZE(em_x270_partition_info),
 183                 .partitions = em_x270_partition_info,
 184                 .chip_delay = 20,
 185                 .part_probe_types = em_x270_part_probes,
 186         },
 187         .ctrl = {
 188                 .hwcontrol = 0,
 189                 .dev_ready = em_x270_nand_device_ready,
 190                 .select_chip = 0,
 191                 .cmd_ctrl = em_x270_nand_cmd_ctl,
 192         },
 193 };
 194
 195 static struct resource em_x270_nand_resource[] = {
 196         [0] = {
 197                 .start = PXA_CS1_PHYS,
 198                 .end   = PXA_CS1_PHYS + 12,
 199                 .flags = IORESOURCE_MEM,
 200         },
 201 };
 202
 203 static struct platform_device em_x270_nand = {
 204         .name           = "gen_nand",
 205         .num_resources  = ARRAY_SIZE(em_x270_nand_resource),
 206         .resource       = em_x270_nand_resource,
 207         .id             = -1,
 208         .dev            = {
 209                 .platform_data = &em_x270_nand_platdata,
 210         }
 211 };
 212
 213 /* platform devices */
 214 static struct platform_device *platform_devices[] __initdata = {
 215         &em_x270_dm9k,
 216         &em_x270_ts,
 217         &em_x270_rtc,
 218         &em_x270_nand,
 219 };
 220
 221
 222 /* PXA27x OHCI controller setup */
 223 static int em_x270_ohci_init(struct device *dev)
 224 {
 225         /* Set the Power Control Polarity Low */
 226         UHCHR = (UHCHR | UHCHR_PCPL) &
 227                 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE);
 228
 229         /* enable port 2 transiever */
 230         UP2OCR = UP2OCR_HXS | UP2OCR_HXOE;
 231
 232         return 0;
 233 }
 234
 235 static struct pxaohci_platform_data em_x270_ohci_platform_data = {
 236         .port_mode      = PMM_PERPORT_MODE,
 237         .init           = em_x270_ohci_init,
 238 };
 239
 240
 241 static int em_x270_mci_init(struct device *dev,
 242                             irq_handler_t em_x270_detect_int,
 243                             void *data)
 244 {
 245         int err;
 246
 247         /* setup GPIO for PXA27x MMC controller */
 248         pxa_gpio_mode(GPIO32_MMCCLK_MD);
 249         pxa_gpio_mode(GPIO112_MMCCMD_MD);
 250         pxa_gpio_mode(GPIO92_MMCDAT0_MD);
 251         pxa_gpio_mode(GPIO109_MMCDAT1_MD);
 252         pxa_gpio_mode(GPIO110_MMCDAT2_MD);
 253         pxa_gpio_mode(GPIO111_MMCDAT3_MD);
 254
 255         /* EM-X270 uses GPIO13 as SD power enable */
 256         pxa_gpio_mode(EM_X270_MMC_PD | GPIO_OUT);
 257
 258         err = request_irq(EM_X270_MMC_IRQ, em_x270_detect_int,
 259                           IRQF_DISABLED | IRQF_TRIGGER_FALLING,
 260                           "MMC card detect", data);
 261         if (err) {
 262                 printk(KERN_ERR "%s: can't request MMC card detect IRQ: %d\n",
 263                        __func__, err);
 264                 return err;
 265         }
 266
 267         return 0;
 268 }
 269
 270 static void em_x270_mci_setpower(struct device *dev, unsigned int vdd)
 271 {
 272         /*
 273            FIXME: current hardware implementation does not allow to
 274            enable/disable MMC power. This will be fixed in next HW releases,
 275            and we'll need to add implmentation here.
 276         */
 277         return;
 278 }
 279
 280 static void em_x270_mci_exit(struct device *dev, void *data)
 281 {
 282         free_irq(EM_X270_MMC_IRQ, data);
 283 }
 284
 285 static struct pxamci_platform_data em_x270_mci_platform_data = {
 286         .ocr_mask       = MMC_VDD_28_29|MMC_VDD_29_30|MMC_VDD_30_31,
 287         .init           = em_x270_mci_init,
 288         .setpower       = em_x270_mci_setpower,
 289         .exit           = em_x270_mci_exit,
 290 };
 291
 292 /* LCD 480x640 */
 293 static struct pxafb_mode_info em_x270_lcd_mode = {
 294         .pixclock       = 50000,
 295         .bpp            = 16,
 296         .xres           = 480,
 297         .yres           = 640,
 298         .hsync_len      = 8,
 299         .vsync_len      = 2,
 300         .left_margin    = 8,
 301         .upper_margin   = 0,
 302         .right_margin   = 24,
 303         .lower_margin   = 4,
 304         .cmap_greyscale = 0,
 305 };
 306
 307 static struct pxafb_mach_info em_x270_lcd = {
 308         .modes          = &em_x270_lcd_mode,
 309         .num_modes      = 1,
 310         .cmap_inverse   = 0,
 311         .cmap_static    = 0,
 312         .lccr0          = LCCR0_PAS,
 313         .lccr3          = LCCR3_PixClkDiv(0x01) | LCCR3_Acb(0xff),
 314 };
 315
 316 static void __init em_x270_init(void)
 317 {
 318         /* setup LCD */
 319         set_pxa_fb_info(&em_x270_lcd);
 320
 321         /* register EM-X270 platform devices */
 322         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 323         pxa_set_ac97_info(NULL);
 324
 325         /* set MCI and OHCI platform parameters */
 326         pxa_set_mci_info(&em_x270_mci_platform_data);
 327         pxa_set_ohci_info(&em_x270_ohci_platform_data);
 328
 329         /* setup STUART GPIOs */
 330         pxa_gpio_mode(GPIO46_STRXD_MD);
 331         pxa_gpio_mode(GPIO47_STTXD_MD);
 332
 333         /* setup BTUART GPIOs */
 334         pxa_gpio_mode(GPIO42_BTRXD_MD);
 335         pxa_gpio_mode(GPIO43_BTTXD_MD);
 336         pxa_gpio_mode(GPIO44_BTCTS_MD);
 337         pxa_gpio_mode(GPIO45_BTRTS_MD);
 338
 339         /* Setup interrupt for dm9000 */
 340         set_irq_type(EM_X270_ETHIRQ, IRQT_RISING);
 341 }
 342
 343 MACHINE_START(EM_X270, "Compulab EM-x270")
 344         .boot_params    = 0xa0000100,
 345         .phys_io        = 0x40000000,
 346         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
 347         .map_io         = pxa_map_io,
 348         .init_irq       = pxa27x_init_irq,
 349         .timer          = &pxa_timer,
 350         .init_machine   = em_x270_init,
 351 MACHINE_END