2 * linux/arch/arm/mach-pxa/lpd270.c
4 * Support for the LogicPD PXA270 Card Engine.
5 * Derived from the mainstone code, which carries these notices:
7 * Author: Nicolas Pitre
8 * Created: Nov 05, 2002
9 * Copyright: MontaVista Software Inc.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/syscore_ops.h>
19 #include <linux/interrupt.h>
20 #include <linux/sched.h>
21 #include <linux/bitops.h>
23 #include <linux/ioport.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/partitions.h>
26 #include <linux/pwm_backlight.h>
28 #include <asm/types.h>
29 #include <asm/setup.h>
30 #include <asm/memory.h>
31 #include <asm/mach-types.h>
32 #include <mach/hardware.h>
34 #include <asm/sizes.h>
36 #include <asm/mach/arch.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/irq.h>
39 #include <asm/mach/flash.h>
41 #include <mach/pxa27x.h>
42 #include <mach/gpio.h>
43 #include <mach/lpd270.h>
44 #include <mach/audio.h>
45 #include <mach/pxafb.h>
47 #include <mach/irda.h>
48 #include <mach/ohci.h>
49 #include <mach/smemc.h>
54 static unsigned long lpd270_pin_config
[] __initdata
= {
56 GPIO15_nCS_1
, /* Mainboard Flash */
57 GPIO78_nCS_2
, /* CPLD + Ethernet */
59 /* LCD - 16bpp Active TFT */
80 GPIO16_PWM0_OUT
, /* Backlight */
88 GPIO29_AC97_SDATA_IN_0
,
89 GPIO30_AC97_SDATA_OUT
,
93 GPIO1_GPIO
| WAKEUP_ON_EDGE_BOTH
,
96 static unsigned int lpd270_irq_enabled
;
98 static void lpd270_mask_irq(struct irq_data
*d
)
100 int lpd270_irq
= d
->irq
- LPD270_IRQ(0);
102 __raw_writew(~(1 << lpd270_irq
), LPD270_INT_STATUS
);
104 lpd270_irq_enabled
&= ~(1 << lpd270_irq
);
105 __raw_writew(lpd270_irq_enabled
, LPD270_INT_MASK
);
108 static void lpd270_unmask_irq(struct irq_data
*d
)
110 int lpd270_irq
= d
->irq
- LPD270_IRQ(0);
112 lpd270_irq_enabled
|= 1 << lpd270_irq
;
113 __raw_writew(lpd270_irq_enabled
, LPD270_INT_MASK
);
116 static struct irq_chip lpd270_irq_chip
= {
118 .irq_ack
= lpd270_mask_irq
,
119 .irq_mask
= lpd270_mask_irq
,
120 .irq_unmask
= lpd270_unmask_irq
,
123 static void lpd270_irq_handler(unsigned int irq
, struct irq_desc
*desc
)
125 unsigned long pending
;
127 pending
= __raw_readw(LPD270_INT_STATUS
) & lpd270_irq_enabled
;
129 /* clear useless edge notification */
130 desc
->irq_data
.chip
->irq_ack(&desc
->irq_data
);
131 if (likely(pending
)) {
132 irq
= LPD270_IRQ(0) + __ffs(pending
);
133 generic_handle_irq(irq
);
135 pending
= __raw_readw(LPD270_INT_STATUS
) &
141 static void __init
lpd270_init_irq(void)
147 __raw_writew(0, LPD270_INT_MASK
);
148 __raw_writew(0, LPD270_INT_STATUS
);
150 /* setup extra LogicPD PXA270 irqs */
151 for (irq
= LPD270_IRQ(2); irq
<= LPD270_IRQ(4); irq
++) {
152 irq_set_chip_and_handler(irq
, &lpd270_irq_chip
,
154 set_irq_flags(irq
, IRQF_VALID
| IRQF_PROBE
);
156 irq_set_chained_handler(IRQ_GPIO(0), lpd270_irq_handler
);
157 irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING
);
162 static void lpd270_irq_resume(void)
164 __raw_writew(lpd270_irq_enabled
, LPD270_INT_MASK
);
167 static struct syscore_ops lpd270_irq_syscore_ops
= {
168 .resume
= lpd270_irq_resume
,
171 static int __init
lpd270_irq_device_init(void)
173 if (machine_is_logicpd_pxa270()) {
174 register_syscore_ops(&lpd270_irq_syscore_ops
);
180 device_initcall(lpd270_irq_device_init
);
184 static struct resource smc91x_resources
[] = {
186 .start
= LPD270_ETH_PHYS
,
187 .end
= (LPD270_ETH_PHYS
+ 0xfffff),
188 .flags
= IORESOURCE_MEM
,
191 .start
= LPD270_ETHERNET_IRQ
,
192 .end
= LPD270_ETHERNET_IRQ
,
193 .flags
= IORESOURCE_IRQ
,
197 static struct platform_device smc91x_device
= {
200 .num_resources
= ARRAY_SIZE(smc91x_resources
),
201 .resource
= smc91x_resources
,
204 static struct resource lpd270_flash_resources
[] = {
206 .start
= PXA_CS0_PHYS
,
207 .end
= PXA_CS0_PHYS
+ SZ_64M
- 1,
208 .flags
= IORESOURCE_MEM
,
211 .start
= PXA_CS1_PHYS
,
212 .end
= PXA_CS1_PHYS
+ SZ_64M
- 1,
213 .flags
= IORESOURCE_MEM
,
217 static struct mtd_partition lpd270_flash0_partitions
[] = {
219 .name
= "Bootloader",
222 .mask_flags
= MTD_WRITEABLE
/* force read-only */
226 .offset
= 0x00040000,
228 .name
= "Filesystem",
229 .size
= MTDPART_SIZ_FULL
,
234 static struct flash_platform_data lpd270_flash_data
[2] = {
236 .name
= "processor-flash",
237 .map_name
= "cfi_probe",
238 .parts
= lpd270_flash0_partitions
,
239 .nr_parts
= ARRAY_SIZE(lpd270_flash0_partitions
),
241 .name
= "mainboard-flash",
242 .map_name
= "cfi_probe",
248 static struct platform_device lpd270_flash_device
[2] = {
250 .name
= "pxa2xx-flash",
253 .platform_data
= &lpd270_flash_data
[0],
255 .resource
= &lpd270_flash_resources
[0],
258 .name
= "pxa2xx-flash",
261 .platform_data
= &lpd270_flash_data
[1],
263 .resource
= &lpd270_flash_resources
[1],
268 static struct platform_pwm_backlight_data lpd270_backlight_data
= {
272 .pwm_period_ns
= 78770,
275 static struct platform_device lpd270_backlight_device
= {
276 .name
= "pwm-backlight",
278 .parent
= &pxa27x_device_pwm0
.dev
,
279 .platform_data
= &lpd270_backlight_data
,
283 /* 5.7" TFT QVGA (LoLo display number 1) */
284 static struct pxafb_mode_info sharp_lq057q3dc02_mode
= {
291 .right_margin
= 0x0a,
293 .upper_margin
= 0x08,
294 .lower_margin
= 0x14,
295 .sync
= FB_SYNC_HOR_HIGH_ACT
| FB_SYNC_VERT_HIGH_ACT
,
298 static struct pxafb_mach_info sharp_lq057q3dc02
= {
299 .modes
= &sharp_lq057q3dc02_mode
,
301 .lcd_conn
= LCD_COLOR_TFT_16BPP
| LCD_PCLK_EDGE_FALL
|
302 LCD_ALTERNATE_MAPPING
,
305 /* 12.1" TFT SVGA (LoLo display number 2) */
306 static struct pxafb_mode_info sharp_lq121s1dg31_mode
= {
313 .right_margin
= 0x05,
315 .upper_margin
= 0x14,
316 .lower_margin
= 0x0a,
317 .sync
= FB_SYNC_HOR_HIGH_ACT
| FB_SYNC_VERT_HIGH_ACT
,
320 static struct pxafb_mach_info sharp_lq121s1dg31
= {
321 .modes
= &sharp_lq121s1dg31_mode
,
323 .lcd_conn
= LCD_COLOR_TFT_16BPP
| LCD_PCLK_EDGE_FALL
|
324 LCD_ALTERNATE_MAPPING
,
327 /* 3.6" TFT QVGA (LoLo display number 3) */
328 static struct pxafb_mode_info sharp_lq036q1da01_mode
= {
335 .right_margin
= 0x0a,
337 .upper_margin
= 0x03,
338 .lower_margin
= 0x03,
339 .sync
= FB_SYNC_HOR_HIGH_ACT
| FB_SYNC_VERT_HIGH_ACT
,
342 static struct pxafb_mach_info sharp_lq036q1da01
= {
343 .modes
= &sharp_lq036q1da01_mode
,
345 .lcd_conn
= LCD_COLOR_TFT_16BPP
| LCD_PCLK_EDGE_FALL
|
346 LCD_ALTERNATE_MAPPING
,
349 /* 6.4" TFT VGA (LoLo display number 5) */
350 static struct pxafb_mode_info sharp_lq64d343_mode
= {
357 .right_margin
= 0x19,
359 .upper_margin
= 0x22,
360 .lower_margin
= 0x00,
361 .sync
= FB_SYNC_HOR_HIGH_ACT
| FB_SYNC_VERT_HIGH_ACT
,
364 static struct pxafb_mach_info sharp_lq64d343
= {
365 .modes
= &sharp_lq64d343_mode
,
367 .lcd_conn
= LCD_COLOR_TFT_16BPP
| LCD_PCLK_EDGE_FALL
|
368 LCD_ALTERNATE_MAPPING
,
371 /* 10.4" TFT VGA (LoLo display number 7) */
372 static struct pxafb_mode_info sharp_lq10d368_mode
= {
379 .right_margin
= 0x19,
381 .upper_margin
= 0x22,
382 .lower_margin
= 0x00,
383 .sync
= FB_SYNC_HOR_HIGH_ACT
| FB_SYNC_VERT_HIGH_ACT
,
386 static struct pxafb_mach_info sharp_lq10d368
= {
387 .modes
= &sharp_lq10d368_mode
,
389 .lcd_conn
= LCD_COLOR_TFT_16BPP
| LCD_PCLK_EDGE_FALL
|
390 LCD_ALTERNATE_MAPPING
,
393 /* 3.5" TFT QVGA (LoLo display number 8) */
394 static struct pxafb_mode_info sharp_lq035q7db02_20_mode
= {
401 .right_margin
= 0x0a,
403 .upper_margin
= 0x05,
404 .lower_margin
= 0x14,
405 .sync
= FB_SYNC_HOR_HIGH_ACT
| FB_SYNC_VERT_HIGH_ACT
,
408 static struct pxafb_mach_info sharp_lq035q7db02_20
= {
409 .modes
= &sharp_lq035q7db02_20_mode
,
411 .lcd_conn
= LCD_COLOR_TFT_16BPP
| LCD_PCLK_EDGE_FALL
|
412 LCD_ALTERNATE_MAPPING
,
415 static struct pxafb_mach_info
*lpd270_lcd_to_use
;
417 static int __init
lpd270_set_lcd(char *str
)
419 if (!strnicmp(str
, "lq057q3dc02", 11)) {
420 lpd270_lcd_to_use
= &sharp_lq057q3dc02
;
421 } else if (!strnicmp(str
, "lq121s1dg31", 11)) {
422 lpd270_lcd_to_use
= &sharp_lq121s1dg31
;
423 } else if (!strnicmp(str
, "lq036q1da01", 11)) {
424 lpd270_lcd_to_use
= &sharp_lq036q1da01
;
425 } else if (!strnicmp(str
, "lq64d343", 8)) {
426 lpd270_lcd_to_use
= &sharp_lq64d343
;
427 } else if (!strnicmp(str
, "lq10d368", 8)) {
428 lpd270_lcd_to_use
= &sharp_lq10d368
;
429 } else if (!strnicmp(str
, "lq035q7db02-20", 14)) {
430 lpd270_lcd_to_use
= &sharp_lq035q7db02_20
;
432 printk(KERN_INFO
"lpd270: unknown lcd panel [%s]\n", str
);
438 __setup("lcd=", lpd270_set_lcd
);
440 static struct platform_device
*platform_devices
[] __initdata
= {
442 &lpd270_backlight_device
,
443 &lpd270_flash_device
[0],
444 &lpd270_flash_device
[1],
447 static struct pxaohci_platform_data lpd270_ohci_platform_data
= {
448 .port_mode
= PMM_PERPORT_MODE
,
449 .flags
= ENABLE_PORT_ALL
| POWER_CONTROL_LOW
| POWER_SENSE_LOW
,
452 static void __init
lpd270_init(void)
454 pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config
));
456 pxa_set_ffuart_info(NULL
);
457 pxa_set_btuart_info(NULL
);
458 pxa_set_stuart_info(NULL
);
460 lpd270_flash_data
[0].width
= (__raw_readl(BOOT_DEF
) & 1) ? 2 : 4;
461 lpd270_flash_data
[1].width
= 4;
464 * System bus arbiter setting:
466 * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
468 ARB_CNTRL
= ARB_CORE_PARK
| 0x234;
470 platform_add_devices(platform_devices
, ARRAY_SIZE(platform_devices
));
472 pxa_set_ac97_info(NULL
);
474 if (lpd270_lcd_to_use
!= NULL
)
475 pxa_set_fb_info(NULL
, lpd270_lcd_to_use
);
477 pxa_set_ohci_info(&lpd270_ohci_platform_data
);
481 static struct map_desc lpd270_io_desc
[] __initdata
= {
483 .virtual = LPD270_CPLD_VIRT
,
484 .pfn
= __phys_to_pfn(LPD270_CPLD_PHYS
),
485 .length
= LPD270_CPLD_SIZE
,
490 static void __init
lpd270_map_io(void)
493 iotable_init(lpd270_io_desc
, ARRAY_SIZE(lpd270_io_desc
));
495 /* for use I SRAM as framebuffer. */
500 MACHINE_START(LOGICPD_PXA270
, "LogicPD PXA270 Card Engine")
501 /* Maintainer: Peter Barada */
502 .boot_params
= 0xa0000100,
503 .map_io
= lpd270_map_io
,
504 .nr_irqs
= LPD270_NR_IRQS
,
505 .init_irq
= lpd270_init_irq
,
507 .init_machine
= lpd270_init
,