arch/arm/mach-pxa/pm.c

   1 /*
   2  * PXA250/210 Power Management Routines
   3  *
   4  * Original code for the SA11x0:
   5  * Copyright (c) 2001 Cliff Brake <cbrake@accelent.com>
   6  *
   7  * Modified for the PXA250 by Nicolas Pitre:
   8  * Copyright (c) 2002 Monta Vista Software, Inc.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License.
  12  */
  13 #include <linux/config.h>
  14 #include <linux/init.h>
  15 #include <linux/suspend.h>
  16 #include <linux/errno.h>
  17 #include <linux/time.h>
  18
  19 #include <asm/hardware.h>
  20 #include <asm/memory.h>
  21 #include <asm/system.h>
  22 #include <asm/arch/pxa-regs.h>
  23 #include <asm/arch/lubbock.h>
  24 #include <asm/mach/time.h>
  25
  26
  27 /*
  28  * Debug macros
  29  */
  30 #undef DEBUG
  31
  32 #define SAVE(x)         sleep_save[SLEEP_SAVE_##x] = x
  33 #define RESTORE(x)      x = sleep_save[SLEEP_SAVE_##x]
  34
  35 #define RESTORE_GPLEVEL(n) do { \
  36         GPSR##n = sleep_save[SLEEP_SAVE_GPLR##n]; \
  37         GPCR##n = ~sleep_save[SLEEP_SAVE_GPLR##n]; \
  38 } while (0)
  39
  40 /*
  41  * List of global PXA peripheral registers to preserve.
  42  * More ones like CP and general purpose register values are preserved
  43  * with the stack pointer in sleep.S.
  44  */
  45 enum {  SLEEP_SAVE_START = 0,
  46
  47         SLEEP_SAVE_GPLR0, SLEEP_SAVE_GPLR1, SLEEP_SAVE_GPLR2, SLEEP_SAVE_GPLR3,
  48         SLEEP_SAVE_GPDR0, SLEEP_SAVE_GPDR1, SLEEP_SAVE_GPDR2, SLEEP_SAVE_GPDR3,
  49         SLEEP_SAVE_GRER0, SLEEP_SAVE_GRER1, SLEEP_SAVE_GRER2, SLEEP_SAVE_GRER3,
  50         SLEEP_SAVE_GFER0, SLEEP_SAVE_GFER1, SLEEP_SAVE_GFER2, SLEEP_SAVE_GFER3,
  51         SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3,
  52
  53         SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
  54         SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
  55         SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U,
  56         SLEEP_SAVE_GAFR3_L, SLEEP_SAVE_GAFR3_U,
  57
  58         SLEEP_SAVE_PSTR,
  59
  60         SLEEP_SAVE_ICMR,
  61         SLEEP_SAVE_CKEN,
  62
  63 #ifdef CONFIG_PXA27x
  64         SLEEP_SAVE_MDREFR,
  65         SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER,
  66         SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR,
  67 #endif
  68
  69         SLEEP_SAVE_CKSUM,
  70
  71         SLEEP_SAVE_SIZE
  72 };
  73
  74
  75 static int pxa_pm_enter(suspend_state_t state)
  76 {
  77         unsigned long sleep_save[SLEEP_SAVE_SIZE];
  78         unsigned long checksum = 0;
  79         struct timespec delta, rtc;
  80         int i;
  81         extern void pxa_cpu_pm_enter(suspend_state_t state);
  82
  83 #ifdef CONFIG_IWMMXT
  84         /* force any iWMMXt context to ram **/
  85         iwmmxt_task_disable(NULL);
  86 #endif
  87
  88         /* preserve current time */
  89         rtc.tv_sec = RCNR;
  90         rtc.tv_nsec = 0;
  91         save_time_delta(&delta, &rtc);
  92
  93         SAVE(GPLR0); SAVE(GPLR1); SAVE(GPLR2);
  94         SAVE(GPDR0); SAVE(GPDR1); SAVE(GPDR2);
  95         SAVE(GRER0); SAVE(GRER1); SAVE(GRER2);
  96         SAVE(GFER0); SAVE(GFER1); SAVE(GFER2);
  97         SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2);
  98
  99         SAVE(GAFR0_L); SAVE(GAFR0_U);
 100         SAVE(GAFR1_L); SAVE(GAFR1_U);
 101         SAVE(GAFR2_L); SAVE(GAFR2_U);
 102
 103 #ifdef CONFIG_PXA27x
 104         SAVE(MDREFR);
 105         SAVE(GPLR3); SAVE(GPDR3); SAVE(GRER3); SAVE(GFER3); SAVE(PGSR3);
 106         SAVE(GAFR3_L); SAVE(GAFR3_U);
 107         SAVE(PWER); SAVE(PCFR); SAVE(PRER);
 108         SAVE(PFER); SAVE(PKWR);
 109 #endif
 110
 111         SAVE(ICMR);
 112         ICMR = 0;
 113
 114         SAVE(CKEN);
 115         SAVE(PSTR);
 116
 117         /* Note: wake up source are set up in each machine specific files */
 118
 119         /* clear GPIO transition detect  bits */
 120         GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2;
 121 #ifdef CONFIG_PXA27x
 122         GEDR3 = GEDR3;
 123 #endif
 124
 125         /* Clear sleep reset status */
 126         RCSR = RCSR_SMR;
 127
 128         /* before sleeping, calculate and save a checksum */
 129         for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
 130                 checksum += sleep_save[i];
 131         sleep_save[SLEEP_SAVE_CKSUM] = checksum;
 132
 133         /* *** go zzz *** */
 134         pxa_cpu_pm_enter(state);
 135
 136         cpu_init();
 137
 138         /* after sleeping, validate the checksum */
 139         checksum = 0;
 140         for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
 141                 checksum += sleep_save[i];
 142
 143         /* if invalid, display message and wait for a hardware reset */
 144         if (checksum != sleep_save[SLEEP_SAVE_CKSUM]) {
 145 #ifdef CONFIG_ARCH_LUBBOCK
 146                 LUB_HEXLED = 0xbadbadc5;
 147 #endif
 148                 while (1)
 149                         pxa_cpu_pm_enter(state);
 150         }
 151
 152         /* ensure not to come back here if it wasn't intended */
 153         PSPR = 0;
 154
 155         /* restore registers */
 156         RESTORE(GAFR0_L); RESTORE(GAFR0_U);
 157         RESTORE(GAFR1_L); RESTORE(GAFR1_U);
 158         RESTORE(GAFR2_L); RESTORE(GAFR2_U);
 159         RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2);
 160         RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2);
 161         RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2);
 162         RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2);
 163         RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2);
 164
 165 #ifdef CONFIG_PXA27x
 166         RESTORE(MDREFR);
 167         RESTORE(GAFR3_L); RESTORE(GAFR3_U); RESTORE_GPLEVEL(3);
 168         RESTORE(GPDR3); RESTORE(GRER3); RESTORE(GFER3); RESTORE(PGSR3);
 169         RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER);
 170         RESTORE(PFER); RESTORE(PKWR);
 171 #endif
 172
 173         PSSR = PSSR_RDH | PSSR_PH;
 174
 175         RESTORE(CKEN);
 176
 177         ICLR = 0;
 178         ICCR = 1;
 179         RESTORE(ICMR);
 180
 181         RESTORE(PSTR);
 182
 183         /* restore current time */
 184         rtc.tv_sec = RCNR;
 185         restore_time_delta(&delta, &rtc);
 186
 187 #ifdef DEBUG
 188         printk(KERN_DEBUG "*** made it back from resume\n");
 189 #endif
 190
 191         return 0;
 192 }
 193
 194 unsigned long sleep_phys_sp(void *sp)
 195 {
 196         return virt_to_phys(sp);
 197 }
 198
 199 /*
 200  * Called after processes are frozen, but before we shut down devices.
 201  */
 202 static int pxa_pm_prepare(suspend_state_t state)
 203 {
 204         extern int pxa_cpu_pm_prepare(suspend_state_t state);
 205
 206         return pxa_cpu_pm_prepare(state);
 207 }
 208
 209 /*
 210  * Called after devices are re-setup, but before processes are thawed.
 211  */
 212 static int pxa_pm_finish(suspend_state_t state)
 213 {
 214         return 0;
 215 }
 216
 217 /*
 218  * Set to PM_DISK_FIRMWARE so we can quickly veto suspend-to-disk.
 219  */
 220 static struct pm_ops pxa_pm_ops = {
 221         .pm_disk_mode   = PM_DISK_FIRMWARE,
 222         .prepare        = pxa_pm_prepare,
 223         .enter          = pxa_pm_enter,
 224         .finish         = pxa_pm_finish,
 225 };
 226
 227 static int __init pxa_pm_init(void)
 228 {
 229         pm_set_ops(&pxa_pm_ops);
 230         return 0;
 231 }
 232
 233 late_initcall(pxa_pm_init);