Merge tag 'iio-fixes-for-4.5b' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23...
[deliverable/linux.git] / arch / arm / mach-realview / core.c
1 /*
2 * linux/arch/arm/mach-realview/core.c
3 *
4 * Copyright (C) 1999 - 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21 #include <linux/init.h>
22 #include <linux/platform_device.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/device.h>
25 #include <linux/interrupt.h>
26 #include <linux/amba/bus.h>
27 #include <linux/amba/clcd.h>
28 #include <linux/platform_data/video-clcd-versatile.h>
29 #include <linux/io.h>
30 #include <linux/smsc911x.h>
31 #include <linux/smc91x.h>
32 #include <linux/ata_platform.h>
33 #include <linux/amba/mmci.h>
34 #include <linux/gfp.h>
35 #include <linux/mtd/physmap.h>
36 #include <linux/memblock.h>
37
38 #include <clocksource/timer-sp804.h>
39 #include "hardware.h"
40 #include <asm/irq.h>
41 #include <asm/mach-types.h>
42 #include <asm/hardware/icst.h>
43
44 #include <asm/mach/arch.h>
45 #include <asm/mach/irq.h>
46 #include <asm/mach/map.h>
47
48 #include "platform.h"
49
50 #include <plat/sched_clock.h>
51
52 #include "core.h"
53
54 #define REALVIEW_FLASHCTRL (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_FLASH_OFFSET)
55
56 static void realview_flash_set_vpp(struct platform_device *pdev, int on)
57 {
58 u32 val;
59
60 val = __raw_readl(REALVIEW_FLASHCTRL);
61 if (on)
62 val |= REALVIEW_FLASHPROG_FLVPPEN;
63 else
64 val &= ~REALVIEW_FLASHPROG_FLVPPEN;
65 __raw_writel(val, REALVIEW_FLASHCTRL);
66 }
67
68 static struct physmap_flash_data realview_flash_data = {
69 .width = 4,
70 .set_vpp = realview_flash_set_vpp,
71 };
72
73 struct platform_device realview_flash_device = {
74 .name = "physmap-flash",
75 .id = 0,
76 .dev = {
77 .platform_data = &realview_flash_data,
78 },
79 };
80
81 int realview_flash_register(struct resource *res, u32 num)
82 {
83 realview_flash_device.resource = res;
84 realview_flash_device.num_resources = num;
85 return platform_device_register(&realview_flash_device);
86 }
87
88 static struct smsc911x_platform_config smsc911x_config = {
89 .flags = SMSC911X_USE_32BIT,
90 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
91 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
92 .phy_interface = PHY_INTERFACE_MODE_MII,
93 };
94
95 static struct smc91x_platdata smc91x_platdata = {
96 .flags = SMC91X_USE_32BIT | SMC91X_NOWAIT,
97 };
98
99 static struct platform_device realview_eth_device = {
100 .name = "smsc911x",
101 .id = 0,
102 .num_resources = 2,
103 };
104
105 int realview_eth_register(const char *name, struct resource *res)
106 {
107 if (name)
108 realview_eth_device.name = name;
109 realview_eth_device.resource = res;
110 if (strcmp(realview_eth_device.name, "smsc911x") == 0)
111 realview_eth_device.dev.platform_data = &smsc911x_config;
112 else
113 realview_eth_device.dev.platform_data = &smc91x_platdata;
114
115 return platform_device_register(&realview_eth_device);
116 }
117
118 struct platform_device realview_usb_device = {
119 .name = "isp1760",
120 .num_resources = 2,
121 };
122
123 int realview_usb_register(struct resource *res)
124 {
125 realview_usb_device.resource = res;
126 return platform_device_register(&realview_usb_device);
127 }
128
129 static struct pata_platform_info pata_platform_data = {
130 .ioport_shift = 1,
131 };
132
133 static struct resource pata_resources[] = {
134 [0] = {
135 .start = REALVIEW_CF_BASE,
136 .end = REALVIEW_CF_BASE + 0xff,
137 .flags = IORESOURCE_MEM,
138 },
139 [1] = {
140 .start = REALVIEW_CF_BASE + 0x100,
141 .end = REALVIEW_CF_BASE + SZ_4K - 1,
142 .flags = IORESOURCE_MEM,
143 },
144 };
145
146 struct platform_device realview_cf_device = {
147 .name = "pata_platform",
148 .id = -1,
149 .num_resources = ARRAY_SIZE(pata_resources),
150 .resource = pata_resources,
151 .dev = {
152 .platform_data = &pata_platform_data,
153 },
154 };
155
156 static struct resource realview_leds_resources[] = {
157 {
158 .start = REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET,
159 .end = REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET + 4,
160 .flags = IORESOURCE_MEM,
161 },
162 };
163
164 struct platform_device realview_leds_device = {
165 .name = "versatile-leds",
166 .id = -1,
167 .num_resources = ARRAY_SIZE(realview_leds_resources),
168 .resource = realview_leds_resources,
169 };
170
171 static struct resource realview_i2c_resource = {
172 .start = REALVIEW_I2C_BASE,
173 .end = REALVIEW_I2C_BASE + SZ_4K - 1,
174 .flags = IORESOURCE_MEM,
175 };
176
177 struct platform_device realview_i2c_device = {
178 .name = "versatile-i2c",
179 .id = 0,
180 .num_resources = 1,
181 .resource = &realview_i2c_resource,
182 };
183
184 static struct i2c_board_info realview_i2c_board_info[] = {
185 {
186 I2C_BOARD_INFO("ds1338", 0xd0 >> 1),
187 },
188 };
189
190 static int __init realview_i2c_init(void)
191 {
192 return i2c_register_board_info(0, realview_i2c_board_info,
193 ARRAY_SIZE(realview_i2c_board_info));
194 }
195 arch_initcall(realview_i2c_init);
196
197 #define REALVIEW_SYSMCI (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_MCI_OFFSET)
198
199 /*
200 * This is only used if GPIOLIB support is disabled
201 */
202 static unsigned int realview_mmc_status(struct device *dev)
203 {
204 struct amba_device *adev = container_of(dev, struct amba_device, dev);
205 u32 mask;
206
207 if (machine_is_realview_pb1176()) {
208 static bool inserted = false;
209
210 /*
211 * The PB1176 does not have the status register,
212 * assume it is inserted at startup, then invert
213 * for each call so card insertion/removal will
214 * be detected anyway. This will not be called if
215 * GPIO on PL061 is active, which is the proper
216 * way to do this on the PB1176.
217 */
218 inserted = !inserted;
219 return inserted ? 0 : 1;
220 }
221
222 if (adev->res.start == REALVIEW_MMCI0_BASE)
223 mask = 1;
224 else
225 mask = 2;
226
227 return readl(REALVIEW_SYSMCI) & mask;
228 }
229
230 struct mmci_platform_data realview_mmc0_plat_data = {
231 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
232 .status = realview_mmc_status,
233 .gpio_wp = 17,
234 .gpio_cd = 16,
235 .cd_invert = true,
236 };
237
238 struct mmci_platform_data realview_mmc1_plat_data = {
239 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
240 .status = realview_mmc_status,
241 .gpio_wp = 19,
242 .gpio_cd = 18,
243 .cd_invert = true,
244 };
245
246 void __init realview_init_early(void)
247 {
248 void __iomem *sys = __io_address(REALVIEW_SYS_BASE);
249
250 versatile_sched_clock_init(sys + REALVIEW_SYS_24MHz_OFFSET, 24000000);
251 }
252
253 /*
254 * CLCD support.
255 */
256 #define SYS_CLCD_NLCDIOON (1 << 2)
257 #define SYS_CLCD_VDDPOSSWITCH (1 << 3)
258 #define SYS_CLCD_PWR3V5SWITCH (1 << 4)
259 #define SYS_CLCD_ID_MASK (0x1f << 8)
260 #define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8)
261 #define SYS_CLCD_ID_UNKNOWN_8_4 (0x01 << 8)
262 #define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8)
263 #define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8)
264 #define SYS_CLCD_ID_VGA (0x1f << 8)
265
266 /*
267 * Disable all display connectors on the interface module.
268 */
269 static void realview_clcd_disable(struct clcd_fb *fb)
270 {
271 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
272 u32 val;
273
274 val = readl(sys_clcd);
275 val &= ~SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
276 writel(val, sys_clcd);
277 }
278
279 /*
280 * Enable the relevant connector on the interface module.
281 */
282 static void realview_clcd_enable(struct clcd_fb *fb)
283 {
284 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
285 u32 val;
286
287 /*
288 * Enable the PSUs
289 */
290 val = readl(sys_clcd);
291 val |= SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
292 writel(val, sys_clcd);
293 }
294
295 /*
296 * Detect which LCD panel is connected, and return the appropriate
297 * clcd_panel structure. Note: we do not have any information on
298 * the required timings for the 8.4in panel, so we presently assume
299 * VGA timings.
300 */
301 static int realview_clcd_setup(struct clcd_fb *fb)
302 {
303 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
304 const char *panel_name, *vga_panel_name;
305 unsigned long framesize;
306 u32 val;
307
308 if (machine_is_realview_eb()) {
309 /* VGA, 16bpp */
310 framesize = 640 * 480 * 2;
311 vga_panel_name = "VGA";
312 } else {
313 /* XVGA, 16bpp */
314 framesize = 1024 * 768 * 2;
315 vga_panel_name = "XVGA";
316 }
317
318 val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
319 if (val == SYS_CLCD_ID_SANYO_3_8)
320 panel_name = "Sanyo TM38QV67A02A";
321 else if (val == SYS_CLCD_ID_SANYO_2_5)
322 panel_name = "Sanyo QVGA Portrait";
323 else if (val == SYS_CLCD_ID_EPSON_2_2)
324 panel_name = "Epson L2F50113T00";
325 else if (val == SYS_CLCD_ID_VGA)
326 panel_name = vga_panel_name;
327 else {
328 pr_err("CLCD: unknown LCD panel ID 0x%08x, using VGA\n", val);
329 panel_name = vga_panel_name;
330 }
331
332 fb->panel = versatile_clcd_get_panel(panel_name);
333 if (!fb->panel)
334 return -EINVAL;
335
336 return versatile_clcd_setup_dma(fb, framesize);
337 }
338
339 struct clcd_board clcd_plat_data = {
340 .name = "RealView",
341 .caps = CLCD_CAP_ALL,
342 .check = clcdfb_check,
343 .decode = clcdfb_decode,
344 .disable = realview_clcd_disable,
345 .enable = realview_clcd_enable,
346 .setup = realview_clcd_setup,
347 .mmap = versatile_clcd_mmap_dma,
348 .remove = versatile_clcd_remove_dma,
349 };
350
351 /*
352 * Where is the timer (VA)?
353 */
354 void __iomem *timer0_va_base;
355 void __iomem *timer1_va_base;
356 void __iomem *timer2_va_base;
357 void __iomem *timer3_va_base;
358
359 /*
360 * Set up the clock source and clock events devices
361 */
362 void __init realview_timer_init(unsigned int timer_irq)
363 {
364 u32 val;
365
366 /*
367 * set clock frequency:
368 * REALVIEW_REFCLK is 32KHz
369 * REALVIEW_TIMCLK is 1MHz
370 */
371 val = readl(__io_address(REALVIEW_SCTL_BASE));
372 writel((REALVIEW_TIMCLK << REALVIEW_TIMER1_EnSel) |
373 (REALVIEW_TIMCLK << REALVIEW_TIMER2_EnSel) |
374 (REALVIEW_TIMCLK << REALVIEW_TIMER3_EnSel) |
375 (REALVIEW_TIMCLK << REALVIEW_TIMER4_EnSel) | val,
376 __io_address(REALVIEW_SCTL_BASE));
377
378 /*
379 * Initialise to a known state (all timers off)
380 */
381 sp804_timer_disable(timer0_va_base);
382 sp804_timer_disable(timer1_va_base);
383 sp804_timer_disable(timer2_va_base);
384 sp804_timer_disable(timer3_va_base);
385
386 sp804_clocksource_init(timer3_va_base, "timer3");
387 sp804_clockevents_init(timer0_va_base, timer_irq, "timer0");
388 }
389
390 /*
391 * Setup the memory banks.
392 */
393 void realview_fixup(struct tag *tags, char **from)
394 {
395 /*
396 * Most RealView platforms have 512MB contiguous RAM at 0x70000000.
397 * Half of this is mirrored at 0.
398 */
399 #ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
400 memblock_add(0x70000000, SZ_512M);
401 #else
402 memblock_add(0, SZ_256M);
403 #endif
404 }
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