arch/arm/mach-realview/platsmp.c

   1 /*
   2  *  linux/arch/arm/mach-realview/platsmp.c
   3  *
   4  *  Copyright (C) 2002 ARM Ltd.
   5  *  All Rights Reserved
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11 #include <linux/init.h>
  12 #include <linux/errno.h>
  13 #include <linux/delay.h>
  14 #include <linux/device.h>
  15 #include <linux/smp.h>
  16 #include <linux/io.h>
  17
  18 #include <asm/cacheflush.h>
  19 #include <mach/hardware.h>
  20 #include <asm/mach-types.h>
  21
  22 #include <mach/board-eb.h>
  23 #include <mach/board-pb11mp.h>
  24 #include <mach/scu.h>
  25
  26 extern void realview_secondary_startup(void);
  27
  28 /*
  29  * control for which core is the next to come out of the secondary
  30  * boot "holding pen"
  31  */
  32 volatile int __cpuinitdata pen_release = -1;
  33
  34 static unsigned int __init get_core_count(void)
  35 {
  36         unsigned int ncores;
  37         void __iomem *scu_base = 0;
  38
  39         if (machine_is_realview_eb() &&
  40             (core_tile_eb11mp() || core_tile_a9mp()))
  41                 scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
  42         else if (machine_is_realview_pb11mp())
  43                 scu_base = __io_address(REALVIEW_TC11MP_SCU_BASE);
  44
  45         if (scu_base) {
  46                 ncores = __raw_readl(scu_base + SCU_CONFIG);
  47                 ncores = (ncores & 0x03) + 1;
  48         } else
  49                 ncores = 1;
  50
  51         return ncores;
  52 }
  53
  54 /*
  55  * Setup the SCU
  56  */
  57 static void scu_enable(void)
  58 {
  59         u32 scu_ctrl;
  60         void __iomem *scu_base;
  61
  62         if (machine_is_realview_eb() &&
  63             (core_tile_eb11mp() || core_tile_a9mp()))
  64                 scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
  65         else if (machine_is_realview_pb11mp())
  66                 scu_base = __io_address(REALVIEW_TC11MP_SCU_BASE);
  67         else
  68                 BUG();
  69
  70         scu_ctrl = __raw_readl(scu_base + SCU_CTRL);
  71         scu_ctrl |= 1;
  72         __raw_writel(scu_ctrl, scu_base + SCU_CTRL);
  73 }
  74
  75 static DEFINE_SPINLOCK(boot_lock);
  76
  77 void __cpuinit platform_secondary_init(unsigned int cpu)
  78 {
  79         trace_hardirqs_off();
  80
  81         /*
  82          * the primary core may have used a "cross call" soft interrupt
  83          * to get this processor out of WFI in the BootMonitor - make
  84          * sure that we are no longer being sent this soft interrupt
  85          */
  86         smp_cross_call_done(cpumask_of_cpu(cpu));
  87
  88         /*
  89          * if any interrupts are already enabled for the primary
  90          * core (e.g. timer irq), then they will not have been enabled
  91          * for us: do so
  92          */
  93         if (machine_is_realview_eb() &&
  94             (core_tile_eb11mp() || core_tile_a9mp()))
  95                 gic_cpu_init(0, __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
  96         else if (machine_is_realview_pb11mp())
  97                 gic_cpu_init(0, __io_address(REALVIEW_TC11MP_GIC_CPU_BASE));
  98
  99         /*
 100          * let the primary processor know we're out of the
 101          * pen, then head off into the C entry point
 102          */
 103         pen_release = -1;
 104         smp_wmb();
 105
 106         /*
 107          * Synchronise with the boot thread.
 108          */
 109         spin_lock(&boot_lock);
 110         spin_unlock(&boot_lock);
 111 }
 112
 113 int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
 114 {
 115         unsigned long timeout;
 116
 117         /*
 118          * set synchronisation state between this boot processor
 119          * and the secondary one
 120          */
 121         spin_lock(&boot_lock);
 122
 123         /*
 124          * The secondary processor is waiting to be released from
 125          * the holding pen - release it, then wait for it to flag
 126          * that it has been released by resetting pen_release.
 127          *
 128          * Note that "pen_release" is the hardware CPU ID, whereas
 129          * "cpu" is Linux's internal ID.
 130          */
 131         pen_release = cpu;
 132         flush_cache_all();
 133
 134         /*
 135          * XXX
 136          *
 137          * This is a later addition to the booting protocol: the
 138          * bootMonitor now puts secondary cores into WFI, so
 139          * poke_milo() no longer gets the cores moving; we need
 140          * to send a soft interrupt to wake the secondary core.
 141          * Use smp_cross_call() for this, since there's little
 142          * point duplicating the code here
 143          */
 144         smp_cross_call(cpumask_of_cpu(cpu));
 145
 146         timeout = jiffies + (1 * HZ);
 147         while (time_before(jiffies, timeout)) {
 148                 smp_rmb();
 149                 if (pen_release == -1)
 150                         break;
 151
 152                 udelay(10);
 153         }
 154
 155         /*
 156          * now the secondary core is starting up let it run its
 157          * calibrations, then wait for it to finish
 158          */
 159         spin_unlock(&boot_lock);
 160
 161         return pen_release != -1 ? -ENOSYS : 0;
 162 }
 163
 164 static void __init poke_milo(void)
 165 {
 166         extern void secondary_startup(void);
 167
 168         /* nobody is to be released from the pen yet */
 169         pen_release = -1;
 170
 171         /*
 172          * write the address of secondary startup into the system-wide
 173          * flags register, then clear the bottom two bits, which is what
 174          * BootMonitor is waiting for
 175          */
 176 #if 1
 177 #define REALVIEW_SYS_FLAGSS_OFFSET 0x30
 178         __raw_writel(virt_to_phys(realview_secondary_startup),
 179                      __io_address(REALVIEW_SYS_BASE) +
 180                      REALVIEW_SYS_FLAGSS_OFFSET);
 181 #define REALVIEW_SYS_FLAGSC_OFFSET 0x34
 182         __raw_writel(3,
 183                      __io_address(REALVIEW_SYS_BASE) +
 184                      REALVIEW_SYS_FLAGSC_OFFSET);
 185 #endif
 186
 187         mb();
 188 }
 189
 190 /*
 191  * Initialise the CPU possible map early - this describes the CPUs
 192  * which may be present or become present in the system.
 193  */
 194 void __init smp_init_cpus(void)
 195 {
 196         unsigned int i, ncores = get_core_count();
 197
 198         for (i = 0; i < ncores; i++)
 199                 cpu_set(i, cpu_possible_map);
 200 }
 201
 202 void __init smp_prepare_cpus(unsigned int max_cpus)
 203 {
 204         unsigned int ncores = get_core_count();
 205         unsigned int cpu = smp_processor_id();
 206         int i;
 207
 208         /* sanity check */
 209         if (ncores == 0) {
 210                 printk(KERN_ERR
 211                        "Realview: strange CM count of 0? Default to 1\n");
 212
 213                 ncores = 1;
 214         }
 215
 216         if (ncores > NR_CPUS) {
 217                 printk(KERN_WARNING
 218                        "Realview: no. of cores (%d) greater than configured "
 219                        "maximum of %d - clipping\n",
 220                        ncores, NR_CPUS);
 221                 ncores = NR_CPUS;
 222         }
 223
 224         smp_store_cpu_info(cpu);
 225
 226         /*
 227          * are we trying to boot more cores than exist?
 228          */
 229         if (max_cpus > ncores)
 230                 max_cpus = ncores;
 231
 232 #ifdef CONFIG_LOCAL_TIMERS
 233         /*
 234          * Enable the local timer for primary CPU. If the device is
 235          * dummy (!CONFIG_LOCAL_TIMERS), it was already registers in
 236          * realview_timer_init
 237          */
 238         if ((machine_is_realview_eb() &&
 239              (core_tile_eb11mp() || core_tile_a9mp())) ||
 240             machine_is_realview_pb11mp())
 241                 local_timer_setup();
 242 #endif
 243
 244         /*
 245          * Initialise the present map, which describes the set of CPUs
 246          * actually populated at the present time.
 247          */
 248         for (i = 0; i < max_cpus; i++)
 249                 cpu_set(i, cpu_present_map);
 250
 251         /*
 252          * Initialise the SCU if there are more than one CPU and let
 253          * them know where to start. Note that, on modern versions of
 254          * MILO, the "poke" doesn't actually do anything until each
 255          * individual core is sent a soft interrupt to get it out of
 256          * WFI
 257          */
 258         if (max_cpus > 1) {
 259                 scu_enable();
 260                 poke_milo();
 261         }
 262 }