arch/arm/mach-realview/realview_pb11mp.c

   1 /*
   2  *  linux/arch/arm/mach-realview/realview_pb11mp.c
   3  *
   4  *  Copyright (C) 2008 ARM Limited
   5  *  Copyright (C) 2000 Deep Blue Solutions Ltd
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21
  22 #include <linux/init.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/device.h>
  25 #include <linux/amba/bus.h>
  26 #include <linux/amba/pl061.h>
  27 #include <linux/amba/mmci.h>
  28 #include <linux/amba/pl022.h>
  29 #include <linux/io.h>
  30 #include <linux/platform_data/clk-realview.h>
  31
  32 #include <mach/hardware.h>
  33 #include <asm/irq.h>
  34 #include <asm/mach-types.h>
  35 #include <asm/pgtable.h>
  36 #include <asm/hardware/gic.h>
  37 #include <asm/hardware/cache-l2x0.h>
  38 #include <asm/smp_twd.h>
  39
  40 #include <asm/mach/arch.h>
  41 #include <asm/mach/flash.h>
  42 #include <asm/mach/map.h>
  43 #include <asm/mach/time.h>
  44
  45 #include <mach/board-pb11mp.h>
  46 #include <mach/irqs.h>
  47
  48 #include "core.h"
  49
  50 static struct map_desc realview_pb11mp_io_desc[] __initdata = {
  51         {
  52                 .virtual        = IO_ADDRESS(REALVIEW_SYS_BASE),
  53                 .pfn            = __phys_to_pfn(REALVIEW_SYS_BASE),
  54                 .length         = SZ_4K,
  55                 .type           = MT_DEVICE,
  56         }, {
  57                 .virtual        = IO_ADDRESS(REALVIEW_PB11MP_GIC_CPU_BASE),
  58                 .pfn            = __phys_to_pfn(REALVIEW_PB11MP_GIC_CPU_BASE),
  59                 .length         = SZ_4K,
  60                 .type           = MT_DEVICE,
  61         }, {
  62                 .virtual        = IO_ADDRESS(REALVIEW_PB11MP_GIC_DIST_BASE),
  63                 .pfn            = __phys_to_pfn(REALVIEW_PB11MP_GIC_DIST_BASE),
  64                 .length         = SZ_4K,
  65                 .type           = MT_DEVICE,
  66         }, {    /* Maps the SCU, GIC CPU interface, TWD, GIC DIST */
  67                 .virtual        = IO_ADDRESS(REALVIEW_TC11MP_PRIV_MEM_BASE),
  68                 .pfn            = __phys_to_pfn(REALVIEW_TC11MP_PRIV_MEM_BASE),
  69                 .length         = REALVIEW_TC11MP_PRIV_MEM_SIZE,
  70                 .type           = MT_DEVICE,
  71         }, {
  72                 .virtual        = IO_ADDRESS(REALVIEW_SCTL_BASE),
  73                 .pfn            = __phys_to_pfn(REALVIEW_SCTL_BASE),
  74                 .length         = SZ_4K,
  75                 .type           = MT_DEVICE,
  76         }, {
  77                 .virtual        = IO_ADDRESS(REALVIEW_PB11MP_TIMER0_1_BASE),
  78                 .pfn            = __phys_to_pfn(REALVIEW_PB11MP_TIMER0_1_BASE),
  79                 .length         = SZ_4K,
  80                 .type           = MT_DEVICE,
  81         }, {
  82                 .virtual        = IO_ADDRESS(REALVIEW_PB11MP_TIMER2_3_BASE),
  83                 .pfn            = __phys_to_pfn(REALVIEW_PB11MP_TIMER2_3_BASE),
  84                 .length         = SZ_4K,
  85                 .type           = MT_DEVICE,
  86         }, {
  87                 .virtual        = IO_ADDRESS(REALVIEW_TC11MP_L220_BASE),
  88                 .pfn            = __phys_to_pfn(REALVIEW_TC11MP_L220_BASE),
  89                 .length         = SZ_8K,
  90                 .type           = MT_DEVICE,
  91         },
  92 #ifdef CONFIG_DEBUG_LL
  93         {
  94                 .virtual        = IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE),
  95                 .pfn            = __phys_to_pfn(REALVIEW_PB11MP_UART0_BASE),
  96                 .length         = SZ_4K,
  97                 .type           = MT_DEVICE,
  98         },
  99 #endif
 100 };
 101
 102 static void __init realview_pb11mp_map_io(void)
 103 {
 104         iotable_init(realview_pb11mp_io_desc, ARRAY_SIZE(realview_pb11mp_io_desc));
 105 }
 106
 107 static struct pl061_platform_data gpio0_plat_data = {
 108         .gpio_base      = 0,
 109 };
 110
 111 static struct pl061_platform_data gpio1_plat_data = {
 112         .gpio_base      = 8,
 113 };
 114
 115 static struct pl061_platform_data gpio2_plat_data = {
 116         .gpio_base      = 16,
 117 };
 118
 119 static struct pl022_ssp_controller ssp0_plat_data = {
 120         .bus_id = 0,
 121         .enable_dma = 0,
 122         .num_chipselect = 1,
 123 };
 124
 125 /*
 126  * RealView PB11MPCore AMBA devices
 127  */
 128
 129 #define GPIO2_IRQ               { IRQ_PB11MP_GPIO2 }
 130 #define GPIO3_IRQ               { IRQ_PB11MP_GPIO3 }
 131 #define AACI_IRQ                { IRQ_TC11MP_AACI }
 132 #define MMCI0_IRQ               { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B }
 133 #define KMI0_IRQ                { IRQ_TC11MP_KMI0 }
 134 #define KMI1_IRQ                { IRQ_TC11MP_KMI1 }
 135 #define PB11MP_SMC_IRQ          { }
 136 #define MPMC_IRQ                { }
 137 #define PB11MP_CLCD_IRQ         { IRQ_PB11MP_CLCD }
 138 #define DMAC_IRQ                { IRQ_PB11MP_DMAC }
 139 #define SCTL_IRQ                { }
 140 #define PB11MP_WATCHDOG_IRQ     { IRQ_PB11MP_WATCHDOG }
 141 #define PB11MP_GPIO0_IRQ        { IRQ_PB11MP_GPIO0 }
 142 #define GPIO1_IRQ               { IRQ_PB11MP_GPIO1 }
 143 #define PB11MP_RTC_IRQ          { IRQ_TC11MP_RTC }
 144 #define SCI_IRQ                 { IRQ_PB11MP_SCI }
 145 #define PB11MP_UART0_IRQ        { IRQ_TC11MP_UART0 }
 146 #define PB11MP_UART1_IRQ        { IRQ_TC11MP_UART1 }
 147 #define PB11MP_UART2_IRQ        { IRQ_PB11MP_UART2 }
 148 #define PB11MP_UART3_IRQ        { IRQ_PB11MP_UART3 }
 149 #define PB11MP_SSP_IRQ          { IRQ_PB11MP_SSP }
 150
 151 /* FPGA Primecells */
 152 APB_DEVICE(aaci,        "fpga:aaci",    AACI,           NULL);
 153 APB_DEVICE(mmc0,        "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
 154 APB_DEVICE(kmi0,        "fpga:kmi0",    KMI0,           NULL);
 155 APB_DEVICE(kmi1,        "fpga:kmi1",    KMI1,           NULL);
 156 APB_DEVICE(uart3,       "fpga:uart3",   PB11MP_UART3,   NULL);
 157
 158 /* DevChip Primecells */
 159 AHB_DEVICE(smc,         "dev:smc",      PB11MP_SMC,     NULL);
 160 AHB_DEVICE(sctl,        "dev:sctl",     SCTL,           NULL);
 161 APB_DEVICE(wdog,        "dev:wdog",     PB11MP_WATCHDOG, NULL);
 162 APB_DEVICE(gpio0,       "dev:gpio0",    PB11MP_GPIO0,   &gpio0_plat_data);
 163 APB_DEVICE(gpio1,       "dev:gpio1",    GPIO1,          &gpio1_plat_data);
 164 APB_DEVICE(gpio2,       "dev:gpio2",    GPIO2,          &gpio2_plat_data);
 165 APB_DEVICE(rtc,         "dev:rtc",      PB11MP_RTC,     NULL);
 166 APB_DEVICE(sci0,        "dev:sci0",     SCI,            NULL);
 167 APB_DEVICE(uart0,       "dev:uart0",    PB11MP_UART0,   NULL);
 168 APB_DEVICE(uart1,       "dev:uart1",    PB11MP_UART1,   NULL);
 169 APB_DEVICE(uart2,       "dev:uart2",    PB11MP_UART2,   NULL);
 170 APB_DEVICE(ssp0,        "dev:ssp0",     PB11MP_SSP,     &ssp0_plat_data);
 171
 172 /* Primecells on the NEC ISSP chip */
 173 AHB_DEVICE(clcd,        "issp:clcd",    PB11MP_CLCD,    &clcd_plat_data);
 174 AHB_DEVICE(dmac,        "issp:dmac",    DMAC,           NULL);
 175
 176 static struct amba_device *amba_devs[] __initdata = {
 177         &dmac_device,
 178         &uart0_device,
 179         &uart1_device,
 180         &uart2_device,
 181         &uart3_device,
 182         &smc_device,
 183         &clcd_device,
 184         &sctl_device,
 185         &wdog_device,
 186         &gpio0_device,
 187         &gpio1_device,
 188         &gpio2_device,
 189         &rtc_device,
 190         &sci0_device,
 191         &ssp0_device,
 192         &aaci_device,
 193         &mmc0_device,
 194         &kmi0_device,
 195         &kmi1_device,
 196 };
 197
 198 /*
 199  * RealView PB11MPCore platform devices
 200  */
 201 static struct resource realview_pb11mp_flash_resource[] = {
 202         [0] = {
 203                 .start          = REALVIEW_PB11MP_FLASH0_BASE,
 204                 .end            = REALVIEW_PB11MP_FLASH0_BASE + REALVIEW_PB11MP_FLASH0_SIZE - 1,
 205                 .flags          = IORESOURCE_MEM,
 206         },
 207         [1] = {
 208                 .start          = REALVIEW_PB11MP_FLASH1_BASE,
 209                 .end            = REALVIEW_PB11MP_FLASH1_BASE + REALVIEW_PB11MP_FLASH1_SIZE - 1,
 210                 .flags          = IORESOURCE_MEM,
 211         },
 212 };
 213
 214 static struct resource realview_pb11mp_smsc911x_resources[] = {
 215         [0] = {
 216                 .start          = REALVIEW_PB11MP_ETH_BASE,
 217                 .end            = REALVIEW_PB11MP_ETH_BASE + SZ_64K - 1,
 218                 .flags          = IORESOURCE_MEM,
 219         },
 220         [1] = {
 221                 .start          = IRQ_TC11MP_ETH,
 222                 .end            = IRQ_TC11MP_ETH,
 223                 .flags          = IORESOURCE_IRQ,
 224         },
 225 };
 226
 227 static struct resource realview_pb11mp_isp1761_resources[] = {
 228         [0] = {
 229                 .start          = REALVIEW_PB11MP_USB_BASE,
 230                 .end            = REALVIEW_PB11MP_USB_BASE + SZ_128K - 1,
 231                 .flags          = IORESOURCE_MEM,
 232         },
 233         [1] = {
 234                 .start          = IRQ_TC11MP_USB,
 235                 .end            = IRQ_TC11MP_USB,
 236                 .flags          = IORESOURCE_IRQ,
 237         },
 238 };
 239
 240 static struct resource pmu_resources[] = {
 241         [0] = {
 242                 .start          = IRQ_TC11MP_PMU_CPU0,
 243                 .end            = IRQ_TC11MP_PMU_CPU0,
 244                 .flags          = IORESOURCE_IRQ,
 245         },
 246         [1] = {
 247                 .start          = IRQ_TC11MP_PMU_CPU1,
 248                 .end            = IRQ_TC11MP_PMU_CPU1,
 249                 .flags          = IORESOURCE_IRQ,
 250         },
 251         [2] = {
 252                 .start          = IRQ_TC11MP_PMU_CPU2,
 253                 .end            = IRQ_TC11MP_PMU_CPU2,
 254                 .flags          = IORESOURCE_IRQ,
 255         },
 256         [3] = {
 257                 .start          = IRQ_TC11MP_PMU_CPU3,
 258                 .end            = IRQ_TC11MP_PMU_CPU3,
 259                 .flags          = IORESOURCE_IRQ,
 260         },
 261 };
 262
 263 static struct platform_device pmu_device = {
 264         .name                   = "arm-pmu",
 265         .id                     = -1,
 266         .num_resources          = ARRAY_SIZE(pmu_resources),
 267         .resource               = pmu_resources,
 268 };
 269
 270 static void __init gic_init_irq(void)
 271 {
 272         unsigned int pldctrl;
 273
 274         /* new irq mode with no DCC */
 275         writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
 276         pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
 277         pldctrl |= 2 << 22;
 278         writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
 279         writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
 280
 281         /* ARM11MPCore test chip GIC, primary */
 282         gic_init(0, 29, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE),
 283                  __io_address(REALVIEW_TC11MP_GIC_CPU_BASE));
 284
 285         /* board GIC, secondary */
 286         gic_init(1, IRQ_PB11MP_GIC_START,
 287                  __io_address(REALVIEW_PB11MP_GIC_DIST_BASE),
 288                  __io_address(REALVIEW_PB11MP_GIC_CPU_BASE));
 289         gic_cascade_irq(1, IRQ_TC11MP_PB_IRQ1);
 290 }
 291
 292 #ifdef CONFIG_HAVE_ARM_TWD
 293 static DEFINE_TWD_LOCAL_TIMER(twd_local_timer,
 294                               REALVIEW_TC11MP_TWD_BASE,
 295                               IRQ_LOCALTIMER);
 296
 297 static void __init realview_pb11mp_twd_init(void)
 298 {
 299         int err = twd_local_timer_register(&twd_local_timer);
 300         if (err)
 301                 pr_err("twd_local_timer_register failed %d\n", err);
 302 }
 303 #else
 304 #define realview_pb11mp_twd_init()      do {} while(0)
 305 #endif
 306
 307 static void __init realview_pb11mp_timer_init(void)
 308 {
 309         timer0_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE);
 310         timer1_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE) + 0x20;
 311         timer2_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE);
 312         timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20;
 313
 314         realview_clk_init(__io_address(REALVIEW_SYS_BASE), false);
 315         realview_timer_init(IRQ_TC11MP_TIMER0_1);
 316         realview_pb11mp_twd_init();
 317 }
 318
 319 static struct sys_timer realview_pb11mp_timer = {
 320         .init           = realview_pb11mp_timer_init,
 321 };
 322
 323 static void realview_pb11mp_restart(char mode, const char *cmd)
 324 {
 325         void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
 326         void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
 327
 328         /*
 329          * To reset, we hit the on-board reset register
 330          * in the system FPGA
 331          */
 332         __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
 333         __raw_writel(0x0000, reset_ctrl);
 334         __raw_writel(0x0004, reset_ctrl);
 335         dsb();
 336 }
 337
 338 static void __init realview_pb11mp_init(void)
 339 {
 340         int i;
 341
 342 #ifdef CONFIG_CACHE_L2X0
 343         /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
 344          * Bits:  .... ...0 0111 1001 0000 .... .... .... */
 345         l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
 346 #endif
 347
 348         realview_flash_register(realview_pb11mp_flash_resource,
 349                                 ARRAY_SIZE(realview_pb11mp_flash_resource));
 350         realview_eth_register(NULL, realview_pb11mp_smsc911x_resources);
 351         platform_device_register(&realview_i2c_device);
 352         platform_device_register(&realview_cf_device);
 353         realview_usb_register(realview_pb11mp_isp1761_resources);
 354         platform_device_register(&pmu_device);
 355
 356         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
 357                 struct amba_device *d = amba_devs[i];
 358                 amba_device_register(d, &iomem_resource);
 359         }
 360 }
 361
 362 MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
 363         /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
 364         .atag_offset    = 0x100,
 365         .smp            = smp_ops(realview_smp_ops),
 366         .fixup          = realview_fixup,
 367         .map_io         = realview_pb11mp_map_io,
 368         .init_early     = realview_init_early,
 369         .init_irq       = gic_init_irq,
 370         .timer          = &realview_pb11mp_timer,
 371         .handle_irq     = gic_handle_irq,
 372         .init_machine   = realview_pb11mp_init,
 373 #ifdef CONFIG_ZONE_DMA
 374         .dma_zone_size  = SZ_256M,
 375 #endif
 376         .restart        = realview_pb11mp_restart,
 377 MACHINE_END