Merge branch 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab...
[deliverable/linux.git] / arch / arm / mach-s3c2440 / s3c244x.c
1 /* linux/arch/arm/plat-s3c24xx/s3c244x.c
2 *
3 * Copyright (c) 2004-2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Samsung S3C2440 and S3C2442 Mobile CPU support (not S3C2443)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
21 #include <linux/sysdev.h>
22 #include <linux/syscore_ops.h>
23 #include <linux/clk.h>
24 #include <linux/io.h>
25
26 #include <asm/mach/arch.h>
27 #include <asm/mach/map.h>
28 #include <asm/mach/irq.h>
29
30 #include <mach/hardware.h>
31 #include <asm/irq.h>
32
33 #include <plat/cpu-freq.h>
34
35 #include <mach/regs-clock.h>
36 #include <plat/regs-serial.h>
37 #include <mach/regs-gpio.h>
38 #include <mach/regs-gpioj.h>
39 #include <mach/regs-dsc.h>
40
41 #include <plat/s3c2410.h>
42 #include <plat/s3c244x.h>
43 #include <plat/clock.h>
44 #include <plat/devs.h>
45 #include <plat/cpu.h>
46 #include <plat/pm.h>
47 #include <plat/pll.h>
48 #include <plat/nand-core.h>
49
50 static struct map_desc s3c244x_iodesc[] __initdata = {
51 IODESC_ENT(CLKPWR),
52 IODESC_ENT(TIMER),
53 IODESC_ENT(WATCHDOG),
54 };
55
56 /* uart initialisation */
57
58 void __init s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no)
59 {
60 s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no);
61 }
62
63 void __init s3c244x_map_io(void)
64 {
65 /* register our io-tables */
66
67 iotable_init(s3c244x_iodesc, ARRAY_SIZE(s3c244x_iodesc));
68
69 /* rename any peripherals used differing from the s3c2410 */
70
71 s3c_device_sdi.name = "s3c2440-sdi";
72 s3c_device_i2c0.name = "s3c2440-i2c";
73 s3c_nand_setname("s3c2440-nand");
74 s3c_device_ts.name = "s3c2440-ts";
75 s3c_device_usbgadget.name = "s3c2440-usbgadget";
76 }
77
78 void __init_or_cpufreq s3c244x_setup_clocks(void)
79 {
80 struct clk *xtal_clk;
81 unsigned long clkdiv;
82 unsigned long camdiv;
83 unsigned long xtal;
84 unsigned long hclk, fclk, pclk;
85 int hdiv = 1;
86
87 xtal_clk = clk_get(NULL, "xtal");
88 xtal = clk_get_rate(xtal_clk);
89 clk_put(xtal_clk);
90
91 fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;
92
93 clkdiv = __raw_readl(S3C2410_CLKDIVN);
94 camdiv = __raw_readl(S3C2440_CAMDIVN);
95
96 /* work out clock scalings */
97
98 switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
99 case S3C2440_CLKDIVN_HDIVN_1:
100 hdiv = 1;
101 break;
102
103 case S3C2440_CLKDIVN_HDIVN_2:
104 hdiv = 2;
105 break;
106
107 case S3C2440_CLKDIVN_HDIVN_4_8:
108 hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
109 break;
110
111 case S3C2440_CLKDIVN_HDIVN_3_6:
112 hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
113 break;
114 }
115
116 hclk = fclk / hdiv;
117 pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN) ? 2 : 1);
118
119 /* print brief summary of clocks, etc */
120
121 printk("S3C244X: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
122 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
123
124 s3c24xx_setup_clocks(fclk, hclk, pclk);
125 }
126
127 void __init s3c244x_init_clocks(int xtal)
128 {
129 /* initialise the clocks here, to allow other things like the
130 * console to use them, and to add new ones after the initialisation
131 */
132
133 s3c24xx_register_baseclocks(xtal);
134 s3c244x_setup_clocks();
135 s3c2410_baseclk_add();
136 }
137
138 /* Since the S3C2442 and S3C2440 share items, put both sysclasses here */
139
140 struct sysdev_class s3c2440_sysclass = {
141 .name = "s3c2440-core",
142 };
143
144 struct sysdev_class s3c2442_sysclass = {
145 .name = "s3c2442-core",
146 };
147
148 /* need to register class before we actually register the device, and
149 * we also need to ensure that it has been initialised before any of the
150 * drivers even try to use it (even if not on an s3c2440 based system)
151 * as a driver which may support both 2410 and 2440 may try and use it.
152 */
153
154 static int __init s3c2440_core_init(void)
155 {
156 return sysdev_class_register(&s3c2440_sysclass);
157 }
158
159 core_initcall(s3c2440_core_init);
160
161 static int __init s3c2442_core_init(void)
162 {
163 return sysdev_class_register(&s3c2442_sysclass);
164 }
165
166 core_initcall(s3c2442_core_init);
167
168
169 #ifdef CONFIG_PM
170 static struct sleep_save s3c244x_sleep[] = {
171 SAVE_ITEM(S3C2440_DSC0),
172 SAVE_ITEM(S3C2440_DSC1),
173 SAVE_ITEM(S3C2440_GPJDAT),
174 SAVE_ITEM(S3C2440_GPJCON),
175 SAVE_ITEM(S3C2440_GPJUP)
176 };
177
178 static int s3c244x_suspend(void)
179 {
180 s3c_pm_do_save(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
181 return 0;
182 }
183
184 static void s3c244x_resume(void)
185 {
186 s3c_pm_do_restore(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
187 }
188 #else
189 #define s3c244x_suspend NULL
190 #define s3c244x_resume NULL
191 #endif
192
193 struct syscore_ops s3c244x_pm_syscore_ops = {
194 .suspend = s3c244x_suspend,
195 .resume = s3c244x_resume,
196 };
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