1 /* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/interrupt.h>
17 #include <linux/list.h>
18 #include <linux/timer.h>
19 #include <linux/init.h>
20 #include <linux/serial_core.h>
21 #include <linux/platform_device.h>
23 #include <linux/i2c.h>
24 #include <linux/leds.h>
26 #include <linux/gpio.h>
27 #include <linux/delay.h>
28 #include <linux/smsc911x.h>
29 #include <linux/regulator/fixed.h>
31 #ifdef CONFIG_SMDK6410_WM1190_EV1
32 #include <linux/mfd/wm8350/core.h>
33 #include <linux/mfd/wm8350/pmic.h>
36 #ifdef CONFIG_SMDK6410_WM1192_EV1
37 #include <linux/mfd/wm831x/core.h>
38 #include <linux/mfd/wm831x/pdata.h>
41 #include <video/platform_lcd.h>
43 #include <asm/mach/arch.h>
44 #include <asm/mach/map.h>
45 #include <asm/mach/irq.h>
47 #include <mach/hardware.h>
48 #include <mach/regs-fb.h>
52 #include <asm/mach-types.h>
54 #include <plat/regs-serial.h>
55 #include <mach/regs-modem.h>
56 #include <mach/regs-gpio.h>
57 #include <mach/regs-sys.h>
58 #include <mach/regs-srom.h>
61 #include <plat/gpio-cfg.h>
63 #include <mach/s3c6410.h>
64 #include <plat/clock.h>
65 #include <plat/devs.h>
70 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
71 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
72 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
74 static struct s3c2410_uartcfg smdk6410_uartcfgs
[] __initdata
= {
105 /* framebuffer and LCD setup. */
107 /* GPF15 = LCD backlight control
108 * GPF13 => Panel power
109 * GPN5 = LCD nRESET signal
110 * PWM_TOUT1 => backlight brightness
113 static void smdk6410_lcd_power_set(struct plat_lcd_data
*pd
,
117 gpio_direction_output(S3C64XX_GPF(13), 1);
118 gpio_direction_output(S3C64XX_GPF(15), 1);
120 /* fire nRESET on power up */
121 gpio_direction_output(S3C64XX_GPN(5), 0);
123 gpio_direction_output(S3C64XX_GPN(5), 1);
126 gpio_direction_output(S3C64XX_GPF(15), 0);
127 gpio_direction_output(S3C64XX_GPF(13), 0);
131 static struct plat_lcd_data smdk6410_lcd_power_data
= {
132 .set_power
= smdk6410_lcd_power_set
,
135 static struct platform_device smdk6410_lcd_powerdev
= {
136 .name
= "platform-lcd",
137 .dev
.parent
= &s3c_device_fb
.dev
,
138 .dev
.platform_data
= &smdk6410_lcd_power_data
,
141 static struct s3c_fb_pd_win smdk6410_fb_win0
= {
142 /* this is to ensure we use win0 */
158 /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
159 static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata
= {
160 .setup_gpio
= s3c64xx_fb_gpio_setup_24bpp
,
161 .win
[0] = &smdk6410_fb_win0
,
162 .vidcon0
= VIDCON0_VIDOUT_RGB
| VIDCON0_PNRMODE_RGB
,
163 .vidcon1
= VIDCON1_INV_HSYNC
| VIDCON1_INV_VSYNC
,
167 * Configuring Ethernet on SMDK6410
169 * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
170 * The constant address below corresponds to nCS1
172 * 1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
173 * 2) CFG6 needs to be switched to "LAN9115" side
176 static struct resource smdk6410_smsc911x_resources
[] = {
178 .start
= S3C64XX_PA_XM0CSN1
,
179 .end
= S3C64XX_PA_XM0CSN1
+ SZ_64K
- 1,
180 .flags
= IORESOURCE_MEM
,
183 .start
= S3C_EINT(10),
185 .flags
= IORESOURCE_IRQ
| IRQ_TYPE_LEVEL_LOW
,
189 static struct smsc911x_platform_config smdk6410_smsc911x_pdata
= {
190 .irq_polarity
= SMSC911X_IRQ_POLARITY_ACTIVE_LOW
,
191 .irq_type
= SMSC911X_IRQ_TYPE_OPEN_DRAIN
,
192 .flags
= SMSC911X_USE_32BIT
| SMSC911X_FORCE_INTERNAL_PHY
,
193 .phy_interface
= PHY_INTERFACE_MODE_MII
,
197 static struct platform_device smdk6410_smsc911x
= {
200 .num_resources
= ARRAY_SIZE(smdk6410_smsc911x_resources
),
201 .resource
= &smdk6410_smsc911x_resources
[0],
203 .platform_data
= &smdk6410_smsc911x_pdata
,
207 #ifdef CONFIG_REGULATOR
208 static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers
[] = {
212 .dev_name
= "0-001b",
217 .dev_name
= "0-001b",
221 static struct regulator_init_data smdk6410_b_pwr_5v_data
= {
225 .num_consumer_supplies
= ARRAY_SIZE(smdk6410_b_pwr_5v_consumers
),
226 .consumer_supplies
= smdk6410_b_pwr_5v_consumers
,
229 static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata
= {
230 .supply_name
= "B_PWR_5V",
231 .microvolts
= 5000000,
232 .init_data
= &smdk6410_b_pwr_5v_data
,
236 static struct platform_device smdk6410_b_pwr_5v
= {
237 .name
= "reg-fixed-voltage",
240 .platform_data
= &smdk6410_b_pwr_5v_pdata
,
245 static struct map_desc smdk6410_iodesc
[] = {};
247 static struct platform_device
*smdk6410_devices
[] __initdata
= {
248 #ifdef CONFIG_SMDK6410_SD_CH0
251 #ifdef CONFIG_SMDK6410_SD_CH1
258 &s3c_device_usb_hsotg
,
260 &s3c64xx_device_iisv4
,
262 #ifdef CONFIG_REGULATOR
265 &smdk6410_lcd_powerdev
,
273 #ifdef CONFIG_REGULATOR
275 static struct regulator_consumer_supply smdk6410_vddarm_consumers
[] = {
281 /* VDDARM, BUCK1 on J5 */
282 static struct regulator_init_data smdk6410_vddarm
= {
288 .valid_ops_mask
= REGULATOR_CHANGE_VOLTAGE
,
290 .num_consumer_supplies
= ARRAY_SIZE(smdk6410_vddarm_consumers
),
291 .consumer_supplies
= smdk6410_vddarm_consumers
,
294 /* VDD_INT, BUCK2 on J5 */
295 static struct regulator_init_data smdk6410_vddint
= {
301 .valid_ops_mask
= REGULATOR_CHANGE_VOLTAGE
,
305 /* VDD_HI, LDO3 on J5 */
306 static struct regulator_init_data smdk6410_vddhi
= {
313 /* VDD_PLL, LDO2 on J5 */
314 static struct regulator_init_data smdk6410_vddpll
= {
321 /* VDD_UH_MMC, LDO5 on J5 */
322 static struct regulator_init_data smdk6410_vdduh_mmc
= {
324 .name
= "PVDD_UH/PVDD_MMC",
329 /* VCCM3BT, LDO8 on J5 */
330 static struct regulator_init_data smdk6410_vccmc3bt
= {
337 /* VCCM2MTV, LDO11 on J5 */
338 static struct regulator_init_data smdk6410_vccm2mtv
= {
345 /* VDD_LCD, LDO12 on J5 */
346 static struct regulator_init_data smdk6410_vddlcd
= {
353 /* VDD_OTGI, LDO9 on J5 */
354 static struct regulator_init_data smdk6410_vddotgi
= {
361 /* VDD_OTG, LDO14 on J5 */
362 static struct regulator_init_data smdk6410_vddotg
= {
369 /* VDD_ALIVE, LDO15 on J5 */
370 static struct regulator_init_data smdk6410_vddalive
= {
372 .name
= "PVDD_ALIVE",
377 /* VDD_AUDIO, VLDO_AUDIO on J5 */
378 static struct regulator_init_data smdk6410_vddaudio
= {
380 .name
= "PVDD_AUDIO",
386 #ifdef CONFIG_SMDK6410_WM1190_EV1
387 /* S3C64xx internal logic & PLL */
388 static struct regulator_init_data wm8350_dcdc1_data
= {
390 .name
= "PVDD_INT/PVDD_PLL",
399 static struct regulator_init_data wm8350_dcdc3_data
= {
407 .mode
= REGULATOR_MODE_NORMAL
,
410 .initial_state
= PM_SUSPEND_MEM
,
414 /* USB, EXT, PCM, ADC/DAC, USB, MMC */
415 static struct regulator_consumer_supply wm8350_dcdc4_consumers
[] = {
419 .dev_name
= "0-001b",
423 static struct regulator_init_data wm8350_dcdc4_data
= {
425 .name
= "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
430 .num_consumer_supplies
= ARRAY_SIZE(wm8350_dcdc4_consumers
),
431 .consumer_supplies
= wm8350_dcdc4_consumers
,
434 /* OTGi/1190-EV1 HPVDD & AVDD */
435 static struct regulator_init_data wm8350_ldo4_data
= {
437 .name
= "PVDD_OTGI/HPVDD/AVDD",
447 struct regulator_init_data
*initdata
;
448 } wm1190_regulators
[] = {
449 { WM8350_DCDC_1
, &wm8350_dcdc1_data
},
450 { WM8350_DCDC_3
, &wm8350_dcdc3_data
},
451 { WM8350_DCDC_4
, &wm8350_dcdc4_data
},
452 { WM8350_DCDC_6
, &smdk6410_vddarm
},
453 { WM8350_LDO_1
, &smdk6410_vddalive
},
454 { WM8350_LDO_2
, &smdk6410_vddotg
},
455 { WM8350_LDO_3
, &smdk6410_vddlcd
},
456 { WM8350_LDO_4
, &wm8350_ldo4_data
},
459 static int __init
smdk6410_wm8350_init(struct wm8350
*wm8350
)
463 /* Configure the IRQ line */
464 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP
);
466 /* Instantiate the regulators */
467 for (i
= 0; i
< ARRAY_SIZE(wm1190_regulators
); i
++)
468 wm8350_register_regulator(wm8350
,
469 wm1190_regulators
[i
].regulator
,
470 wm1190_regulators
[i
].initdata
);
475 static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata
= {
476 .init
= smdk6410_wm8350_init
,
478 .irq_base
= IRQ_BOARD_START
,
482 #ifdef CONFIG_SMDK6410_WM1192_EV1
483 static struct gpio_led wm1192_pmic_leds
[] = {
485 .name
= "PMIC:red:power",
486 .gpio
= GPIO_BOARD_START
+ 3,
487 .default_state
= LEDS_GPIO_DEFSTATE_ON
,
491 static struct gpio_led_platform_data wm1192_pmic_led
= {
492 .num_leds
= ARRAY_SIZE(wm1192_pmic_leds
),
493 .leds
= wm1192_pmic_leds
,
496 static struct platform_device wm1192_pmic_led_dev
= {
500 .platform_data
= &wm1192_pmic_led
,
504 static int wm1192_pre_init(struct wm831x
*wm831x
)
508 /* Configure the IRQ line */
509 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP
);
511 ret
= platform_device_register(&wm1192_pmic_led_dev
);
513 dev_err(wm831x
->dev
, "Failed to add PMIC LED: %d\n", ret
);
518 static struct wm831x_backlight_pdata wm1192_backlight_pdata
= {
523 static struct regulator_init_data wm1192_dcdc3
= {
525 .name
= "PVDD_MEM/PVDD_GPS",
530 static struct regulator_consumer_supply wm1192_ldo1_consumers
[] = {
531 { .supply
= "DVDD", .dev_name
= "0-001b", }, /* WM8580 */
534 static struct regulator_init_data wm1192_ldo1
= {
536 .name
= "PVDD_LCD/PVDD_EXT",
539 .consumer_supplies
= wm1192_ldo1_consumers
,
540 .num_consumer_supplies
= ARRAY_SIZE(wm1192_ldo1_consumers
),
543 static struct wm831x_status_pdata wm1192_led7_pdata
= {
544 .name
= "LED7:green:",
547 static struct wm831x_status_pdata wm1192_led8_pdata
= {
548 .name
= "LED8:green:",
551 static struct wm831x_pdata smdk6410_wm1192_pdata
= {
552 .pre_init
= wm1192_pre_init
,
553 .irq_base
= IRQ_BOARD_START
,
555 .backlight
= &wm1192_backlight_pdata
,
557 &smdk6410_vddarm
, /* DCDC1 */
558 &smdk6410_vddint
, /* DCDC2 */
561 .gpio_base
= GPIO_BOARD_START
,
563 &wm1192_ldo1
, /* LDO1 */
564 &smdk6410_vdduh_mmc
, /* LDO2 */
566 &smdk6410_vddotgi
, /* LDO4 */
567 &smdk6410_vddotg
, /* LDO5 */
568 &smdk6410_vddhi
, /* LDO6 */
569 &smdk6410_vddaudio
, /* LDO7 */
570 &smdk6410_vccm2mtv
, /* LDO8 */
571 &smdk6410_vddpll
, /* LDO9 */
572 &smdk6410_vccmc3bt
, /* LDO10 */
573 &smdk6410_vddalive
, /* LDO11 */
582 static struct i2c_board_info i2c_devs0
[] __initdata
= {
583 { I2C_BOARD_INFO("24c08", 0x50), },
584 { I2C_BOARD_INFO("wm8580", 0x1b), },
586 #ifdef CONFIG_SMDK6410_WM1192_EV1
587 { I2C_BOARD_INFO("wm8312", 0x34),
588 .platform_data
= &smdk6410_wm1192_pdata
,
593 #ifdef CONFIG_SMDK6410_WM1190_EV1
594 { I2C_BOARD_INFO("wm8350", 0x1a),
595 .platform_data
= &smdk6410_wm8350_pdata
,
601 static struct i2c_board_info i2c_devs1
[] __initdata
= {
602 { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */
605 static struct s3c2410_ts_mach_info s3c_ts_platform __initdata
= {
608 .oversampling_shift
= 2,
611 static void __init
smdk6410_map_io(void)
615 s3c64xx_init_io(smdk6410_iodesc
, ARRAY_SIZE(smdk6410_iodesc
));
616 s3c24xx_init_clocks(12000000);
617 s3c24xx_init_uarts(smdk6410_uartcfgs
, ARRAY_SIZE(smdk6410_uartcfgs
));
619 /* set the LCD type */
621 tmp
= __raw_readl(S3C64XX_SPCON
);
622 tmp
&= ~S3C64XX_SPCON_LCD_SEL_MASK
;
623 tmp
|= S3C64XX_SPCON_LCD_SEL_RGB
;
624 __raw_writel(tmp
, S3C64XX_SPCON
);
626 /* remove the lcd bypass */
627 tmp
= __raw_readl(S3C64XX_MODEM_MIFPCON
);
628 tmp
&= ~MIFPCON_LCD_BYPASS
;
629 __raw_writel(tmp
, S3C64XX_MODEM_MIFPCON
);
632 static void __init
smdk6410_machine_init(void)
636 s3c_i2c0_set_platdata(NULL
);
637 s3c_i2c1_set_platdata(NULL
);
638 s3c_fb_set_platdata(&smdk6410_lcd_pdata
);
640 s3c24xx_ts_set_platdata(&s3c_ts_platform
);
642 /* configure nCS1 width to 16 bits */
644 cs1
= __raw_readl(S3C64XX_SROM_BW
) &
645 ~(S3C64XX_SROM_BW__CS_MASK
<< S3C64XX_SROM_BW__NCS1__SHIFT
);
646 cs1
|= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT
) |
647 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT
) |
648 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT
)) <<
649 S3C64XX_SROM_BW__NCS1__SHIFT
;
650 __raw_writel(cs1
, S3C64XX_SROM_BW
);
652 /* set timing for nCS1 suitable for ethernet chip */
654 __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT
) |
655 (6 << S3C64XX_SROM_BCX__TACP__SHIFT
) |
656 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT
) |
657 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT
) |
658 (0xe << S3C64XX_SROM_BCX__TACC__SHIFT
) |
659 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT
) |
660 (0 << S3C64XX_SROM_BCX__TACS__SHIFT
), S3C64XX_SROM_BC1
);
662 gpio_request(S3C64XX_GPN(5), "LCD power");
663 gpio_request(S3C64XX_GPF(13), "LCD power");
664 gpio_request(S3C64XX_GPF(15), "LCD power");
666 i2c_register_board_info(0, i2c_devs0
, ARRAY_SIZE(i2c_devs0
));
667 i2c_register_board_info(1, i2c_devs1
, ARRAY_SIZE(i2c_devs1
));
669 platform_add_devices(smdk6410_devices
, ARRAY_SIZE(smdk6410_devices
));
672 MACHINE_START(SMDK6410
, "SMDK6410")
673 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
674 .phys_io
= S3C_PA_UART
& 0xfff00000,
675 .io_pg_offst
= (((u32
)S3C_VA_UART
) >> 18) & 0xfffc,
676 .boot_params
= S3C64XX_PA_SDRAM
+ 0x100,
678 .init_irq
= s3c6410_init_irq
,
679 .map_io
= smdk6410_map_io
,
680 .init_machine
= smdk6410_machine_init
,
681 .timer
= &s3c24xx_timer
,