ASoC: Samsung: Do not register samsung audio dma device as pdev
[deliverable/linux.git] / arch / arm / mach-s5p64x0 / mach-smdk6440.c
1 /* linux/arch/arm/mach-s5p64x0/mach-smdk6440.c
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/types.h>
13 #include <linux/interrupt.h>
14 #include <linux/list.h>
15 #include <linux/timer.h>
16 #include <linux/delay.h>
17 #include <linux/init.h>
18 #include <linux/i2c.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
21 #include <linux/io.h>
22 #include <linux/module.h>
23 #include <linux/clk.h>
24 #include <linux/gpio.h>
25 #include <linux/pwm_backlight.h>
26 #include <linux/fb.h>
27 #include <linux/mmc/host.h>
28
29 #include <video/platform_lcd.h>
30 #include <video/samsung_fimd.h>
31
32 #include <asm/hardware/vic.h>
33 #include <asm/mach/arch.h>
34 #include <asm/mach/map.h>
35 #include <asm/irq.h>
36 #include <asm/mach-types.h>
37
38 #include <mach/hardware.h>
39 #include <mach/map.h>
40 #include <mach/regs-clock.h>
41 #include <mach/i2c.h>
42 #include <mach/regs-gpio.h>
43
44 #include <plat/regs-serial.h>
45 #include <plat/gpio-cfg.h>
46 #include <plat/clock.h>
47 #include <plat/devs.h>
48 #include <plat/cpu.h>
49 #include <linux/platform_data/i2c-s3c2410.h>
50 #include <plat/pll.h>
51 #include <plat/adc.h>
52 #include <linux/platform_data/touchscreen-s3c2410.h>
53 #include <plat/s5p-time.h>
54 #include <plat/backlight.h>
55 #include <plat/fb.h>
56 #include <plat/sdhci.h>
57
58 #include "common.h"
59
60 #define SMDK6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
61 S3C2410_UCON_RXILEVEL | \
62 S3C2410_UCON_TXIRQMODE | \
63 S3C2410_UCON_RXIRQMODE | \
64 S3C2410_UCON_RXFIFO_TOI | \
65 S3C2443_UCON_RXERR_IRQEN)
66
67 #define SMDK6440_ULCON_DEFAULT S3C2410_LCON_CS8
68
69 #define SMDK6440_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
70 S3C2440_UFCON_TXTRIG16 | \
71 S3C2410_UFCON_RXTRIG8)
72
73 static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = {
74 [0] = {
75 .hwport = 0,
76 .flags = 0,
77 .ucon = SMDK6440_UCON_DEFAULT,
78 .ulcon = SMDK6440_ULCON_DEFAULT,
79 .ufcon = SMDK6440_UFCON_DEFAULT,
80 },
81 [1] = {
82 .hwport = 1,
83 .flags = 0,
84 .ucon = SMDK6440_UCON_DEFAULT,
85 .ulcon = SMDK6440_ULCON_DEFAULT,
86 .ufcon = SMDK6440_UFCON_DEFAULT,
87 },
88 [2] = {
89 .hwport = 2,
90 .flags = 0,
91 .ucon = SMDK6440_UCON_DEFAULT,
92 .ulcon = SMDK6440_ULCON_DEFAULT,
93 .ufcon = SMDK6440_UFCON_DEFAULT,
94 },
95 [3] = {
96 .hwport = 3,
97 .flags = 0,
98 .ucon = SMDK6440_UCON_DEFAULT,
99 .ulcon = SMDK6440_ULCON_DEFAULT,
100 .ufcon = SMDK6440_UFCON_DEFAULT,
101 },
102 };
103
104 /* Frame Buffer */
105 static struct s3c_fb_pd_win smdk6440_fb_win0 = {
106 .max_bpp = 32,
107 .default_bpp = 24,
108 .xres = 800,
109 .yres = 480,
110 };
111
112 static struct fb_videomode smdk6440_lcd_timing = {
113 .left_margin = 8,
114 .right_margin = 13,
115 .upper_margin = 7,
116 .lower_margin = 5,
117 .hsync_len = 3,
118 .vsync_len = 1,
119 .xres = 800,
120 .yres = 480,
121 };
122
123 static struct s3c_fb_platdata smdk6440_lcd_pdata __initdata = {
124 .win[0] = &smdk6440_fb_win0,
125 .vtiming = &smdk6440_lcd_timing,
126 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
127 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
128 .setup_gpio = s5p64x0_fb_gpio_setup_24bpp,
129 };
130
131 /* LCD power controller */
132 static void smdk6440_lte480_reset_power(struct plat_lcd_data *pd,
133 unsigned int power)
134 {
135 int err;
136
137 if (power) {
138 err = gpio_request(S5P6440_GPN(5), "GPN");
139 if (err) {
140 printk(KERN_ERR "failed to request GPN for lcd reset\n");
141 return;
142 }
143
144 gpio_direction_output(S5P6440_GPN(5), 1);
145 gpio_set_value(S5P6440_GPN(5), 0);
146 gpio_set_value(S5P6440_GPN(5), 1);
147 gpio_free(S5P6440_GPN(5));
148 }
149 }
150
151 static struct plat_lcd_data smdk6440_lcd_power_data = {
152 .set_power = smdk6440_lte480_reset_power,
153 };
154
155 static struct platform_device smdk6440_lcd_lte480wv = {
156 .name = "platform-lcd",
157 .dev.parent = &s3c_device_fb.dev,
158 .dev.platform_data = &smdk6440_lcd_power_data,
159 };
160
161 static struct platform_device *smdk6440_devices[] __initdata = {
162 &s3c_device_adc,
163 &s3c_device_rtc,
164 &s3c_device_i2c0,
165 &s3c_device_i2c1,
166 &s3c_device_ts,
167 &s3c_device_wdt,
168 &s5p6440_device_iis,
169 &s3c_device_fb,
170 &smdk6440_lcd_lte480wv,
171 &s3c_device_hsmmc0,
172 &s3c_device_hsmmc1,
173 &s3c_device_hsmmc2,
174 };
175
176 static struct s3c_sdhci_platdata smdk6440_hsmmc0_pdata __initdata = {
177 .cd_type = S3C_SDHCI_CD_NONE,
178 };
179
180 static struct s3c_sdhci_platdata smdk6440_hsmmc1_pdata __initdata = {
181 .cd_type = S3C_SDHCI_CD_INTERNAL,
182 #if defined(CONFIG_S5P64X0_SD_CH1_8BIT)
183 .max_width = 8,
184 .host_caps = MMC_CAP_8_BIT_DATA,
185 #endif
186 };
187
188 static struct s3c_sdhci_platdata smdk6440_hsmmc2_pdata __initdata = {
189 .cd_type = S3C_SDHCI_CD_NONE,
190 };
191
192 static struct s3c2410_platform_i2c s5p6440_i2c0_data __initdata = {
193 .flags = 0,
194 .slave_addr = 0x10,
195 .frequency = 100*1000,
196 .sda_delay = 100,
197 .cfg_gpio = s5p6440_i2c0_cfg_gpio,
198 };
199
200 static struct s3c2410_platform_i2c s5p6440_i2c1_data __initdata = {
201 .flags = 0,
202 .bus_num = 1,
203 .slave_addr = 0x10,
204 .frequency = 100*1000,
205 .sda_delay = 100,
206 .cfg_gpio = s5p6440_i2c1_cfg_gpio,
207 };
208
209 static struct i2c_board_info smdk6440_i2c_devs0[] __initdata = {
210 { I2C_BOARD_INFO("24c08", 0x50), },
211 { I2C_BOARD_INFO("wm8580", 0x1b), },
212 };
213
214 static struct i2c_board_info smdk6440_i2c_devs1[] __initdata = {
215 /* To be populated */
216 };
217
218 /* LCD Backlight data */
219 static struct samsung_bl_gpio_info smdk6440_bl_gpio_info = {
220 .no = S5P6440_GPF(15),
221 .func = S3C_GPIO_SFN(2),
222 };
223
224 static struct platform_pwm_backlight_data smdk6440_bl_data = {
225 .pwm_id = 1,
226 };
227
228 static void __init smdk6440_map_io(void)
229 {
230 s5p64x0_init_io(NULL, 0);
231 s3c24xx_init_clocks(12000000);
232 s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs));
233 s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
234 }
235
236 static void s5p6440_set_lcd_interface(void)
237 {
238 unsigned int cfg;
239
240 /* select TFT LCD type (RGB I/F) */
241 cfg = __raw_readl(S5P64X0_SPCON0);
242 cfg &= ~S5P64X0_SPCON0_LCD_SEL_MASK;
243 cfg |= S5P64X0_SPCON0_LCD_SEL_RGB;
244 __raw_writel(cfg, S5P64X0_SPCON0);
245 }
246
247 static void __init smdk6440_machine_init(void)
248 {
249 s3c24xx_ts_set_platdata(NULL);
250
251 s3c_i2c0_set_platdata(&s5p6440_i2c0_data);
252 s3c_i2c1_set_platdata(&s5p6440_i2c1_data);
253 i2c_register_board_info(0, smdk6440_i2c_devs0,
254 ARRAY_SIZE(smdk6440_i2c_devs0));
255 i2c_register_board_info(1, smdk6440_i2c_devs1,
256 ARRAY_SIZE(smdk6440_i2c_devs1));
257
258 samsung_bl_set(&smdk6440_bl_gpio_info, &smdk6440_bl_data);
259
260 s5p6440_set_lcd_interface();
261 s3c_fb_set_platdata(&smdk6440_lcd_pdata);
262
263 s3c_sdhci0_set_platdata(&smdk6440_hsmmc0_pdata);
264 s3c_sdhci1_set_platdata(&smdk6440_hsmmc1_pdata);
265 s3c_sdhci2_set_platdata(&smdk6440_hsmmc2_pdata);
266
267 platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices));
268 }
269
270 MACHINE_START(SMDK6440, "SMDK6440")
271 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
272 .atag_offset = 0x100,
273
274 .init_irq = s5p6440_init_irq,
275 .handle_irq = vic_handle_irq,
276 .map_io = smdk6440_map_io,
277 .init_machine = smdk6440_machine_init,
278 .timer = &s5p_timer,
279 .restart = s5p64x0_restart,
280 MACHINE_END
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