arch/arm/mach-sa1100/generic.c

   1 /*
   2  * linux/arch/arm/mach-sa1100/generic.c
   3  *
   4  * Author: Nicolas Pitre
   5  *
   6  * Code common to all SA11x0 machines.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12 #include <linux/module.h>
  13 #include <linux/kernel.h>
  14 #include <linux/init.h>
  15 #include <linux/delay.h>
  16 #include <linux/pm.h>
  17 #include <linux/cpufreq.h>
  18 #include <linux/ioport.h>
  19 #include <linux/sched.h>        /* just for sched_clock() - funny that */
  20 #include <linux/platform_device.h>
  21 #include <linux/cnt32_to_63.h>
  22
  23 #include <asm/div64.h>
  24 #include <mach/hardware.h>
  25 #include <asm/system.h>
  26 #include <asm/pgtable.h>
  27 #include <asm/mach/map.h>
  28 #include <asm/mach/flash.h>
  29 #include <asm/irq.h>
  30 #include <asm/gpio.h>
  31
  32 #include "generic.h"
  33
  34 unsigned int reset_status;
  35 EXPORT_SYMBOL(reset_status);
  36
  37 #define NR_FREQS        16
  38
  39 /*
  40  * This table is setup for a 3.6864MHz Crystal.
  41  */
  42 static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
  43          590,   /*  59.0 MHz */
  44          737,   /*  73.7 MHz */
  45          885,   /*  88.5 MHz */
  46         1032,   /* 103.2 MHz */
  47         1180,   /* 118.0 MHz */
  48         1327,   /* 132.7 MHz */
  49         1475,   /* 147.5 MHz */
  50         1622,   /* 162.2 MHz */
  51         1769,   /* 176.9 MHz */
  52         1917,   /* 191.7 MHz */
  53         2064,   /* 206.4 MHz */
  54         2212,   /* 221.2 MHz */
  55         2359,   /* 235.9 MHz */
  56         2507,   /* 250.7 MHz */
  57         2654,   /* 265.4 MHz */
  58         2802    /* 280.2 MHz */
  59 };
  60
  61 #if defined(CONFIG_CPU_FREQ_SA1100) || defined(CONFIG_CPU_FREQ_SA1110)
  62 /* rounds up(!)  */
  63 unsigned int sa11x0_freq_to_ppcr(unsigned int khz)
  64 {
  65         int i;
  66
  67         khz /= 100;
  68
  69         for (i = 0; i < NR_FREQS; i++)
  70                 if (cclk_frequency_100khz[i] >= khz)
  71                         break;
  72
  73         return i;
  74 }
  75
  76 unsigned int sa11x0_ppcr_to_freq(unsigned int idx)
  77 {
  78         unsigned int freq = 0;
  79         if (idx < NR_FREQS)
  80                 freq = cclk_frequency_100khz[idx] * 100;
  81         return freq;
  82 }
  83
  84
  85 /* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
  86  * this platform, anyway.
  87  */
  88 int sa11x0_verify_speed(struct cpufreq_policy *policy)
  89 {
  90         unsigned int tmp;
  91         if (policy->cpu)
  92                 return -EINVAL;
  93
  94         cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
  95
  96         /* make sure that at least one frequency is within the policy */
  97         tmp = cclk_frequency_100khz[sa11x0_freq_to_ppcr(policy->min)] * 100;
  98         if (tmp > policy->max)
  99                 policy->max = tmp;
 100
 101         cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
 102
 103         return 0;
 104 }
 105
 106 unsigned int sa11x0_getspeed(unsigned int cpu)
 107 {
 108         if (cpu)
 109                 return 0;
 110         return cclk_frequency_100khz[PPCR & 0xf] * 100;
 111 }
 112
 113 #else
 114 /*
 115  * We still need to provide this so building without cpufreq works.
 116  */
 117 unsigned int cpufreq_get(unsigned int cpu)
 118 {
 119         return cclk_frequency_100khz[PPCR & 0xf] * 100;
 120 }
 121 EXPORT_SYMBOL(cpufreq_get);
 122 #endif
 123
 124 /*
 125  * This is the SA11x0 sched_clock implementation.  This has
 126  * a resolution of 271ns, and a maximum value of 32025597s (370 days).
 127  *
 128  * The return value is guaranteed to be monotonic in that range as
 129  * long as there is always less than 582 seconds between successive
 130  * calls to this function.
 131  *
 132  *  ( * 1E9 / 3686400 => * 78125 / 288)
 133  */
 134 unsigned long long sched_clock(void)
 135 {
 136         unsigned long long v = cnt32_to_63(OSCR);
 137
 138         /* the <<1 gets rid of the cnt_32_to_63 top bit saving on a bic insn */
 139         v *= 78125<<1;
 140         do_div(v, 288<<1);
 141
 142         return v;
 143 }
 144
 145 /*
 146  * Default power-off for SA1100
 147  */
 148 static void sa1100_power_off(void)
 149 {
 150         mdelay(100);
 151         local_irq_disable();
 152         /* disable internal oscillator, float CS lines */
 153         PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
 154         /* enable wake-up on GPIO0 (Assabet...) */
 155         PWER = GFER = GRER = 1;
 156         /*
 157          * set scratchpad to zero, just in case it is used as a
 158          * restart address by the bootloader.
 159          */
 160         PSPR = 0;
 161         /* enter sleep mode */
 162         PMCR = PMCR_SF;
 163 }
 164
 165 static void sa11x0_register_device(struct platform_device *dev, void *data)
 166 {
 167         int err;
 168         dev->dev.platform_data = data;
 169         err = platform_device_register(dev);
 170         if (err)
 171                 printk(KERN_ERR "Unable to register device %s: %d\n",
 172                         dev->name, err);
 173 }
 174
 175
 176 static struct resource sa11x0udc_resources[] = {
 177         [0] = {
 178                 .start  = 0x80000000,
 179                 .end    = 0x8000ffff,
 180                 .flags  = IORESOURCE_MEM,
 181         },
 182 };
 183
 184 static u64 sa11x0udc_dma_mask = 0xffffffffUL;
 185
 186 static struct platform_device sa11x0udc_device = {
 187         .name           = "sa11x0-udc",
 188         .id             = -1,
 189         .dev            = {
 190                 .dma_mask = &sa11x0udc_dma_mask,
 191                 .coherent_dma_mask = 0xffffffff,
 192         },
 193         .num_resources  = ARRAY_SIZE(sa11x0udc_resources),
 194         .resource       = sa11x0udc_resources,
 195 };
 196
 197 static struct resource sa11x0uart1_resources[] = {
 198         [0] = {
 199                 .start  = 0x80010000,
 200                 .end    = 0x8001ffff,
 201                 .flags  = IORESOURCE_MEM,
 202         },
 203 };
 204
 205 static struct platform_device sa11x0uart1_device = {
 206         .name           = "sa11x0-uart",
 207         .id             = 1,
 208         .num_resources  = ARRAY_SIZE(sa11x0uart1_resources),
 209         .resource       = sa11x0uart1_resources,
 210 };
 211
 212 static struct resource sa11x0uart3_resources[] = {
 213         [0] = {
 214                 .start  = 0x80050000,
 215                 .end    = 0x8005ffff,
 216                 .flags  = IORESOURCE_MEM,
 217         },
 218 };
 219
 220 static struct platform_device sa11x0uart3_device = {
 221         .name           = "sa11x0-uart",
 222         .id             = 3,
 223         .num_resources  = ARRAY_SIZE(sa11x0uart3_resources),
 224         .resource       = sa11x0uart3_resources,
 225 };
 226
 227 static struct resource sa11x0mcp_resources[] = {
 228         [0] = {
 229                 .start  = 0x80060000,
 230                 .end    = 0x8006ffff,
 231                 .flags  = IORESOURCE_MEM,
 232         },
 233 };
 234
 235 static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
 236
 237 static struct platform_device sa11x0mcp_device = {
 238         .name           = "sa11x0-mcp",
 239         .id             = -1,
 240         .dev = {
 241                 .dma_mask = &sa11x0mcp_dma_mask,
 242                 .coherent_dma_mask = 0xffffffff,
 243         },
 244         .num_resources  = ARRAY_SIZE(sa11x0mcp_resources),
 245         .resource       = sa11x0mcp_resources,
 246 };
 247
 248 void sa11x0_register_mcp(struct mcp_plat_data *data)
 249 {
 250         sa11x0_register_device(&sa11x0mcp_device, data);
 251 }
 252
 253 static struct resource sa11x0ssp_resources[] = {
 254         [0] = {
 255                 .start  = 0x80070000,
 256                 .end    = 0x8007ffff,
 257                 .flags  = IORESOURCE_MEM,
 258         },
 259 };
 260
 261 static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
 262
 263 static struct platform_device sa11x0ssp_device = {
 264         .name           = "sa11x0-ssp",
 265         .id             = -1,
 266         .dev = {
 267                 .dma_mask = &sa11x0ssp_dma_mask,
 268                 .coherent_dma_mask = 0xffffffff,
 269         },
 270         .num_resources  = ARRAY_SIZE(sa11x0ssp_resources),
 271         .resource       = sa11x0ssp_resources,
 272 };
 273
 274 static struct resource sa11x0fb_resources[] = {
 275         [0] = {
 276                 .start  = 0xb0100000,
 277                 .end    = 0xb010ffff,
 278                 .flags  = IORESOURCE_MEM,
 279         },
 280         [1] = {
 281                 .start  = IRQ_LCD,
 282                 .end    = IRQ_LCD,
 283                 .flags  = IORESOURCE_IRQ,
 284         },
 285 };
 286
 287 static struct platform_device sa11x0fb_device = {
 288         .name           = "sa11x0-fb",
 289         .id             = -1,
 290         .dev = {
 291                 .coherent_dma_mask = 0xffffffff,
 292         },
 293         .num_resources  = ARRAY_SIZE(sa11x0fb_resources),
 294         .resource       = sa11x0fb_resources,
 295 };
 296
 297 static struct platform_device sa11x0pcmcia_device = {
 298         .name           = "sa11x0-pcmcia",
 299         .id             = -1,
 300 };
 301
 302 static struct platform_device sa11x0mtd_device = {
 303         .name           = "sa1100-mtd",
 304         .id             = -1,
 305 };
 306
 307 void sa11x0_register_mtd(struct flash_platform_data *flash,
 308                          struct resource *res, int nr)
 309 {
 310         flash->name = "sa1100";
 311         sa11x0mtd_device.resource = res;
 312         sa11x0mtd_device.num_resources = nr;
 313         sa11x0_register_device(&sa11x0mtd_device, flash);
 314 }
 315
 316 static struct resource sa11x0ir_resources[] = {
 317         {
 318                 .start  = __PREG(Ser2UTCR0),
 319                 .end    = __PREG(Ser2UTCR0) + 0x24 - 1,
 320                 .flags  = IORESOURCE_MEM,
 321         }, {
 322                 .start  = __PREG(Ser2HSCR0),
 323                 .end    = __PREG(Ser2HSCR0) + 0x1c - 1,
 324                 .flags  = IORESOURCE_MEM,
 325         }, {
 326                 .start  = __PREG(Ser2HSCR2),
 327                 .end    = __PREG(Ser2HSCR2) + 0x04 - 1,
 328                 .flags  = IORESOURCE_MEM,
 329         }, {
 330                 .start  = IRQ_Ser2ICP,
 331                 .end    = IRQ_Ser2ICP,
 332                 .flags  = IORESOURCE_IRQ,
 333         }
 334 };
 335
 336 static struct platform_device sa11x0ir_device = {
 337         .name           = "sa11x0-ir",
 338         .id             = -1,
 339         .num_resources  = ARRAY_SIZE(sa11x0ir_resources),
 340         .resource       = sa11x0ir_resources,
 341 };
 342
 343 void sa11x0_register_irda(struct irda_platform_data *irda)
 344 {
 345         sa11x0_register_device(&sa11x0ir_device, irda);
 346 }
 347
 348 static struct platform_device sa11x0rtc_device = {
 349         .name           = "sa1100-rtc",
 350         .id             = -1,
 351 };
 352
 353 static struct platform_device *sa11x0_devices[] __initdata = {
 354         &sa11x0udc_device,
 355         &sa11x0uart1_device,
 356         &sa11x0uart3_device,
 357         &sa11x0ssp_device,
 358         &sa11x0pcmcia_device,
 359         &sa11x0fb_device,
 360         &sa11x0rtc_device,
 361 };
 362
 363 static int __init sa1100_init(void)
 364 {
 365         pm_power_off = sa1100_power_off;
 366         return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
 367 }
 368
 369 arch_initcall(sa1100_init);
 370
 371 void (*sa1100fb_backlight_power)(int on);
 372 void (*sa1100fb_lcd_power)(int on);
 373
 374 EXPORT_SYMBOL(sa1100fb_backlight_power);
 375 EXPORT_SYMBOL(sa1100fb_lcd_power);
 376
 377
 378 /*
 379  * Common I/O mapping:
 380  *
 381  * Typically, static virtual address mappings are as follow:
 382  *
 383  * 0xf0000000-0xf3ffffff:       miscellaneous stuff (CPLDs, etc.)
 384  * 0xf4000000-0xf4ffffff:       SA-1111
 385  * 0xf5000000-0xf5ffffff:       reserved (used by cache flushing area)
 386  * 0xf6000000-0xfffeffff:       reserved (internal SA1100 IO defined above)
 387  * 0xffff0000-0xffff0fff:       SA1100 exception vectors
 388  * 0xffff2000-0xffff2fff:       Minicache copy_user_page area
 389  *
 390  * Below 0xe8000000 is reserved for vm allocation.
 391  *
 392  * The machine specific code must provide the extra mapping beside the
 393  * default mapping provided here.
 394  */
 395
 396 static struct map_desc standard_io_desc[] __initdata = {
 397         {       /* PCM */
 398                 .virtual        =  0xf8000000,
 399                 .pfn            = __phys_to_pfn(0x80000000),
 400                 .length         = 0x00100000,
 401                 .type           = MT_DEVICE
 402         }, {    /* SCM */
 403                 .virtual        =  0xfa000000,
 404                 .pfn            = __phys_to_pfn(0x90000000),
 405                 .length         = 0x00100000,
 406                 .type           = MT_DEVICE
 407         }, {    /* MER */
 408                 .virtual        =  0xfc000000,
 409                 .pfn            = __phys_to_pfn(0xa0000000),
 410                 .length         = 0x00100000,
 411                 .type           = MT_DEVICE
 412         }, {    /* LCD + DMA */
 413                 .virtual        =  0xfe000000,
 414                 .pfn            = __phys_to_pfn(0xb0000000),
 415                 .length         = 0x00200000,
 416                 .type           = MT_DEVICE
 417         },
 418 };
 419
 420 void __init sa1100_map_io(void)
 421 {
 422         iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
 423 }
 424
 425 /*
 426  * Disable the memory bus request/grant signals on the SA1110 to
 427  * ensure that we don't receive spurious memory requests.  We set
 428  * the MBGNT signal false to ensure the SA1111 doesn't own the
 429  * SDRAM bus.
 430  */
 431 void __init sa1110_mb_disable(void)
 432 {
 433         unsigned long flags;
 434
 435         local_irq_save(flags);
 436
 437         PGSR &= ~GPIO_MBGNT;
 438         GPCR = GPIO_MBGNT;
 439         GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
 440
 441         GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);
 442
 443         local_irq_restore(flags);
 444 }
 445
 446 /*
 447  * If the system is going to use the SA-1111 DMA engines, set up
 448  * the memory bus request/grant pins.
 449  */
 450 void __devinit sa1110_mb_enable(void)
 451 {
 452         unsigned long flags;
 453
 454         local_irq_save(flags);
 455
 456         PGSR &= ~GPIO_MBGNT;
 457         GPCR = GPIO_MBGNT;
 458         GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
 459
 460         GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
 461         TUCR |= TUCR_MR;
 462
 463         local_irq_restore(flags);
 464 }
 465