arch/arm/mach-sa1100/generic.c

   1 /*
   2  * linux/arch/arm/mach-sa1100/generic.c
   3  *
   4  * Author: Nicolas Pitre
   5  *
   6  * Code common to all SA11x0 machines.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12 #include <linux/gpio.h>
  13 #include <linux/module.h>
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/delay.h>
  17 #include <linux/pm.h>
  18 #include <linux/cpufreq.h>
  19 #include <linux/ioport.h>
  20 #include <linux/platform_device.h>
  21
  22 #include <asm/div64.h>
  23 #include <mach/hardware.h>
  24 #include <asm/system.h>
  25 #include <asm/mach/map.h>
  26 #include <asm/mach/flash.h>
  27 #include <asm/irq.h>
  28
  29 #include "generic.h"
  30
  31 unsigned int reset_status;
  32 EXPORT_SYMBOL(reset_status);
  33
  34 #define NR_FREQS        16
  35
  36 /*
  37  * This table is setup for a 3.6864MHz Crystal.
  38  */
  39 static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
  40          590,   /*  59.0 MHz */
  41          737,   /*  73.7 MHz */
  42          885,   /*  88.5 MHz */
  43         1032,   /* 103.2 MHz */
  44         1180,   /* 118.0 MHz */
  45         1327,   /* 132.7 MHz */
  46         1475,   /* 147.5 MHz */
  47         1622,   /* 162.2 MHz */
  48         1769,   /* 176.9 MHz */
  49         1917,   /* 191.7 MHz */
  50         2064,   /* 206.4 MHz */
  51         2212,   /* 221.2 MHz */
  52         2359,   /* 235.9 MHz */
  53         2507,   /* 250.7 MHz */
  54         2654,   /* 265.4 MHz */
  55         2802    /* 280.2 MHz */
  56 };
  57
  58 /* rounds up(!)  */
  59 unsigned int sa11x0_freq_to_ppcr(unsigned int khz)
  60 {
  61         int i;
  62
  63         khz /= 100;
  64
  65         for (i = 0; i < NR_FREQS; i++)
  66                 if (cclk_frequency_100khz[i] >= khz)
  67                         break;
  68
  69         return i;
  70 }
  71
  72 unsigned int sa11x0_ppcr_to_freq(unsigned int idx)
  73 {
  74         unsigned int freq = 0;
  75         if (idx < NR_FREQS)
  76                 freq = cclk_frequency_100khz[idx] * 100;
  77         return freq;
  78 }
  79
  80
  81 /* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
  82  * this platform, anyway.
  83  */
  84 int sa11x0_verify_speed(struct cpufreq_policy *policy)
  85 {
  86         unsigned int tmp;
  87         if (policy->cpu)
  88                 return -EINVAL;
  89
  90         cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
  91
  92         /* make sure that at least one frequency is within the policy */
  93         tmp = cclk_frequency_100khz[sa11x0_freq_to_ppcr(policy->min)] * 100;
  94         if (tmp > policy->max)
  95                 policy->max = tmp;
  96
  97         cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
  98
  99         return 0;
 100 }
 101
 102 unsigned int sa11x0_getspeed(unsigned int cpu)
 103 {
 104         if (cpu)
 105                 return 0;
 106         return cclk_frequency_100khz[PPCR & 0xf] * 100;
 107 }
 108
 109 /*
 110  * Default power-off for SA1100
 111  */
 112 static void sa1100_power_off(void)
 113 {
 114         mdelay(100);
 115         local_irq_disable();
 116         /* disable internal oscillator, float CS lines */
 117         PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
 118         /* enable wake-up on GPIO0 (Assabet...) */
 119         PWER = GFER = GRER = 1;
 120         /*
 121          * set scratchpad to zero, just in case it is used as a
 122          * restart address by the bootloader.
 123          */
 124         PSPR = 0;
 125         /* enter sleep mode */
 126         PMCR = PMCR_SF;
 127 }
 128
 129 void sa11x0_restart(char mode, const char *cmd)
 130 {
 131         if (mode == 's') {
 132                 /* Jump into ROM at address 0 */
 133                 soft_restart(0);
 134         } else {
 135                 /* Use on-chip reset capability */
 136                 RSRR = RSRR_SWR;
 137         }
 138 }
 139
 140 static void sa11x0_register_device(struct platform_device *dev, void *data)
 141 {
 142         int err;
 143         dev->dev.platform_data = data;
 144         err = platform_device_register(dev);
 145         if (err)
 146                 printk(KERN_ERR "Unable to register device %s: %d\n",
 147                         dev->name, err);
 148 }
 149
 150
 151 static struct resource sa11x0udc_resources[] = {
 152         [0] = {
 153                 .start  = __PREG(Ser0UDCCR),
 154                 .end    = __PREG(Ser0UDCCR) + 0xffff,
 155                 .flags  = IORESOURCE_MEM,
 156         },
 157         [1] = {
 158                 .start  = IRQ_Ser0UDC,
 159                 .end    = IRQ_Ser0UDC,
 160                 .flags  = IORESOURCE_IRQ,
 161         },
 162 };
 163
 164 static u64 sa11x0udc_dma_mask = 0xffffffffUL;
 165
 166 static struct platform_device sa11x0udc_device = {
 167         .name           = "sa11x0-udc",
 168         .id             = -1,
 169         .dev            = {
 170                 .dma_mask = &sa11x0udc_dma_mask,
 171                 .coherent_dma_mask = 0xffffffff,
 172         },
 173         .num_resources  = ARRAY_SIZE(sa11x0udc_resources),
 174         .resource       = sa11x0udc_resources,
 175 };
 176
 177 static struct resource sa11x0uart1_resources[] = {
 178         [0] = {
 179                 .start  = __PREG(Ser1UTCR0),
 180                 .end    = __PREG(Ser1UTCR0) + 0xffff,
 181                 .flags  = IORESOURCE_MEM,
 182         },
 183         [1] = {
 184                 .start  = IRQ_Ser1UART,
 185                 .end    = IRQ_Ser1UART,
 186                 .flags  = IORESOURCE_IRQ,
 187         },
 188 };
 189
 190 static struct platform_device sa11x0uart1_device = {
 191         .name           = "sa11x0-uart",
 192         .id             = 1,
 193         .num_resources  = ARRAY_SIZE(sa11x0uart1_resources),
 194         .resource       = sa11x0uart1_resources,
 195 };
 196
 197 static struct resource sa11x0uart3_resources[] = {
 198         [0] = {
 199                 .start  = __PREG(Ser3UTCR0),
 200                 .end    = __PREG(Ser3UTCR0) + 0xffff,
 201                 .flags  = IORESOURCE_MEM,
 202         },
 203         [1] = {
 204                 .start  = IRQ_Ser3UART,
 205                 .end    = IRQ_Ser3UART,
 206                 .flags  = IORESOURCE_IRQ,
 207         },
 208 };
 209
 210 static struct platform_device sa11x0uart3_device = {
 211         .name           = "sa11x0-uart",
 212         .id             = 3,
 213         .num_resources  = ARRAY_SIZE(sa11x0uart3_resources),
 214         .resource       = sa11x0uart3_resources,
 215 };
 216
 217 static struct resource sa11x0mcp_resources[] = {
 218         [0] = {
 219                 .start  = __PREG(Ser4MCCR0),
 220                 .end    = __PREG(Ser4MCCR0) + 0x1C - 1,
 221                 .flags  = IORESOURCE_MEM,
 222         },
 223         [1] = {
 224                 .start  = __PREG(Ser4MCCR1),
 225                 .end    = __PREG(Ser4MCCR1) + 0x4 - 1,
 226                 .flags  = IORESOURCE_MEM,
 227         },
 228         [2] = {
 229                 .start  = IRQ_Ser4MCP,
 230                 .end    = IRQ_Ser4MCP,
 231                 .flags  = IORESOURCE_IRQ,
 232         },
 233 };
 234
 235 static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
 236
 237 static struct platform_device sa11x0mcp_device = {
 238         .name           = "sa11x0-mcp",
 239         .id             = -1,
 240         .dev = {
 241                 .dma_mask = &sa11x0mcp_dma_mask,
 242                 .coherent_dma_mask = 0xffffffff,
 243         },
 244         .num_resources  = ARRAY_SIZE(sa11x0mcp_resources),
 245         .resource       = sa11x0mcp_resources,
 246 };
 247
 248 void sa11x0_register_mcp(struct mcp_plat_data *data)
 249 {
 250         sa11x0_register_device(&sa11x0mcp_device, data);
 251 }
 252
 253 static struct resource sa11x0ssp_resources[] = {
 254         [0] = {
 255                 .start  = 0x80070000,
 256                 .end    = 0x8007ffff,
 257                 .flags  = IORESOURCE_MEM,
 258         },
 259         [1] = {
 260                 .start  = IRQ_Ser4SSP,
 261                 .end    = IRQ_Ser4SSP,
 262                 .flags  = IORESOURCE_IRQ,
 263         },
 264 };
 265
 266 static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
 267
 268 static struct platform_device sa11x0ssp_device = {
 269         .name           = "sa11x0-ssp",
 270         .id             = -1,
 271         .dev = {
 272                 .dma_mask = &sa11x0ssp_dma_mask,
 273                 .coherent_dma_mask = 0xffffffff,
 274         },
 275         .num_resources  = ARRAY_SIZE(sa11x0ssp_resources),
 276         .resource       = sa11x0ssp_resources,
 277 };
 278
 279 static struct resource sa11x0fb_resources[] = {
 280         [0] = {
 281                 .start  = 0xb0100000,
 282                 .end    = 0xb010ffff,
 283                 .flags  = IORESOURCE_MEM,
 284         },
 285         [1] = {
 286                 .start  = IRQ_LCD,
 287                 .end    = IRQ_LCD,
 288                 .flags  = IORESOURCE_IRQ,
 289         },
 290 };
 291
 292 static struct platform_device sa11x0fb_device = {
 293         .name           = "sa11x0-fb",
 294         .id             = -1,
 295         .dev = {
 296                 .coherent_dma_mask = 0xffffffff,
 297         },
 298         .num_resources  = ARRAY_SIZE(sa11x0fb_resources),
 299         .resource       = sa11x0fb_resources,
 300 };
 301
 302 static struct platform_device sa11x0pcmcia_device = {
 303         .name           = "sa11x0-pcmcia",
 304         .id             = -1,
 305 };
 306
 307 static struct platform_device sa11x0mtd_device = {
 308         .name           = "sa1100-mtd",
 309         .id             = -1,
 310 };
 311
 312 void sa11x0_register_mtd(struct flash_platform_data *flash,
 313                          struct resource *res, int nr)
 314 {
 315         flash->name = "sa1100";
 316         sa11x0mtd_device.resource = res;
 317         sa11x0mtd_device.num_resources = nr;
 318         sa11x0_register_device(&sa11x0mtd_device, flash);
 319 }
 320
 321 static struct resource sa11x0ir_resources[] = {
 322         {
 323                 .start  = __PREG(Ser2UTCR0),
 324                 .end    = __PREG(Ser2UTCR0) + 0x24 - 1,
 325                 .flags  = IORESOURCE_MEM,
 326         }, {
 327                 .start  = __PREG(Ser2HSCR0),
 328                 .end    = __PREG(Ser2HSCR0) + 0x1c - 1,
 329                 .flags  = IORESOURCE_MEM,
 330         }, {
 331                 .start  = __PREG(Ser2HSCR2),
 332                 .end    = __PREG(Ser2HSCR2) + 0x04 - 1,
 333                 .flags  = IORESOURCE_MEM,
 334         }, {
 335                 .start  = IRQ_Ser2ICP,
 336                 .end    = IRQ_Ser2ICP,
 337                 .flags  = IORESOURCE_IRQ,
 338         }
 339 };
 340
 341 static struct platform_device sa11x0ir_device = {
 342         .name           = "sa11x0-ir",
 343         .id             = -1,
 344         .num_resources  = ARRAY_SIZE(sa11x0ir_resources),
 345         .resource       = sa11x0ir_resources,
 346 };
 347
 348 void sa11x0_register_irda(struct irda_platform_data *irda)
 349 {
 350         sa11x0_register_device(&sa11x0ir_device, irda);
 351 }
 352
 353 static struct resource sa11x0rtc_resources[] = {
 354         [0] = {
 355                 .start  = 0x90010000,
 356                 .end    = 0x900100ff,
 357                 .flags  = IORESOURCE_MEM,
 358         },
 359         [1] = {
 360                 .start  = IRQ_RTC1Hz,
 361                 .end    = IRQ_RTC1Hz,
 362                 .flags  = IORESOURCE_IRQ,
 363         },
 364         [2] = {
 365                 .start  = IRQ_RTCAlrm,
 366                 .end    = IRQ_RTCAlrm,
 367                 .flags  = IORESOURCE_IRQ,
 368         },
 369 };
 370
 371 static struct platform_device sa11x0rtc_device = {
 372         .name           = "sa1100-rtc",
 373         .id             = -1,
 374         .resource       = sa11x0rtc_resources,
 375         .num_resources  = ARRAY_SIZE(sa11x0rtc_resources),
 376 };
 377
 378 static struct platform_device *sa11x0_devices[] __initdata = {
 379         &sa11x0udc_device,
 380         &sa11x0uart1_device,
 381         &sa11x0uart3_device,
 382         &sa11x0ssp_device,
 383         &sa11x0pcmcia_device,
 384         &sa11x0fb_device,
 385         &sa11x0rtc_device,
 386 };
 387
 388 static int __init sa1100_init(void)
 389 {
 390         pm_power_off = sa1100_power_off;
 391         return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
 392 }
 393
 394 arch_initcall(sa1100_init);
 395
 396 void (*sa1100fb_backlight_power)(int on);
 397 void (*sa1100fb_lcd_power)(int on);
 398
 399 EXPORT_SYMBOL(sa1100fb_backlight_power);
 400 EXPORT_SYMBOL(sa1100fb_lcd_power);
 401
 402
 403 /*
 404  * Common I/O mapping:
 405  *
 406  * Typically, static virtual address mappings are as follow:
 407  *
 408  * 0xf0000000-0xf3ffffff:       miscellaneous stuff (CPLDs, etc.)
 409  * 0xf4000000-0xf4ffffff:       SA-1111
 410  * 0xf5000000-0xf5ffffff:       reserved (used by cache flushing area)
 411  * 0xf6000000-0xfffeffff:       reserved (internal SA1100 IO defined above)
 412  * 0xffff0000-0xffff0fff:       SA1100 exception vectors
 413  * 0xffff2000-0xffff2fff:       Minicache copy_user_page area
 414  *
 415  * Below 0xe8000000 is reserved for vm allocation.
 416  *
 417  * The machine specific code must provide the extra mapping beside the
 418  * default mapping provided here.
 419  */
 420
 421 static struct map_desc standard_io_desc[] __initdata = {
 422         {       /* PCM */
 423                 .virtual        =  0xf8000000,
 424                 .pfn            = __phys_to_pfn(0x80000000),
 425                 .length         = 0x00100000,
 426                 .type           = MT_DEVICE
 427         }, {    /* SCM */
 428                 .virtual        =  0xfa000000,
 429                 .pfn            = __phys_to_pfn(0x90000000),
 430                 .length         = 0x00100000,
 431                 .type           = MT_DEVICE
 432         }, {    /* MER */
 433                 .virtual        =  0xfc000000,
 434                 .pfn            = __phys_to_pfn(0xa0000000),
 435                 .length         = 0x00100000,
 436                 .type           = MT_DEVICE
 437         }, {    /* LCD + DMA */
 438                 .virtual        =  0xfe000000,
 439                 .pfn            = __phys_to_pfn(0xb0000000),
 440                 .length         = 0x00200000,
 441                 .type           = MT_DEVICE
 442         },
 443 };
 444
 445 void __init sa1100_map_io(void)
 446 {
 447         iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
 448 }
 449
 450 /*
 451  * Disable the memory bus request/grant signals on the SA1110 to
 452  * ensure that we don't receive spurious memory requests.  We set
 453  * the MBGNT signal false to ensure the SA1111 doesn't own the
 454  * SDRAM bus.
 455  */
 456 void __init sa1110_mb_disable(void)
 457 {
 458         unsigned long flags;
 459
 460         local_irq_save(flags);
 461
 462         PGSR &= ~GPIO_MBGNT;
 463         GPCR = GPIO_MBGNT;
 464         GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
 465
 466         GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);
 467
 468         local_irq_restore(flags);
 469 }
 470
 471 /*
 472  * If the system is going to use the SA-1111 DMA engines, set up
 473  * the memory bus request/grant pins.
 474  */
 475 void __devinit sa1110_mb_enable(void)
 476 {
 477         unsigned long flags;
 478
 479         local_irq_save(flags);
 480
 481         PGSR &= ~GPIO_MBGNT;
 482         GPCR = GPIO_MBGNT;
 483         GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
 484
 485         GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
 486         TUCR |= TUCR_MR;
 487
 488         local_irq_restore(flags);
 489 }
 490