Merge tag 'jfs-3.12' of git://github.com/kleikamp/linux-shaggy
[deliverable/linux.git] / arch / arm / mach-shmobile / board-bockw.c
1 /*
2 * Bock-W board support
3 *
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 * Copyright (C) 2013 Cogent Embedded, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21
22 #include <linux/mfd/tmio.h>
23 #include <linux/mmc/host.h>
24 #include <linux/mmc/sh_mobile_sdhi.h>
25 #include <linux/mmc/sh_mmcif.h>
26 #include <linux/mtd/partitions.h>
27 #include <linux/pinctrl/machine.h>
28 #include <linux/platform_data/usb-rcar-phy.h>
29 #include <linux/platform_device.h>
30 #include <linux/regulator/fixed.h>
31 #include <linux/regulator/machine.h>
32 #include <linux/smsc911x.h>
33 #include <linux/spi/spi.h>
34 #include <linux/spi/flash.h>
35 #include <media/soc_camera.h>
36 #include <mach/common.h>
37 #include <mach/irqs.h>
38 #include <mach/r8a7778.h>
39 #include <asm/mach/arch.h>
40
41 /*
42 * CN9(Upper side) SCIF/RCAN selection
43 *
44 * 1,4 3,6
45 * SW40 SCIF RCAN
46 * SW41 SCIF RCAN
47 */
48
49 /*
50 * MMC (CN26) pin
51 *
52 * SW6 (D2) 3 pin
53 * SW7 (D5) ON
54 * SW8 (D3) 3 pin
55 * SW10 (D4) 1 pin
56 * SW12 (CLK) 1 pin
57 * SW13 (D6) 3 pin
58 * SW14 (CMD) ON
59 * SW15 (D6) 1 pin
60 * SW16 (D0) ON
61 * SW17 (D1) ON
62 * SW18 (D7) 3 pin
63 * SW19 (MMC) 1 pin
64 */
65
66 /* Dummy supplies, where voltage doesn't matter */
67 static struct regulator_consumer_supply dummy_supplies[] = {
68 REGULATOR_SUPPLY("vddvario", "smsc911x"),
69 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
70 };
71
72 static struct smsc911x_platform_config smsc911x_data __initdata = {
73 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
74 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
75 .flags = SMSC911X_USE_32BIT,
76 .phy_interface = PHY_INTERFACE_MODE_MII,
77 };
78
79 static struct resource smsc911x_resources[] __initdata = {
80 DEFINE_RES_MEM(0x18300000, 0x1000),
81 DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
82 };
83
84 /* USB */
85 static struct resource usb_phy_resources[] __initdata = {
86 DEFINE_RES_MEM(0xffe70800, 0x100),
87 DEFINE_RES_MEM(0xffe76000, 0x100),
88 };
89
90 static struct rcar_phy_platform_data usb_phy_platform_data __initdata;
91
92 /* SDHI */
93 static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
94 .tmio_caps = MMC_CAP_SD_HIGHSPEED,
95 .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
96 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
97 };
98
99 static struct resource sdhi0_resources[] __initdata = {
100 DEFINE_RES_MEM(0xFFE4C000, 0x100),
101 DEFINE_RES_IRQ(gic_iid(0x77)),
102 };
103
104 static struct sh_eth_plat_data ether_platform_data __initdata = {
105 .phy = 0x01,
106 .edmac_endian = EDMAC_LITTLE_ENDIAN,
107 .phy_interface = PHY_INTERFACE_MODE_RMII,
108 /*
109 * Although the LINK signal is available on the board, it's connected to
110 * the link/activity LED output of the PHY, thus the link disappears and
111 * reappears after each packet. We'd be better off ignoring such signal
112 * and getting the link state from the PHY indirectly.
113 */
114 .no_ether_link = 1,
115 };
116
117 /* I2C */
118 static struct i2c_board_info i2c0_devices[] = {
119 {
120 I2C_BOARD_INFO("rx8581", 0x51),
121 },
122 };
123
124 /* HSPI*/
125 static struct mtd_partition m25p80_spi_flash_partitions[] = {
126 {
127 .name = "data(spi)",
128 .size = 0x0100000,
129 .offset = 0,
130 },
131 };
132
133 static struct flash_platform_data spi_flash_data = {
134 .name = "m25p80",
135 .type = "s25fl008k",
136 .parts = m25p80_spi_flash_partitions,
137 .nr_parts = ARRAY_SIZE(m25p80_spi_flash_partitions),
138 };
139
140 static struct spi_board_info spi_board_info[] __initdata = {
141 {
142 .modalias = "m25p80",
143 .max_speed_hz = 104000000,
144 .chip_select = 0,
145 .bus_num = 0,
146 .mode = SPI_MODE_0,
147 .platform_data = &spi_flash_data,
148 },
149 };
150
151 /* MMC */
152 static struct resource mmc_resources[] __initdata = {
153 DEFINE_RES_MEM(0xffe4e000, 0x100),
154 DEFINE_RES_IRQ(gic_iid(0x5d)),
155 };
156
157 static struct sh_mmcif_plat_data sh_mmcif_plat __initdata = {
158 .sup_pclk = 0,
159 .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
160 .caps = MMC_CAP_4_BIT_DATA |
161 MMC_CAP_8_BIT_DATA |
162 MMC_CAP_NEEDS_POLL,
163 };
164
165 static struct rcar_vin_platform_data vin_platform_data __initdata = {
166 .flags = RCAR_VIN_BT656,
167 };
168
169 /* In the default configuration both decoders reside on I2C bus 0 */
170 #define BOCKW_CAMERA(idx) \
171 static struct i2c_board_info camera##idx##_info = { \
172 I2C_BOARD_INFO("ml86v7667", 0x41 + 2 * (idx)), \
173 }; \
174 \
175 static struct soc_camera_link iclink##idx##_ml86v7667 __initdata = { \
176 .bus_id = idx, \
177 .i2c_adapter_id = 0, \
178 .board_info = &camera##idx##_info, \
179 }
180
181 BOCKW_CAMERA(0);
182 BOCKW_CAMERA(1);
183
184 static const struct pinctrl_map bockw_pinctrl_map[] = {
185 /* Ether */
186 PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778",
187 "ether_rmii", "ether"),
188 /* HSPI0 */
189 PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7778",
190 "hspi0_a", "hspi0"),
191 /* MMC */
192 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
193 "mmc_data8", "mmc"),
194 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
195 "mmc_ctrl", "mmc"),
196 /* SCIF0 */
197 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
198 "scif0_data_a", "scif0"),
199 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
200 "scif0_ctrl", "scif0"),
201 /* USB */
202 PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
203 "usb0", "usb0"),
204 PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
205 "usb1", "usb1"),
206 /* SDHI0 */
207 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
208 "sdhi0_data4", "sdhi0"),
209 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
210 "sdhi0_ctrl", "sdhi0"),
211 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
212 "sdhi0_cd", "sdhi0"),
213 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
214 "sdhi0_wp", "sdhi0"),
215 /* VIN0 */
216 PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.0", "pfc-r8a7778",
217 "vin0_clk", "vin0"),
218 PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.0", "pfc-r8a7778",
219 "vin0_data8", "vin0"),
220 /* VIN1 */
221 PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.1", "pfc-r8a7778",
222 "vin1_clk", "vin1"),
223 PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.1", "pfc-r8a7778",
224 "vin1_data8", "vin1"),
225 };
226
227 #define FPGA 0x18200000
228 #define IRQ0MR 0x30
229 #define PFC 0xfffc0000
230 #define PUPR4 0x110
231 static void __init bockw_init(void)
232 {
233 void __iomem *base;
234
235 r8a7778_clock_init();
236 r8a7778_init_irq_extpin(1);
237 r8a7778_add_standard_devices();
238 r8a7778_add_ether_device(&ether_platform_data);
239 r8a7778_add_vin_device(0, &vin_platform_data);
240 /* VIN1 has a pin conflict with Ether */
241 if (!IS_ENABLED(CONFIG_SH_ETH))
242 r8a7778_add_vin_device(1, &vin_platform_data);
243 platform_device_register_data(&platform_bus, "soc-camera-pdrv", 0,
244 &iclink0_ml86v7667,
245 sizeof(iclink0_ml86v7667));
246 platform_device_register_data(&platform_bus, "soc-camera-pdrv", 1,
247 &iclink1_ml86v7667,
248 sizeof(iclink1_ml86v7667));
249
250 i2c_register_board_info(0, i2c0_devices,
251 ARRAY_SIZE(i2c0_devices));
252 spi_register_board_info(spi_board_info,
253 ARRAY_SIZE(spi_board_info));
254 pinctrl_register_mappings(bockw_pinctrl_map,
255 ARRAY_SIZE(bockw_pinctrl_map));
256 r8a7778_pinmux_init();
257
258 platform_device_register_resndata(
259 &platform_bus, "sh_mmcif", -1,
260 mmc_resources, ARRAY_SIZE(mmc_resources),
261 &sh_mmcif_plat, sizeof(struct sh_mmcif_plat_data));
262
263 platform_device_register_resndata(
264 &platform_bus, "rcar_usb_phy", -1,
265 usb_phy_resources,
266 ARRAY_SIZE(usb_phy_resources),
267 &usb_phy_platform_data,
268 sizeof(struct rcar_phy_platform_data));
269
270
271 /* for SMSC */
272 base = ioremap_nocache(FPGA, SZ_1M);
273 if (base) {
274 /*
275 * CAUTION
276 *
277 * IRQ0/1 is cascaded interrupt from FPGA.
278 * it should be cared in the future
279 * Now, it is assuming IRQ0 was used only from SMSC.
280 */
281 u16 val = ioread16(base + IRQ0MR);
282 val &= ~(1 << 4); /* enable SMSC911x */
283 iowrite16(val, base + IRQ0MR);
284 iounmap(base);
285
286 regulator_register_fixed(0, dummy_supplies,
287 ARRAY_SIZE(dummy_supplies));
288
289 platform_device_register_resndata(
290 &platform_bus, "smsc911x", -1,
291 smsc911x_resources, ARRAY_SIZE(smsc911x_resources),
292 &smsc911x_data, sizeof(smsc911x_data));
293 }
294
295 /* for SDHI */
296 base = ioremap_nocache(PFC, 0x200);
297 if (base) {
298 /*
299 * FIXME
300 *
301 * SDHI CD/WP pin needs pull-up
302 */
303 iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4);
304 iounmap(base);
305
306 platform_device_register_resndata(
307 &platform_bus, "sh_mobile_sdhi", 0,
308 sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
309 &sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
310 }
311 }
312
313 static const char *bockw_boards_compat_dt[] __initdata = {
314 "renesas,bockw",
315 NULL,
316 };
317
318 DT_MACHINE_START(BOCKW_DT, "bockw")
319 .init_early = r8a7778_init_delay,
320 .init_irq = r8a7778_init_irq_dt,
321 .init_machine = bockw_init,
322 .dt_compat = bockw_boards_compat_dt,
323 .init_late = r8a7778_init_late,
324 MACHINE_END
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